Index: firmware/App/Services/FpgaDD.c =================================================================== diff -u -rc408c29123e153d5a004b5b58bd455d01824f7f1 -r78842b478a83315eda5d877a99b16f3b899b7727 --- firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision c408c29123e153d5a004b5b58bd455d01824f7f1) +++ firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 78842b478a83315eda5d877a99b16f3b899b7727) @@ -92,6 +92,8 @@ #define FPGA_FLOATER_LEVEL_BIT 0x03 ///< Floater level bit mask. +#define FPGA_PRIMARY_HEATER_CNTRL_BIT 0x01 ///< FPGA GIO Primary heater control bit mask + /// FPGA size of V3 read bytes. #define FPGA_SIZE_OF_V3_READ_BYTES ( FPGA_READ_V3_END_BYTE_NUM - FPGA_READ_V3_START_BYTE_NUM ) @@ -321,7 +323,9 @@ U16 fpgaVUFPWMPeriod; ///< Reg 138. VUF PWM period U16 fpgaVUFPWMPullin; ///< Reg 140. VUF PWM pull in U16 fpgaCPARevCount; ///< Reg 142. Acid Concentrate pump revolution count - U16 fpgaCPBRevCount; ///< Reg 144. Bicard Concentrate pump revolution count + U16 fpgaCPBRevCount; ///< Reg 144. Bicarb Concentrate pump revolution count + U08 fpgaADCControl; ///< Reg 146. FPGA internal ADC Control register for debugging + U08 fpgaGPIOControl; ///< Reg 147. FPGA GPIO control interface } FPGA_ACTUATORS_T; #pragma pack(pop) @@ -1317,6 +1321,27 @@ /*********************************************************************//** * @brief + * The setFPGACPrimaryHeaterOnOffControl function sets the primary heater + * On/Off control. + * @details \b Inputs: none + * @details \b Outputs: fpgaGPIOControl + * @param flag Turn heater ON when true, otherwise not. + * @return none + *************************************************************************/ +void setFPGACPrimaryHeaterOnOffControl( BOOL flag ) +{ + if ( TRUE == flag) + { + fpgaActuatorSetPoints.fpgaGPIOControl |= FPGA_PRIMARY_HEATER_CNTRL_BIT; + } + else + { + fpgaActuatorSetPoints.fpgaGPIOControl &= ~FPGA_PRIMARY_HEATER_CNTRL_BIT; + } +} + +/*********************************************************************//** + * @brief * The getFPGAVersions function gets the FPGA version numbers. * @details \b Inputs: fpgaHeader * @details \b Outputs: none