Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r439894cb0508e69af3ece09ae57a62feac09e3f2 -r8f5feed92f41a476d5656038bcdfe884e17bd593
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 439894cb0508e69af3ece09ae57a62feac09e3f2)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 8f5feed92f41a476d5656038bcdfe884e17bd593)
@@ -44,7 +44,7 @@
 #define FPGA_HEADER_START_ADDR          0x0000
 #define FPGA_BULK_READ_START_ADDR       0x0100
 
-#define FPGA_BULK_WRITE_START_ADDR      0x000C
+#define FPGA_BULK_WRITE_START_ADDR      0x000E
 
 #define FPGA_WRITE_CMD_BUFFER_LEN       (FPGA_PAGE_SIZE+8)
 #define FPGA_READ_CMD_BUFFER_LEN        8
@@ -434,7 +434,7 @@
         default:
             if ( fpgaState >= NUM_OF_FPGA_STATES )
             {
-                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_IN_STATE, fpgaState )
+                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_IN_STATE, fpgaState )
             }
             else
             {
@@ -484,7 +484,7 @@
         default:
             if ( fpgaState >= NUM_OF_FPGA_STATES )
             {
-                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_OUT_STATE, fpgaState )
+                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_INVALID_OUT_STATE, fpgaState )
             }
             else
             {
@@ -737,7 +737,7 @@
     }
     else
     {
-        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_CMD_TOO_MUCH_DATA, bytes2Transmit )
     }
 }
 
@@ -777,7 +777,7 @@
     }
     else
     {
-        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, bytes2Receive )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_WRITE_RSP_TOO_MUCH_DATA, bytes2Receive )
     }
 }
 
@@ -817,7 +817,7 @@
     }
     else
     {
-        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, bytes2Transmit )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_CMD_TOO_MUCH_DATA, bytes2Transmit )
     }
 }
 
@@ -857,7 +857,7 @@
     }
     else
     {
-        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, bytes2Receive )
+        SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_READ_RSP_TOO_MUCH_DATA, bytes2Receive )
     }
 }