Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r5a36a768d11cc597a36b894c1fb3a5e5590130f1 -ra79db345deaaeef0f1b619dc49d031fdae22d7e6
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 5a36a768d11cc597a36b894c1fb3a5e5590130f1)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision a79db345deaaeef0f1b619dc49d031fdae22d7e6)
@@ -79,6 +79,11 @@
 
 #define FPGA_FLUIDLEAK_STATE_MASK       0x0004                  ///< Bit mask for fluid leak detector.
 
+#define FLUID_DOOR_SWITCH_MASK          0x08                    ///< Fluid door switch bit mask.
+#define DIALYSATE_CAP_SWITCH_MASK       0x10                    ///< Dialysate cap switch bit mask.
+#define CONCENTRATE_CAP_SWITCH_MASK     0x1A                    ///< Concentrate cap switch bit mask.
+#define FPGA_POWER_STATUS_MASK          0x40                    ///< FPGA power status bit mask.
+
 // FPGA header struct.
 #pragma pack(push,1)
 typedef struct
@@ -245,6 +250,7 @@
 static void startDMAReceiptOfReadResp( void );
 
 static void consumeUnexpectedData( void );
+static void monitorFPGAPowerStatus( void );
 
 /*********************************************************************//**
  * @brief
@@ -922,6 +928,11 @@
     }
 }
 
+static void monitorFPGAPowerStatus( void )
+{
+    BOOL isFPGAPowered = (BOOL)( fpgaSensorReadings.fpgaGPIO & FPGA_POWER_STATUS_MASK );
+}
+
 /*********************************************************************//**
  * @brief
  * The setFPGAValveStates function sets the DG valve states with a 16-bit
@@ -1843,4 +1854,43 @@
     return ( 0 == noFluidLeakDetected ? FALSE : TRUE );
 }
 
+/*********************************************************************//**
+ * @brief
+ * The getFPGAGFluidDoorStatus function gets the FPGA fluid door status
+ * bit.
+ * @details Inputs: fpgaSensorReadings
+ * @details Outputs: none
+ * @return fluid door status bit
+ *************************************************************************/
+U08 getFPGAGFluidDoorStatus( void )
+{
+    return ( fpgaSensorReadings.fpgaGPIO & FLUID_DOOR_SWITCH_MASK );
+}
+
+/*********************************************************************//**
+ * @brief
+ * The getFPGADialysateCapStatus function gets the FPGA dialysate cap status
+ * bit.
+ * @details Inputs: fpgaSensorReadings
+ * @details Outputs: none
+ * @return dialysate cap status bit
+ *************************************************************************/
+U08 getFPGADialysateCapStatus( void )
+{
+    return ( fpgaSensorReadings.fpgaGPIO & DIALYSATE_CAP_SWITCH_MASK );
+}
+
+/*********************************************************************//**
+ * @brief
+ * The getFPGAConcentrateCapStatus function gets the FPGA concentrate cap
+ * status bit.
+ * @details Inputs: fpgaSensorReadings
+ * @details Outputs: none
+ * @return concentrate cap status bit
+ *************************************************************************/
+U08 getFPGAConcentrateCapStatus( void )
+{
+    return ( fpgaSensorReadings.fpgaGPIO & CONCENTRATE_CAP_SWITCH_MASK );
+}
+
 /**@}*/