Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r79e0b1152e278a3b09d7d93c83a27f8998a2f3b6 -r6b13bb16465fb2eee853288fe0d109223d978cdd
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 79e0b1152e278a3b09d7d93c83a27f8998a2f3b6)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 6b13bb16465fb2eee853288fe0d109223d978cdd)
@@ -9,7 +9,7 @@
 * @file    FPGA.c
 *
 * @author  (last)      Dara Navaei
-* @date    (last)      24-May-2022
+* @date    (last)      04-Aug-2022
 *
 * @author  (original)  Dara Navaei
 * @date    (original)  05-Nov-2019
@@ -384,10 +384,6 @@
     memset( &fpgaWriteResponseBuffer, 0, FPGA_WRITE_RSP_BUFFER_LEN );
     memset( &fpgaReadResponseBuffer, 0, FPGA_READ_RSP_BUFFER_LEN );
 
-    // Assume the read byte size is set for V3 since V3 contains less number of bytes.
-    // Once the V3 or DVT build switch is set resize the number of bytes to read.
-    fpgaReadByteSize = FPGA_SIZE_OF_V3_READ_BYTES;
-
     // enable interrupt notifications for FPGA serial port
     sciEnableNotification( scilinREG, SCI_OE_INT | SCI_FE_INT );
 
@@ -771,7 +767,7 @@
     fpgaReadCmdBuffer[ 0 ] = FPGA_READ_CMD_CODE;
     fpgaReadCmdBuffer[ 1 ] = GET_LSB_OF_WORD( FPGA_BULK_READ_START_ADDR );
     fpgaReadCmdBuffer[ 2 ] = GET_MSB_OF_WORD( FPGA_BULK_READ_START_ADDR );
-    fpgaReadCmdBuffer[ 3 ] = fpgaReadByteSize; //sizeof( DG_FPGA_SENSORS_T );
+    fpgaReadCmdBuffer[ 3 ] = fpgaReadByteSize;
     crc = crc16( fpgaReadCmdBuffer, FPGA_READ_CMD_HDR_LEN );
     fpgaReadCmdBuffer[ 4 ] = GET_MSB_OF_WORD( crc );
     fpgaReadCmdBuffer[ 5 ] = GET_LSB_OF_WORD( crc );
@@ -782,7 +778,7 @@
 
     // prep DMA for sending the bulk read cmd and receiving its response
     setupDMAForReadCmd( FPGA_READ_CMD_HDR_LEN + FPGA_CRC_LEN );
-    setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + fpgaReadByteSize /*sizeof( DG_FPGA_SENSORS_T )*/ + FPGA_CRC_LEN );
+    setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + fpgaReadByteSize + FPGA_CRC_LEN );
 
     // set fpga comm flags for bulk write cmd and follow-up bulk read command
     fpgaWriteCommandInProgress = TRUE;
@@ -818,7 +814,7 @@
         // did FPGA Ack the read command?
         if ( fpgaReadResponseBuffer[ 0 ] == FPGA_READ_CMD_ACK )
         {
-            U32 rspSize = FPGA_READ_RSP_HDR_LEN + fpgaReadByteSize; //sizeof( DG_FPGA_SENSORS_T );
+            U32 rspSize = FPGA_READ_RSP_HDR_LEN + fpgaReadByteSize;
             U32 crcPos = rspSize;
             U16 crc = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ crcPos ], fpgaReadResponseBuffer[ crcPos + 1 ] );
 
@@ -827,7 +823,7 @@
             {
                 fpgaCommRetryCount = 0;
                 // capture the read values
-                memcpy( &fpgaSensorReadings, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], fpgaReadByteSize /*sizeof( DG_FPGA_SENSORS_T )*/ );
+                memcpy( &fpgaSensorReadings, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], fpgaReadByteSize );
                 result = FPGA_STATE_WRITE_ALL_ACTUATORS;
             }
             else // bad CRC
@@ -862,7 +858,7 @@
 {
     SELF_TEST_STATUS_T result;
 
-    // check FPGA reported correct ID
+    // TODO the FPGA self test has been implemented in DEN-13460.
     /*if ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId )
     {
         // Check FPGA compatibility w/ firmware
@@ -1199,8 +1195,6 @@
     fpgaActuatorSetPoints.fpgaCP2StepSpeed = stepSpeed;
 }
 
-/****************************DVT Functions*******************************************/
-
 /*********************************************************************//**
  * @brief
  * The setFPGAAcidPumpControl function sets the DVT concentrate pump 1