Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -ra79db345deaaeef0f1b619dc49d031fdae22d7e6 -r2d8f95eaae3bcb7027f5e96809ddc6e9c0efbc4c
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision a79db345deaaeef0f1b619dc49d031fdae22d7e6)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 2d8f95eaae3bcb7027f5e96809ddc6e9c0efbc4c)
@@ -18,12 +18,14 @@
 
 #include <string.h>     // for memset(), memcpy()
 
+#include "gio.h"
 #include "sci.h"
 #include "sys_dma.h"
 
-#include "FPGA.h"
 #include "Comm.h"
 #include "Compatible.h"
+#include "FPGA.h"
+#include "PersistentAlarm.h"
 #include "SystemCommMessages.h"
 #include "Utilities.h"
 
@@ -82,7 +84,8 @@
 #define FLUID_DOOR_SWITCH_MASK          0x08                    ///< Fluid door switch bit mask.
 #define DIALYSATE_CAP_SWITCH_MASK       0x10                    ///< Dialysate cap switch bit mask.
 #define CONCENTRATE_CAP_SWITCH_MASK     0x1A                    ///< Concentrate cap switch bit mask.
-#define FPGA_POWER_STATUS_MASK          0x40                    ///< FPGA power status bit mask.
+#define FPGA_POWER_OUT_TIMEOUT_MS       ( 2 * MS_PER_SECOND )   ///< FPGA power out timeout in milliseconds.
+#define FPGA_GPIO_POWER_STATUS_PIN      7                       ///< FPGA GPIO power status pin
 
 // FPGA header struct.
 #pragma pack(push,1)
@@ -364,6 +367,9 @@
 
     // there shouldn't be any data pending yet
     consumeUnexpectedData();
+
+    // Initialize the persistent alarm for FPGA power out
+    initPersistentAlarm( ALARM_ID_DG_FPGA_POWER_OUT_TIMEOUT, FPGA_POWER_OUT_TIMEOUT_MS, FPGA_POWER_OUT_TIMEOUT_MS );
 }
 
 /*********************************************************************//**
@@ -486,6 +492,9 @@
 
     // reset comm flags after processing incoming responses
     resetFPGACommFlags();
+
+    // Check the FPGA power status
+    monitorFPGAPowerStatus();
 }
 
 /*********************************************************************//**
@@ -928,9 +937,20 @@
     }
 }
 
+/*********************************************************************//**
+ * @brief
+ * The monitorFPGAPowerStatus function monitors the status of the FPGA power source.
+ * @details Inputs: none
+ * @details Outputs: none
+ * @return none
+ *************************************************************************/
 static void monitorFPGAPowerStatus( void )
 {
-    BOOL isFPGAPowered = (BOOL)( fpgaSensorReadings.fpgaGPIO & FPGA_POWER_STATUS_MASK );
+    // If the GIO bit returned a 0 it mean the power is out, otherwise the power is not out
+    BOOL isPowerOut = ( TRUE == (BOOL)gioGetBit( gioPORTA, FPGA_GPIO_POWER_STATUS_PIN ) ? FALSE : TRUE );
+
+    // TODO check to make sure alarm is not raised when the power is good
+    checkPersistentAlarm( ALARM_ID_DG_FPGA_POWER_OUT_TIMEOUT, isPowerOut, 0, FPGA_POWER_OUT_TIMEOUT_MS );
 }
 
 /*********************************************************************//**