Index: firmware/App/Services/Interrupts.c
===================================================================
diff -u -r07ae59288d41511e9c28460ced5c46fb870cc627 -r4d1572f8226f06febef4a536cdd0946d0dd0fb02
--- firmware/App/Services/Interrupts.c	(.../Interrupts.c)	(revision 07ae59288d41511e9c28460ced5c46fb870cc627)
+++ firmware/App/Services/Interrupts.c	(.../Interrupts.c)	(revision 4d1572f8226f06febef4a536cdd0946d0dd0fb02)
@@ -34,8 +34,10 @@
 
 // ********** private data **********
 
-static U32 sci1FrameErrorCnt = 0;
-static U32 sci1OverrunErrorCnt = 0;
+#ifdef DEBUG_ENABLED
+    static U32 sci1FrameErrorCnt = 0;
+    static U32 sci1OverrunErrorCnt = 0;
+#endif
 static U32 sci2FrameErrorCnt = 0;
 static U32 sci2OverrunErrorCnt = 0;
 
@@ -160,60 +162,55 @@
     // TODO - temporary debug code - remove later
     char debugStr[ 256 ];
 #endif
-    if ( sci == sciREG )
+
+    if ( sci == scilinREG )
     {
         if ( ( flags & SCI_FE_INT ) != 0 )
         {
-            sci1FrameErrorCnt++;
-            clearSCI1CommErrors();
+            sci2FrameErrorCnt++;
+            clearSCI2CommErrors();
             // TODO - try to do something to recover (+ max retries = comm fault)
 #ifdef DEBUG_ENABLED
             // TODO - temporary debug code - remove later
-            sprintf( debugStr, "Debug UART frame error:%5d \n", sci1FrameErrorCnt );
+            sprintf( debugStr, "FPGA UART frame error:%5d \n", sci2FrameErrorCnt );
             sendDebugData( (U08*)debugStr, strlen(debugStr) );
 #endif
         }
         if ( ( flags & SCI_OE_INT ) != 0 )
         {
-            sci1OverrunErrorCnt++;
-            clearSCI1CommErrors();
+            sci2OverrunErrorCnt++;
+            clearSCI2CommErrors();
             // TODO - try to do something to recover (+ max retries = comm fault)
 #ifdef DEBUG_ENABLED
             // TODO - temporary debug code - remove later
-            sprintf( debugStr, "Debug UART overrun error:%5d \n", sci1OverrunErrorCnt );
+            sprintf( debugStr, "FPGA UART overrun error:%5d \n", sci2OverrunErrorCnt );
             sendDebugData( (U08*)debugStr, strlen(debugStr) );
 #endif
         }
     }
-    else if ( sci == scilinREG )
+#ifdef DEBUG_ENABLED
+    else if ( sci == sciREG )
     {
         if ( ( flags & SCI_FE_INT ) != 0 )
         {
-            sci2FrameErrorCnt++;
-            clearSCI2CommErrors();
+            sci1FrameErrorCnt++;
+            clearSCI1CommErrors();
             // TODO - try to do something to recover (+ max retries = comm fault)
-#ifdef DEBUG_ENABLED
             // TODO - temporary debug code - remove later
-            sprintf( debugStr, "FPGA UART frame error:%5d \n", sci2FrameErrorCnt );
+            sprintf( debugStr, "Debug UART frame error:%5d \n", sci1FrameErrorCnt );
             sendDebugData( (U08*)debugStr, strlen(debugStr) );
-#endif
         }
         if ( ( flags & SCI_OE_INT ) != 0 )
         {
-            sci2OverrunErrorCnt++;
-            clearSCI2CommErrors();
+            sci1OverrunErrorCnt++;
+            clearSCI1CommErrors();
             // TODO - try to do something to recover (+ max retries = comm fault)
-#ifdef DEBUG_ENABLED
             // TODO - temporary debug code - remove later
-            sprintf( debugStr, "FPGA UART overrun error:%5d \n", sci2OverrunErrorCnt );
+            sprintf( debugStr, "Debug UART overrun error:%5d \n", sci1OverrunErrorCnt );
             sendDebugData( (U08*)debugStr, strlen(debugStr) );
-#endif
         }
     }
-    else
-    {
-        // TODO - ignore? - should not be any other SCI peripherals
-    }
+#endif
 }
 
 /*************************************************************************
@@ -237,23 +234,25 @@
                 signalFPGAReceiptCompleted();
                 break;
 
+#ifdef DEBUG_ENABLED
             case DMA_CH1:  // PC receive channel
                 clearSCI1DMAReceiveInterrupt();
                 // handle received packet from PC
                 handleUARTMsgRecvPacketInterrupt();
                 break;
-
+#endif
             case DMA_CH2:  // FPGA transmit channel
                 clearSCI2DMATransmitInterrupt();
                 signalFPGATransmitCompleted();
                 break;
 
+#ifdef DEBUG_ENABLED
             case DMA_CH3:  // PC transmit channel
                 clearSCI1DMATransmitInterrupt();
                 // send next pending packet to PC (if any)
                 handleUARTMsgXmitPacketInterrupt();
                 break;
-
+#endif
             default:
                 // TODO - ignore?
                 break;