Index: firmware/App/Controllers/LoadCell.c =================================================================== diff -u -r97d75c5bf1887d4ad6e8a9d15edac262af46042c -r0774a37971585dacdc8398362393920c13d48426 --- firmware/App/Controllers/LoadCell.c (.../LoadCell.c) (revision 97d75c5bf1887d4ad6e8a9d15edac262af46042c) +++ firmware/App/Controllers/LoadCell.c (.../LoadCell.c) (revision 0774a37971585dacdc8398362393920c13d48426) @@ -49,7 +49,7 @@ static U32 Load_cell_b2 = 0; BOOL result; - loadCellA1raw.data = getFPGALoadCellA1(); + loadCellA1raw.data = getFPGALoadCellA1() & 0x7FFFFFFF; // Temporary fix while FPGA code is being fixed loadCellA2raw.data = getFPGALoadCellA2(); loadCellB1raw.data = getFPGALoadCellB1(); loadCellB2raw.data = getFPGALoadCellB2(); Index: firmware/App/Controllers/LoadCell.h =================================================================== diff -u -re2b47a28c584a35e8ffdfcb2f954088d74348d0f -r0774a37971585dacdc8398362393920c13d48426 --- firmware/App/Controllers/LoadCell.h (.../LoadCell.h) (revision e2b47a28c584a35e8ffdfcb2f954088d74348d0f) +++ firmware/App/Controllers/LoadCell.h (.../LoadCell.h) (revision 0774a37971585dacdc8398362393920c13d48426) @@ -21,9 +21,10 @@ void execLoadCell(void); -#define LOAD_CELL_REPORT_PERIOD 100/TASK_PRIORITY_INTERVAL // Send a load cell value CAN message to HD every 100 ms +#define LOAD_CELL_REPORT_PERIOD (100 / TASK_PRIORITY_INTERVAL) // Send a load cell value CAN message to HD every 100 ms #define LOAD_CELL_SAMPLES_TO_AVERAGE LOAD_CELL_REPORT_PERIOD // Averaging load cell data over the reporting interval -#define ADC2GRAM 0.0894/LOAD_CELL_SAMPLES_TO_AVERAGE // division for averaging is folded into this value +//#define ADC2GRAM (0.0894 / LOAD_CELL_SAMPLES_TO_AVERAGE) // division for averaging is folded into this value +#define ADC2GRAM (0.01183 / LOAD_CELL_SAMPLES_TO_AVERAGE) // division for averaging is folded into this value F32 getLoadCellA1Ave(void); F32 getLoadCellA2Ave(void); Index: firmware/App/DGCommon.h =================================================================== diff -u -rb64c49fdcf2b6d95e61e63f8e258c4e600935bbd -r0774a37971585dacdc8398362393920c13d48426 --- firmware/App/DGCommon.h (.../DGCommon.h) (revision b64c49fdcf2b6d95e61e63f8e258c4e600935bbd) +++ firmware/App/DGCommon.h (.../DGCommon.h) (revision 0774a37971585dacdc8398362393920c13d48426) @@ -23,7 +23,7 @@ #ifndef _VECTORCAST_ // #define RM46_EVAL_BOARD_TARGET 1 - #define SIMULATE_UI 1 +// #define SIMULATE_UI 1 #define DEBUG_ENABLED 1 #define DISABLE_CRC_ERROR 1 // #define CAN_TEST 1 Index: firmware/App/Services/FPGA.c =================================================================== diff -u -r05f42ecd223cf512e9e8f3434dd01bdac3aca86d -r0774a37971585dacdc8398362393920c13d48426 --- firmware/App/Services/FPGA.c (.../FPGA.c) (revision 05f42ecd223cf512e9e8f3434dd01bdac3aca86d) +++ firmware/App/Services/FPGA.c (.../FPGA.c) (revision 0774a37971585dacdc8398362393920c13d48426) @@ -560,7 +560,8 @@ fpgaWriteCmdBuffer[ FPGA_WRITE_CMD_HDR_LEN + sizeof( FPGA_ACTUATORS_T ) + 1 ] = GET_LSB_OF_WORD( crc ); // construct bulk read command to read sensor data registers starting at address 8 fpgaReadCmdBuffer[ 0 ] = FPGA_READ_CMD_CODE; - fpgaReadCmdBuffer[ 1 ] = 0x08; // start at FPGA address 0x108 (264) + //fpgaReadCmdBuffer[ 1 ] = 0x08; // start at FPGA address 0x108 (264) + fpgaReadCmdBuffer[ 1 ] = 0x2C; // start at FPGA address 0x108 (264) fpgaReadCmdBuffer[ 2 ] = 0x01; fpgaReadCmdBuffer[ 3 ] = sizeof(DG_FPGA_SENSORS_T); crc = crc16( fpgaReadCmdBuffer, FPGA_READ_CMD_HDR_LEN ); Index: firmware/DG.dil =================================================================== diff -u -ra90f03eb56aaa492908cd2e7417da79f405d67d4 -r0774a37971585dacdc8398362393920c13d48426 --- firmware/DG.dil (.../DG.dil) (revision a90f03eb56aaa492908cd2e7417da79f405d67d4) +++ firmware/DG.dil (.../DG.dil) (revision 0774a37971585dacdc8398362393920c13d48426) @@ -1,4 +1,4 @@ -# RM46L852PGE 02/27/20 09:42:29 +# RM46L852PGE 03/04/20 18:29:39 # ARCH=RM46L852PGE # @@ -1567,16 +1567,16 @@ DRIVER.GIO.VAR.GIO_PORT0_BIT2_PULL.VALUE=1 DRIVER.GIO.VAR.GIO_PORT1_BIT1_PULDIS.VALUE=0 DRIVER.GIO.VAR.GIO_PORT0_BIT5_DOUT.VALUE=0 -DRIVER.GIO.VAR.GIO_PORT1_BIT0_ENA.VALUE=1 +DRIVER.GIO.VAR.GIO_PORT1_BIT0_ENA.VALUE=0 DRIVER.GIO.VAR.GIO_PORT0_BIT5_PULDIS.VALUE=0 -DRIVER.GIO.VAR.GIO_PORT1_BIT0_DIR.VALUE=0 +DRIVER.GIO.VAR.GIO_PORT1_BIT0_DIR.VALUE=1 DRIVER.GIO.VAR.GIO_PORT1_BIT2_DOUT.VALUE=0 DRIVER.GIO.VAR.GIO_PORT0_BIT3_PULL.VALUE=1 DRIVER.GIO.VAR.GIO_PORT1_BIT1_ENA.VALUE=0 DRIVER.GIO.VAR.GIO_PORT0_BIT6_DOUT.VALUE=0 -DRIVER.GIO.VAR.GIO_PORT1_BIT1_DIR.VALUE=0 +DRIVER.GIO.VAR.GIO_PORT1_BIT1_DIR.VALUE=1 DRIVER.GIO.VAR.GIO_PORT1_BIT6_PULDIS.VALUE=0 -DRIVER.GIO.VAR.GIO_PORT1_BIT2_ENA.VALUE=1 +DRIVER.GIO.VAR.GIO_PORT1_BIT2_ENA.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT2_DIR.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT0_PDR.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT0_PULL.VALUE=1 @@ -1618,12 +1618,12 @@ DRIVER.GIO.VAR.GIO_PORT0_BIT1_ENA.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT4_PDR.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT3_POL.VALUE=0 -DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULL.VALUE=0 +DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULL.VALUE=2 DRIVER.GIO.VAR.GIO_PORT0_BIT1_DIR.VALUE=1 DRIVER.GIO.VAR.GIO_PORT1_BIT5_DOUT.VALUE=0 DRIVER.GIO.VAR.GIO_PORT0_BIT6_PULL.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT7_ENA.VALUE=0 -DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULDIS.VALUE=1 +DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULDIS.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT3_PSL.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT7_DIR.VALUE=0 DRIVER.GIO.VAR.GIO_PORT1_BIT4_LVL.VALUE=0 Index: firmware/include/gio.h =================================================================== diff -u -r6d2d8f0267c57135554e5a1acaca9aef37f27949 -r0774a37971585dacdc8398362393920c13d48426 --- firmware/include/gio.h (.../gio.h) (revision 6d2d8f0267c57135554e5a1acaca9aef37f27949) +++ firmware/include/gio.h (.../gio.h) (revision 0774a37971585dacdc8398362393920c13d48426) @@ -97,9 +97,9 @@ | (uint32)((uint32)0U << 5U) \ | (uint32)((uint32)0U << 6U) \ | (uint32)((uint32)1U << 7U) \ - | (uint32)((uint32)1U << 8U) \ + | (uint32)((uint32)0U << 8U) \ | (uint32)((uint32)0U << 9U) \ - | (uint32)((uint32)1U << 10U)\ + | (uint32)((uint32)0U << 10U)\ | (uint32)((uint32)1U << 11U)\ | (uint32)((uint32)0U << 12U)\ | (uint32)((uint32)0U << 13U)\ @@ -128,10 +128,10 @@ #define GIO_PORTAPSL_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 6U) | (uint32)((uint32)1U << 7U)) #define GIO_PORTAPULDIS_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) |(uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 6U) | (uint32)((uint32)0U << 7U)) -#define GIO_PORTBDIR_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U)) +#define GIO_PORTBDIR_CONFIGVALUE ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U)) #define GIO_PORTBPDR_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U)) #define GIO_PORTBPSL_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U)) -#define GIO_PORTBPULDIS_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)1U << 2U) |(uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U)) +#define GIO_PORTBPULDIS_CONFIGVALUE ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) |(uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U)) /** Index: firmware/source/gio.c =================================================================== diff -u -r6d2d8f0267c57135554e5a1acaca9aef37f27949 -r0774a37971585dacdc8398362393920c13d48426 --- firmware/source/gio.c (.../gio.c) (revision 6d2d8f0267c57135554e5a1acaca9aef37f27949) +++ firmware/source/gio.c (.../gio.c) (revision 0774a37971585dacdc8398362393920c13d48426) @@ -133,8 +133,8 @@ | (uint32)((uint32)0U << 7U); /* Bit 7 */ /** - Port B direction */ - gioPORTB->DIR = (uint32)((uint32)0U << 0U) /* Bit 0 */ - | (uint32)((uint32)0U << 1U) /* Bit 1 */ + gioPORTB->DIR = (uint32)((uint32)1U << 0U) /* Bit 0 */ + | (uint32)((uint32)1U << 1U) /* Bit 1 */ | (uint32)((uint32)0U << 2U) /* Bit 2 */ | (uint32)((uint32)0U << 3U) /* Bit 3 */ | (uint32)((uint32)0U << 4U) /* Bit 4 */ @@ -165,7 +165,7 @@ /** - Port B pullup / pulldown enable*/ gioPORTB->PULDIS = (uint32)((uint32)0U << 0U) /* Bit 0 */ | (uint32)((uint32)0U << 1U) /* Bit 1 */ - | (uint32)((uint32)1U << 2U) /* Bit 2 */ + | (uint32)((uint32)0U << 2U) /* Bit 2 */ | (uint32)((uint32)0U << 3U) /* Bit 3 */ | (uint32)((uint32)0U << 4U) /* Bit 4 */ | (uint32)((uint32)0U << 5U) /* Bit 5 */ @@ -229,9 +229,9 @@ | (uint32)((uint32)0U << 5U) /* Bit 5 */ | (uint32)((uint32)0U << 6U) /* Bit 6 */ | (uint32)((uint32)1U << 7U) /* Bit 7 */ - | (uint32)((uint32)1U << 8U) /* Bit 8 */ + | (uint32)((uint32)0U << 8U) /* Bit 8 */ | (uint32)((uint32)0U << 9U) /* Bit 9 */ - | (uint32)((uint32)1U << 10U) /* Bit 10 */ + | (uint32)((uint32)0U << 10U) /* Bit 10 */ | (uint32)((uint32)1U << 11U) /* Bit 11 */ | (uint32)((uint32)0U << 12U) /* Bit 12 */ | (uint32)((uint32)0U << 13U) /* Bit 13 */