Index: firmware/App/Controllers/SensorProcess.c
===================================================================
diff -u
--- firmware/App/Controllers/SensorProcess.c	(revision 0)
+++ firmware/App/Controllers/SensorProcess.c	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -0,0 +1,31 @@
+/**********************************************************************//**
+ *
+ *  Copyright (c) 2020 Diality Inc. - All Rights Reserved.
+ *
+ *  THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
+ *  WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
+ *
+ *  @file SensorProcess.c
+ *
+ *  @date 20-Feb-2020
+ *  @author S. Nejatali
+ *
+ *  @brief Processing sensor data.
+ *
+ **************************************************************************/
+ 
+#include "gio.h"
+ 
+ /**@}*/
+
+/*********************************************************************//**
+ * @brief
+ * The execSensorProcess function calls other routines that process sensor data.
+ * @details
+ * Inputs : none
+ * Outputs : processing data.
+ * @return none
+ *************************************************************************/
+ void execSensorProcess()
+ {
+ }
Index: firmware/App/Controllers/SensorProcess.h
===================================================================
diff -u
--- firmware/App/Controllers/SensorProcess.h	(revision 0)
+++ firmware/App/Controllers/SensorProcess.h	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -0,0 +1,26 @@
+/**********************************************************************//**
+ *
+ *  Copyright (c) 2020 Diality Inc. - All Rights Reserved.
+ *
+ *  THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
+ *  WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
+ *
+ *  @file SensorProcess.h
+ *
+ *  @date 20-Feb-2020
+ *  @author S. Nejatali
+ *
+ *  @brief Processing sensor data.
+ *
+ **************************************************************************/
+
+#ifndef APP_CONTROLLERS_SENSORPROCESS_H_
+#define APP_CONTROLLERS_SENSORPROCESS_H_
+
+
+
+
+
+#endif /* APP_CONTROLLERS_SENSORPROCESS_H_ */
+
+
Index: firmware/App/Services/AlarmMgmt.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/App/Services/AlarmMgmt.c	(.../AlarmMgmt.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/App/Services/AlarmMgmt.c	(.../AlarmMgmt.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -161,7 +161,7 @@
 }
 
 /*************************************************************************
- * @brief activateAlarm1Data
+ * @brief activateAlarm2Data
  * The activateAlarm2Data function activates a given alarm.  Also, an alarm \n
  * message is broadcast to the rest of the system.  This function will \n
  * include two given data in the broadcast message for logging.
Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -80,6 +80,43 @@
 
 typedef struct  // TODO - add all sensor readings to this structure per FPGA register map
 {
+    U32 LCA1;
+    U32 LCA2;
+    U32 LCB1;
+    U32 LCB2;
+
+    //U08 bloodFlowMeterDataPktCount;
+    //U08 bloodFlowMeterSlowPktCounts;
+    //U08 bloodFlowMeterDeviceStatus;
+    //U08 bloodFlowMeterResponse;
+    //F32 bloodFlowLast;
+    //U08 dialysateFlowMeterDataPktCount;
+    //U08 dialysateFlowMeterSlowPckCounts;
+    //U08 dialysateFlowMeterDeviceStatus;
+    //U08 dialysateFlowMeterResponse;
+    //F32 dialysateFlowLast;
+
+    U08 bloodFlowMeterErrorCount;
+    U08 dialysateFlowMeterErrorCount;
+    U16 bloodOcclusionData;
+    U08 bloodOcclusionReadCount;
+    U08 bloodOcclusionErrorCount;
+    U16 dialysateInOcclusionData;
+    U08 dialysateInOcclusionReadCount;
+    U08 dialysateInOcclusionErrorCount;
+    U16 dialysateOutOcclusionData;
+    U08 dialysateOutOcclusionReadCount;
+    U08 dialysateOutOcclusionErrorCount;
+    U16 arterialPressureData;
+    U08 arterialPressureReadCount;
+    U08 arterialPressureErrorCount;
+    U16 dialysateTempPrimaryData;
+    U16 dialysateTempBackupData;
+} DG_FPGA_SENSORS_T;
+
+
+typedef struct  // TODO - add all sensor readings to this structure per FPGA register map
+{
     U08 bloodFlowMeterDataPktCount;
     U08 bloodFlowMeterSlowPktCounts;
     U08 bloodFlowMeterDeviceStatus;
@@ -141,9 +178,9 @@
 static g_dmaCTRL fpgaDMAReadRespControlRecord;
 
 // FPGA data
-static FPGA_HEADER_T    fpgaHeader;
-static FPGA_SENSORS_T   fpgaSensorReadings;
-static FPGA_ACTUATORS_T fpgaActuatorSetPoints;
+static FPGA_HEADER_T        fpgaHeader;
+static DG_FPGA_SENSORS_T   fpgaSensorReadings;
+static FPGA_ACTUATORS_T     fpgaActuatorSetPoints;
 
 // ********** private function prototypes **********
 
@@ -177,7 +214,7 @@
 {
     // initialize fpga data structures
     memset( &fpgaHeader, 0, sizeof(FPGA_HEADER_T) );
-    memset( &fpgaSensorReadings, 0, sizeof(FPGA_SENSORS_T) );
+    memset( &fpgaSensorReadings, 0, sizeof(DG_FPGA_SENSORS_T) );
     memset( &fpgaActuatorSetPoints, 0, sizeof(FPGA_ACTUATORS_T) );
 
     // initialize fpga comm buffers
@@ -556,7 +593,7 @@
     fpgaReadCmdBuffer[ 0 ] = FPGA_READ_CMD_CODE;
     fpgaReadCmdBuffer[ 1 ] = 0x08;    // start at FPGA address 0x108 (264)
     fpgaReadCmdBuffer[ 2 ] = 0x01;
-    fpgaReadCmdBuffer[ 3 ] = sizeof(FPGA_SENSORS_T);
+    fpgaReadCmdBuffer[ 3 ] = sizeof(DG_FPGA_SENSORS_T);
     crc = crc16( fpgaReadCmdBuffer, FPGA_READ_CMD_HDR_LEN );
     fpgaReadCmdBuffer[ 4 ] = GET_MSB_OF_WORD( crc );
     fpgaReadCmdBuffer[ 5 ] = GET_LSB_OF_WORD( crc );
@@ -565,7 +602,7 @@
     setupDMAForWriteResp( FPGA_WRITE_RSP_HDR_LEN + FPGA_CRC_LEN );
     // prep DMA for sending the bulk read cmd and receiving its response
     setupDMAForReadCmd( FPGA_READ_CMD_HDR_LEN + FPGA_CRC_LEN );
-    setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + sizeof( FPGA_SENSORS_T ) + FPGA_CRC_LEN );
+    setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + sizeof( DG_FPGA_SENSORS_T ) + FPGA_CRC_LEN );
     // set fpga comm flags for bulk write cmd and follow-up bulk read command
     fpgaWriteCommandInProgress = TRUE;
     fpgaBulkWriteAndReadInProgress = TRUE;
@@ -602,7 +639,7 @@
         // did FPGA Ack the read command?
         if ( fpgaReadResponseBuffer[ 0 ] == FPGA_READ_CMD_ACK )
         {
-            U32 rspSize = FPGA_READ_RSP_HDR_LEN + sizeof(FPGA_SENSORS_T);
+            U32 rspSize = FPGA_READ_RSP_HDR_LEN + sizeof(DG_FPGA_SENSORS_T);
             U32 crcPos = rspSize;
             U16 crc = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ crcPos ], fpgaReadResponseBuffer[ crcPos + 1 ] );
 
@@ -611,7 +648,7 @@
             {
                 fpgaCommRetryCount = 0;
                 // capture the read values
-                memcpy( &fpgaSensorReadings, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], sizeof( FPGA_SENSORS_T ) );
+                memcpy( &fpgaSensorReadings, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], sizeof( DG_FPGA_SENSORS_T ) );
                 result = FPGA_STATE_WRITE_ALL_ACTUATORS;
             }
             else // bad CRC
@@ -886,6 +923,62 @@
 }
 
 /*************************************************************************
+ * @brief getFPGALoadCellA1
+ * The getFPGALoadCellA1 function gets the latest load cell A 1 reading.
+ * @details
+ * Inputs : fpgaSensorReadings
+ * Outputs : none
+ * @param none
+ * @return last load cell A 1 reading
+ *************************************************************************/
+F32 getFPGALoadCellA1( void )
+{
+    return fpgaSensorReadings.LCA1;
+}
+
+/*************************************************************************
+ * @brief getFPGALoadCellA2
+ * The getFPGALoadCellA2 function gets the latest load cell A 2 reading.
+ * @details
+ * Inputs : fpgaSensorReadings
+ * Outputs : none
+ * @param none
+ * @return last load cell A 2 reading
+ *************************************************************************/
+F32 getFPGALoadCellA2( void )
+{
+    return fpgaSensorReadings.LCA2;
+}
+
+/*************************************************************************
+ * @brief getFPGALoadCellB1
+ * The getFPGALoadCellB1 function gets the latest load cell B 1 reading.
+ * @details
+ * Inputs : fpgaSensorReadings
+ * Outputs : none
+ * @param none
+ * @return last load cell B 1 reading
+ *************************************************************************/
+F32 getFPGALoadCellB1( void )
+{
+    return fpgaSensorReadings.LCB1;
+}
+
+/*************************************************************************
+ * @brief getFPGALoadCellB2
+ * The getFPGALoadCellB2 function gets the latest load cell B 2 reading.
+ * @details
+ * Inputs : fpgaSensorReadings
+ * Outputs : none
+ * @param none
+ * @return last load cell B 2 reading
+ *************************************************************************/
+F32 getFPGALoadCellB2( void )
+{
+    return fpgaSensorReadings.LCB2;
+}
+
+/*************************************************************************
  * @brief getFPGABloodFlow
  * The getFPGABloodFlow function gets the latest blood flow reading.
  * @details
Index: firmware/App/Services/SystemCommMessages.c
===================================================================
diff -u -r4d27576bdd7843178d9b69ffff3584ee01ec24fe -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/App/Services/SystemCommMessages.c	(.../SystemCommMessages.c)	(revision 4d27576bdd7843178d9b69ffff3584ee01ec24fe)
+++ firmware/App/Services/SystemCommMessages.c	(.../SystemCommMessages.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -51,6 +51,14 @@
 
 typedef struct
 {
+    F32 loadCellA1inGram;
+    F32 loadCellA2inGram;
+    F32 loadCellB1inGram;
+    F32 loadCellB2inGram;
+} LOAD_CELL_DATA_T;
+
+typedef struct
+{
     F32 res1PrimaryLoadCell;
     F32 res1BackupLoadCell;
     F32 res2PrimaryLoadCell;
@@ -322,6 +330,43 @@
     return result;
 }
 
+/*************************************************************************
+ * @brief
+ * The broadcastLoadCellData function sends out load cell data.
+ * @details
+ * Inputs : load cell data
+ * Outputs : load cell data msg constructed and queued
+ * @param loadCellA1 : load cell A 1 data in grams.
+ * @param loadCellA2 : load cell A 2 data in grams.
+ * @param loadCellB1 : load cell B 1 data in grams.
+ * @param loadCellB2 : load cell B 2 data in grams.
+ * @return TRUE if msg successfully queued for transmit, FALSE if not
+ *************************************************************************/
+BOOL broadcastLoadCellData( F32 loadCellA1, F32 loadCellA2, F32 loadCellB1, F32 loadCellB2 )
+{
+    BOOL result;
+    MESSAGE_T msg;
+    U08 *payloadPtr = msg.payload;
+    LOAD_CELL_DATA_T payload;
+
+    // create a message record
+    blankMessage( &msg );
+    msg.hdr.msgID = MSG_ID_LOAD_CELL_READINGS;
+    msg.hdr.payloadLen = sizeof( LOAD_CELL_DATA_T );
+
+    payload.loadCellA1inGram = loadCellA1;
+    payload.loadCellA2inGram = loadCellA2;
+    payload.loadCellB1inGram = loadCellB1;
+    payload.loadCellB2inGram = loadCellB2;
+
+    memcpy( payloadPtr, &payload, sizeof( LOAD_CELL_DATA_T ) );
+
+    // serialize the message (w/ sync, CRC, and appropriate CAN padding) and add serialized message data to appropriate comm buffer
+    result = serializeMessage( msg, COMM_BUFFER_OUT_CAN_DG_BROADCAST, ACK_NOT_REQUIRED );
+
+    return result;
+}
+
 #ifdef CAN_TEST
 void broadcastCANTest1LargeFrequentMessage()
 {
Index: firmware/App/Tasks/TaskPriority.c
===================================================================
diff -u -ra303cd4258157a8fbcbd8af4dd2bbaadec1a736c -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/App/Tasks/TaskPriority.c	(.../TaskPriority.c)	(revision a303cd4258157a8fbcbd8af4dd2bbaadec1a736c)
+++ firmware/App/Tasks/TaskPriority.c	(.../TaskPriority.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -33,6 +33,9 @@
     // 1st pass for FPGA
     execFPGAIn();
 
+    // Processing sensors data
+    execSensorProcess();
+
     // 2nd pass for FPGA
     execFPGAOut();
 
Index: firmware/DG.dil
===================================================================
diff -u -r36a2fa774e2f5721c30261a40360d706bb4ea4bb -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/DG.dil	(.../DG.dil)	(revision 36a2fa774e2f5721c30261a40360d706bb4ea4bb)
+++ firmware/DG.dil	(.../DG.dil)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -1,4 +1,4 @@
-# RM46L852PGE 02/05/20 16:29:48
+# RM46L852PGE 02/21/20 10:09:21
 # 
 ARCH=RM46L852PGE
 # 
@@ -1533,7 +1533,7 @@
 DRIVER.GIO.VAR.GIO_PORT0_BIT4_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT3_POL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT5_PULDIS.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT7_ENA.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT0_BIT7_ENA.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT3_PSL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT5_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT7_DIR.VALUE=0
@@ -1542,7 +1542,7 @@
 DRIVER.GIO.VAR.GIO_PORT0_BIT4_POL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT2_PULDIS.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT4_PSL.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT0_PULL.VALUE=2
+DRIVER.GIO.VAR.GIO_PORT0_BIT0_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT3_DOUT.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT5_LVL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT6_PDR.VALUE=0
@@ -1555,38 +1555,38 @@
 DRIVER.GIO.VAR.GIO_PORT0_BIT6_POL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT0_DOUT.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT6_PSL.VALUE=1
-DRIVER.GIO.VAR.GIO_PORT0_BIT1_PULL.VALUE=2
+DRIVER.GIO.VAR.GIO_PORT0_BIT1_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT4_DOUT.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT7_LVL.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT0_BIT7_LVL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT7_PULDIS.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT7_POL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT0_PULDIS.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT7_PSL.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT0_BIT7_PSL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT7_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT1_DOUT.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT2_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT1_PULDIS.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT5_DOUT.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT0_ENA.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT0_ENA.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT5_PULDIS.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT0_DIR.VALUE=1
+DRIVER.GIO.VAR.GIO_PORT1_BIT0_DIR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT2_DOUT.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT3_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT1_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT6_DOUT.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT1_DIR.VALUE=1
+DRIVER.GIO.VAR.GIO_PORT1_BIT1_DIR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT6_PULDIS.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT2_ENA.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT2_ENA.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT2_DIR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT0_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT0_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT3_PULDIS.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT3_DOUT.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT4_PULL.VALUE=1
-DRIVER.GIO.VAR.GIO_PORT1_BIT3_ENA.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT3_ENA.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT7_DOUT.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT3_DIR.VALUE=1
-DRIVER.GIO.VAR.GIO_PORT1_BIT0_LVL.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT3_DIR.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT0_LVL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT1_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT0_POL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT4_ENA.VALUE=0
@@ -1609,7 +1609,7 @@
 DRIVER.GIO.VAR.GIO_PORT0_BIT0_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT3_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT2_POL.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT0_DIR.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT0_BIT0_DIR.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT6_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT2_PSL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT6_DIR.VALUE=0
@@ -1618,19 +1618,19 @@
 DRIVER.GIO.VAR.GIO_PORT0_BIT1_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT4_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT3_POL.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULL.VALUE=2
-DRIVER.GIO.VAR.GIO_PORT0_BIT1_DIR.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULL.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT0_BIT1_DIR.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT5_DOUT.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT6_PULL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT7_ENA.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULDIS.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT2_PULDIS.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT3_PSL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT7_DIR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT4_LVL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT2_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT5_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT4_POL.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT2_DIR.VALUE=1
+DRIVER.GIO.VAR.GIO_PORT0_BIT2_DIR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT0_DOUT.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT6_PULDIS.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT1_BIT4_PSL.VALUE=0
@@ -1640,10 +1640,10 @@
 DRIVER.GIO.VAR.GIO_PORT0_BIT3_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT6_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT5_POL.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT1_BIT3_PULL.VALUE=0
+DRIVER.GIO.VAR.GIO_PORT1_BIT3_PULL.VALUE=1
 DRIVER.GIO.VAR.GIO_PORT0_BIT3_DIR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT6_DOUT.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT7_PULL.VALUE=1
+DRIVER.GIO.VAR.GIO_PORT0_BIT7_PULL.VALUE=2
 DRIVER.GIO.VAR.GIO_PORT0_BIT0_LVL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT5_PSL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT1_PDR.VALUE=0
@@ -1653,7 +1653,7 @@
 DRIVER.GIO.VAR.GIO_PORT0_BIT4_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT7_PDR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT6_POL.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT0_PSL.VALUE=1
+DRIVER.GIO.VAR.GIO_PORT0_BIT0_PSL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT4_DIR.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT0_PULDIS.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT1_DOUT.VALUE=0
@@ -1664,7 +1664,7 @@
 DRIVER.GIO.VAR.GIO_PORT1_BIT7_LVL.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT0_BIT5_ENA.VALUE=0
 DRIVER.GIO.VAR.GIO_PORT1_BIT7_POL.VALUE=0
-DRIVER.GIO.VAR.GIO_PORT0_BIT1_PSL.VALUE=1
+DRIVER.GIO.VAR.GIO_PORT0_BIT1_PSL.VALUE=0
 DRIVER.SCI.VAR.SCILIN_TIMMINGMODE.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PORT_BIT0_DIR.VALUE=0
 DRIVER.SCI.VAR.SCI_TIMMINGMODE.VALUE=1
@@ -1691,7 +1691,7 @@
 DRIVER.SCI.VAR.SCILIN_PEINTLVL.VALUE=0
 DRIVER.SCI.VAR.SCI_PORT_BIT1_FUN.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PORT_BIT0_PSL.VALUE=1
-DRIVER.SCI.VAR.SCI_OEINTENA.VALUE=1
+DRIVER.SCI.VAR.SCI_OEINTENA.VALUE=0
 DRIVER.SCI.VAR.SCILIN_PORT_BIT2_PDR.VALUE=1
 DRIVER.SCI.VAR.SCI_PORT_BIT1_PDR.VALUE=0
 DRIVER.SCI.VAR.SCI_PORT_BIT2_FUN.VALUE=1
@@ -1706,7 +1706,7 @@
 DRIVER.SCI.VAR.SCI_PORT_BIT2_PSL.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PORT_BIT2_PULDIS.VALUE=0
 DRIVER.SCI.VAR.SCI_PORT_BIT1_PULDIS.VALUE=0
-DRIVER.SCI.VAR.SCI_FEINTENA.VALUE=1
+DRIVER.SCI.VAR.SCI_FEINTENA.VALUE=0
 DRIVER.SCI.VAR.SCILIN_PORT_BIT0_DOUT.VALUE=0
 DRIVER.SCI.VAR.SCI_OEINTLVL.VALUE=0
 DRIVER.SCI.VAR.SCI_TXINTENA.VALUE=0
@@ -1860,7 +1860,7 @@
 DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT25_PSL.VALUE=1
 DRIVER.MIBSPI.VAR.MIBSPI1_TG1_BUF_DFSEL.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_C2TDELAY.VALUE=0
-DRIVER.MIBSPI.VAR.MIBSPI3_PORT_BIT5_FUN.VALUE=1
+DRIVER.MIBSPI.VAR.MIBSPI3_PORT_BIT5_FUN.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI3_TG0_TRGEVT.VALUE=TRG_ALWAYS
 DRIVER.MIBSPI.VAR.MIBSPI5_TG2_BUF_MODE.VALUE=4
 DRIVER.MIBSPI.VAR.MIBSPI5_RXINTENA.VALUE=0
@@ -2167,7 +2167,7 @@
 DRIVER.MIBSPI.VAR.MIBSPI1_PARITYENA0.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_C2EDELAY.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_PARITYENA1.VALUE=0
-DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT8_PULL.VALUE=1
+DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT8_PULL.VALUE=2
 DRIVER.MIBSPI.VAR.MIBSPI5_TG5_LENGTH.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_PARITYENA2.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_DLENERRLVL.VALUE=0
@@ -2228,7 +2228,7 @@
 DRIVER.MIBSPI.VAR.MIBSPI1_CHARLEN3.VALUE=16
 DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT11_FUN.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI3_TG2_LENGTH.VALUE=0
-DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT11_DIR.VALUE=0
+DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT11_DIR.VALUE=1
 DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT1_DIR.VALUE=1
 DRIVER.MIBSPI.VAR.MIBSPI1_BASE_PORT.VALUE=0xFFF7F418
 DRIVER.MIBSPI.VAR.MIBSPI1_TG3_BUF_LOCK.VALUE=0
@@ -2248,14 +2248,14 @@
 DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT8_PULL.VALUE=2
 DRIVER.MIBSPI.VAR.MIBSPI3_TG5_BUF_LOCK.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT11_PDR.VALUE=0
-DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT8_PSL.VALUE=0
+DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT8_PSL.VALUE=1
 DRIVER.MIBSPI.VAR.MIBSPI1_TG6_BUF_CSNR.VALUE=CS_6
 DRIVER.MIBSPI.VAR.MIBSPI1_TG1_ONESHOT.VALUE=1
 DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT9_PULL.VALUE=2
 DRIVER.MIBSPI.VAR.MIBSPI5_TG2_TRGEVT.VALUE=TRG_ALWAYS
 DRIVER.MIBSPI.VAR.MIBSPI5_MASTER.VALUE=1
 DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT10_FUN.VALUE=0
-DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT0_FUN.VALUE=1
+DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT0_FUN.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI3_TG5_BUF_MODE.VALUE=4
 DRIVER.MIBSPI.VAR.MIBSPI1_TG0_CS_ENCODE.VALUE=0xFF
 DRIVER.MIBSPI.VAR.MIBSPI5_TG6_BUF_DFSEL.VALUE=0
@@ -2294,7 +2294,7 @@
 DRIVER.MIBSPI.VAR.MIBSPI1_BAUDRATE1.VALUE=1000.000
 DRIVER.MIBSPI.VAR.MIBSPI5_PORT_BIT11_PULL.VALUE=2
 DRIVER.MIBSPI.VAR.MIBSPI3_TG6_TRGEVT.VALUE=TRG_ALWAYS
-DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT11_FUN.VALUE=1
+DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT11_FUN.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT1_FUN.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_TG6_BUF_CSHOLD_LASTBUF.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_BAUDRATE2.VALUE=1000.000
@@ -2477,7 +2477,7 @@
 DRIVER.MIBSPI.VAR.MIBSPI5_TG5_TRGEVT.VALUE=TRG_ALWAYS
 DRIVER.MIBSPI.VAR.MIBSPI5_TG3_BUF_CSHOLD_LASTBUF.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI5_WDELAY2.VALUE=0
-DRIVER.MIBSPI.VAR.MIBSPI3_PORT_BIT1_FUN.VALUE=1
+DRIVER.MIBSPI.VAR.MIBSPI3_PORT_BIT1_FUN.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT17_DIR.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI1_PORT_BIT25_DIR.VALUE=0
 DRIVER.MIBSPI.VAR.MIBSPI5_TG2_CS_ENCODE.VALUE=0xFF
@@ -4001,7 +4001,7 @@
 DRIVER.CAN.VAR.CAN_3_MESSAGE_8_INT_ENA.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_3_ENABLE.VALUE=1
 DRIVER.CAN.VAR.CAN_2_MESSAGE_59_MASK.VALUE=0x000007FF
-DRIVER.CAN.VAR.CAN_1_MESSAGE_10_INT_ENA.VALUE=0x00000400
+DRIVER.CAN.VAR.CAN_1_MESSAGE_10_INT_ENA.VALUE=0x00000800
 DRIVER.CAN.VAR.CAN_1_MESSAGE_3_ENA.VALUE=0x80000000
 DRIVER.CAN.VAR.CAN_1_PIN_MODE.VALUE=1
 DRIVER.CAN.VAR.CAN_2_MESSAGE_58_ID.VALUE=58
@@ -4574,7 +4574,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_35_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_27_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_19_RTR.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_4_ID.VALUE=0x8
+DRIVER.CAN.VAR.CAN_1_MESSAGE_4_ID.VALUE=0x08
 DRIVER.CAN.VAR.CAN_3_MESSAGE_40_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_32_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_24_DLC.VALUE=8
@@ -4853,7 +4853,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_45_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_37_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_29_RTR.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_8_ID.VALUE=0x100
+DRIVER.CAN.VAR.CAN_1_MESSAGE_8_ID.VALUE=0x200
 DRIVER.CAN.VAR.CAN_3_MESSAGE_50_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_42_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_34_DLC.VALUE=8
@@ -5213,7 +5213,7 @@
 DRIVER.CAN.VAR.CAN_3_MESSAGE_8_EOB.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_3_MESSAGE_8_DIR.VALUE=0x20000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_10_EOB.VALUE=0x00000080
-DRIVER.CAN.VAR.CAN_1_MESSAGE_10_DIR.VALUE=0x00000000
+DRIVER.CAN.VAR.CAN_1_MESSAGE_10_DIR.VALUE=0x20000000
 DRIVER.CAN.VAR.CAN_1_SAMPLE_POINT.VALUE=66.667
 DRIVER.CAN.VAR.CAN_2_MESSAGE_51_BOOL_ENA.VALUE=0
 DRIVER.CAN.VAR.CAN_2_MESSAGE_43_BOOL_ENA.VALUE=0
@@ -5677,7 +5677,7 @@
 DRIVER.ADC.VAR.ADC1_GROUP1_PIN4_ENABLE.VALUE=0x00000000
 DRIVER.ADC.VAR.ADC1_RAMBASE.VALUE=0xFF3E0000
 DRIVER.ADC.VAR.ADC1_BASE.VALUE=0xFFF7C000
-DRIVER.ADC.VAR.ADC1_PORT_BIT0_DIR.VALUE=0
+DRIVER.ADC.VAR.ADC1_PORT_BIT0_DIR.VALUE=1
 DRIVER.ADC.VAR.ADC2_RAM_PARITY_ENA.VALUE=0x00000005
 DRIVER.ADC.VAR.ADC2_GROUP2_HW_TRIGGER_SOURCE.VALUE=EVENT
 DRIVER.ADC.VAR.ADC2_GROUP2_ID_ENABLE.VALUE=0x00000000
@@ -5728,7 +5728,7 @@
 DRIVER.ADC.VAR.ADC1_GROUP1_PIN2_ENABLE.VALUE=0x00000000
 DRIVER.ADC.VAR.ADC1_GROUP1_CONVERSION_TIME.VALUE=3.271
 DRIVER.ADC.VAR.ADC1_GROUP0_FIFO_SIZE.VALUE=0
-DRIVER.ADC.VAR.ADC1_PORT_BIT0_PULL.VALUE=2
+DRIVER.ADC.VAR.ADC1_PORT_BIT0_PULL.VALUE=1
 DRIVER.ADC.VAR.ADC1_GROUP0_LENGTH.VALUE=0
 DRIVER.ADC.VAR.ADC2_GROUP1_CONVERSION_TIME.VALUE=1.300
 DRIVER.ADC.VAR.ADC1_GROUP0_PINS.VALUE=0
@@ -5743,7 +5743,7 @@
 DRIVER.ADC.VAR.ADC1_GROUP0_EXTENDED_SAMPLE_TIME.VALUE=503.22
 DRIVER.ADC.VAR.ADC1_GROUP0_HW_TRIGGER_SOURCE_ALT.VALUE=EVENT
 DRIVER.ADC.VAR.ADC2_GROUP1_PIN14_ENABLE.VALUE=0x00000000
-DRIVER.ADC.VAR.ADC1_PORT_BIT0_PSL.VALUE=1
+DRIVER.ADC.VAR.ADC1_PORT_BIT0_PSL.VALUE=0
 DRIVER.ADC.VAR.ADC1_GROUP2_EXTENDED_SAMPLE_TIME.VALUE=503.22
 DRIVER.ADC.VAR.ADC2_GROUP1_LENGTH.VALUE=16
 DRIVER.ADC.VAR.ADC1_GROUP1_HW_TRIGGER_SOURCE_ALT.VALUE=EVENT
@@ -5899,7 +5899,7 @@
 DRIVER.HET.VAR.HET2_BIT0_PULL.VALUE=2
 DRIVER.HET.VAR.HET2_INT_X0.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_EDGE4_BOTH.VALUE=0
-DRIVER.HET.VAR.HET1_BIT1_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT1_DIR.VALUE=0x00000002
 DRIVER.HET.VAR.HET2_BIT6_HRSHARE.VALUE=0x00000008
 DRIVER.HET.VAR.HET2_INT_X1.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM2_DUTY.VALUE=50
@@ -5922,7 +5922,7 @@
 DRIVER.HET.VAR.HET2_INT_X5.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_IGNORE_SUSPEND_ENABLE.VALUE=0x00020000
 DRIVER.HET.VAR.HET1_BIT30_PULDIS.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT26_HRSHARE.VALUE=0x00002000
+DRIVER.HET.VAR.HET1_BIT26_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT22_PULDIS.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT18_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT14_PULDIS.VALUE=0x00000000
@@ -5955,7 +5955,7 @@
 DRIVER.HET.VAR.HET1_BIT16_ANDSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_BIT5_PDR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT27_PSL.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT19_PSL.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT19_PSL.VALUE=0x00080000
 DRIVER.HET.VAR.HET2_EDGE6_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT24_PULL.VALUE=1
 DRIVER.HET.VAR.HET1_BIT16_PULL.VALUE=1
@@ -5998,7 +5998,7 @@
 DRIVER.HET.VAR.HET1_EDGE7_EVENT.VALUE=1
 DRIVER.HET.VAR.HET1_EDGE5_BOTH.VALUE=0
 DRIVER.HET.VAR.HET1_PWM5_DUTY_PRESCALER.VALUE=51968
-DRIVER.HET.VAR.HET1_BIT3_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT3_DIR.VALUE=0x00000008
 DRIVER.HET.VAR.HET2_EDGE7_POLARITY.VALUE=0
 DRIVER.HET.VAR.HET1_EDGE1_INTENA.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM3_DUTY.VALUE=50
@@ -6047,7 +6047,7 @@
 DRIVER.HET.VAR.HET2_PWM5_DUTY_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM4_ACTION.VALUE=3
 DRIVER.HET.VAR.HET1_BIT25_PULL.VALUE=1
-DRIVER.HET.VAR.HET1_BIT17_PULL.VALUE=1
+DRIVER.HET.VAR.HET1_BIT17_PULL.VALUE=2
 DRIVER.HET.VAR.HET1_BIT4_DIR.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_EDGE0_POLARITY.VALUE=0
 DRIVER.HET.VAR.HET1_CAP6_POLARITY.VALUE=0
@@ -6156,7 +6156,7 @@
 DRIVER.HET.VAR.HET2_PWM2_PERIOD_PRESCALER.VALUE=103296
 DRIVER.HET.VAR.HET2_EDGE3_POLARITY.VALUE=0
 DRIVER.HET.VAR.HET1_BIT3_PULDIS.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT2_HRSHARE.VALUE=0x00000002
+DRIVER.HET.VAR.HET1_BIT2_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_PWM6_PERIOD.VALUE=1000.000
 DRIVER.HET.VAR.HET2_BIT8_PSL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM1_ACTUALPERIOD.VALUE=1000.862
@@ -6231,7 +6231,7 @@
 DRIVER.HET.VAR.HET1_PWM3_PERIOD.VALUE=1000.000
 DRIVER.HET.VAR.HET2_PWM5_DUTY_PRESCALER.VALUE=51968
 DRIVER.HET.VAR.HET1_PWM1_PERIOD_PRESCALER.VALUE=103296
-DRIVER.HET.VAR.HET1_BIT10_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT10_DIR.VALUE=0x00000400
 DRIVER.HET.VAR.HET2_CAP4_POLARITY.VALUE=0
 DRIVER.HET.VAR.HET2_BIT8_XORSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_BIT4_PULDIS.VALUE=0x00000000
@@ -6242,7 +6242,7 @@
 DRIVER.HET.VAR.HET1_EDGE1_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM1_PERIOD_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT27_PULL.VALUE=1
-DRIVER.HET.VAR.HET1_BIT19_PULL.VALUE=1
+DRIVER.HET.VAR.HET1_BIT19_PULL.VALUE=2
 DRIVER.HET.VAR.HET1_BIT8_DIR.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_BIT14_XORSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_CAP6_PIN_SELECT.VALUE=4
@@ -6261,7 +6261,7 @@
 DRIVER.HET.VAR.HET2_EDGE3_PIN_SELECT.VALUE=6
 DRIVER.HET.VAR.HET2_PWM2_ACTUALPERIOD.VALUE=1000.862
 DRIVER.HET.VAR.HET2_BIT18_PSL.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT11_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT11_DIR.VALUE=0x00000800
 DRIVER.HET.VAR.HET1_BIT10_PULL.VALUE=1
 DRIVER.HET.VAR.HET2_EDGE1_INTENA.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_PWM7_PERIOD_INTENA.VALUE=0x00000000
@@ -6380,13 +6380,13 @@
 DRIVER.HET.VAR.HET1_EDGE0_BOTH.VALUE=0
 DRIVER.HET.VAR.HET1_BIT30_DIR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT22_DIR.VALUE=0x00400000
-DRIVER.HET.VAR.HET1_BIT14_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT14_DIR.VALUE=0x00004000
 DRIVER.HET.VAR.HET1_INT_X0.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_EDGE2_POLARITY.VALUE=0
 DRIVER.HET.VAR.HET2_PWM4_PERIOD_INTENA.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT28_PULDIS.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT0_ANDSHARE.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT0_HRSHARE.VALUE=0x00000001
+DRIVER.HET.VAR.HET1_BIT0_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_INT_X1.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_EDGE2_PIN_SELECT.VALUE=4
 DRIVER.HET.VAR.HET2_PWM2_PERIOD.VALUE=1000.000
@@ -6417,7 +6417,7 @@
 DRIVER.HET.VAR.HET2_BIT17_PULDIS.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_BIT2_ANDSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM6_POLARITY.VALUE=3
-DRIVER.HET.VAR.HET1_BIT30_HRSHARE.VALUE=0x00008000
+DRIVER.HET.VAR.HET1_BIT30_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT22_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT14_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_INT_X9.VALUE=0x00000000
@@ -6429,10 +6429,10 @@
 DRIVER.HET.VAR.HET1_BIT11_PSL.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_PWM2_DUTYTIME.VALUE=501.669
 DRIVER.HET.VAR.HET2_PWM0_DUTY_LVL.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT31_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT31_DIR.VALUE=0x80000000
 DRIVER.HET.VAR.HET1_BIT23_DIR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT20_PULL.VALUE=1
-DRIVER.HET.VAR.HET1_BIT15_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT15_DIR.VALUE=0x00008000
 DRIVER.HET.VAR.HET1_BIT12_PULL.VALUE=1
 DRIVER.HET.VAR.HET2_PWM4_DUTY.VALUE=50
 DRIVER.HET.VAR.HET2_BIT18_HRSHARE.VALUE=0x00000000
@@ -6444,7 +6444,7 @@
 DRIVER.HET.VAR.HET1_PWM6_PERIOD.VALUE=1000.000
 DRIVER.HET.VAR.HET1_BIT31_DOUT.VALUE=0
 DRIVER.HET.VAR.HET1_BIT23_DOUT.VALUE=0
-DRIVER.HET.VAR.HET1_BIT15_DOUT.VALUE=0
+DRIVER.HET.VAR.HET1_BIT15_DOUT.VALUE=1
 DRIVER.HET.VAR.HET1_BIT9_PSL.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_BIT6_PULL.VALUE=1
 DRIVER.HET.VAR.HET1_EDGE6_LVL.VALUE=0x00000000
@@ -6501,7 +6501,7 @@
 DRIVER.HET.VAR.HET2_EDGE3_BOTH.VALUE=0
 DRIVER.HET.VAR.HET1_PWM1_DUTY_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM2_PERIOD_INTENA.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT28_HRSHARE.VALUE=0x00004000
+DRIVER.HET.VAR.HET1_BIT28_HRSHARE.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT26_PULDIS.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT18_PULDIS.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_CAP4_PIN_SELECT.VALUE=0
@@ -6514,7 +6514,7 @@
 DRIVER.HET.VAR.HET1_PWM3_ACTION.VALUE=3
 DRIVER.HET.VAR.HET1_BIT25_DIR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT21_PULL.VALUE=1
-DRIVER.HET.VAR.HET1_BIT17_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT17_DIR.VALUE=0x00020000
 DRIVER.HET.VAR.HET1_BIT13_PULL.VALUE=1
 DRIVER.HET.VAR.HET2_PWM5_DUTY.VALUE=50
 DRIVER.HET.VAR.HET2_PWM1_PERIOD_INTENA.VALUE=0x00000000
@@ -6547,7 +6547,7 @@
 DRIVER.HET.VAR.HET2_BIT0_PDR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM4_PERIOD.VALUE=1000.000
 DRIVER.HET.VAR.HET1_BIT30_PSL.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT22_PSL.VALUE=0x00400000
+DRIVER.HET.VAR.HET1_BIT22_PSL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT14_PSL.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_EDGE1_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_PWM7_PERIOD_LVL.VALUE=0x00000000
@@ -6590,14 +6590,14 @@
 DRIVER.HET.VAR.HET2_BIT1_PDR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT31_PSL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT23_PSL.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT15_PSL.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT15_PSL.VALUE=0x00008000
 DRIVER.HET.VAR.HET1_PWM6_DUTYTIME.VALUE=501.669
 DRIVER.HET.VAR.HET2_EDGE2_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM4_DUTY_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT30_PULL.VALUE=1
 DRIVER.HET.VAR.HET1_BIT27_DIR.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT22_PULL.VALUE=2
-DRIVER.HET.VAR.HET1_BIT19_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT22_PULL.VALUE=1
+DRIVER.HET.VAR.HET1_BIT19_DIR.VALUE=0x00080000
 DRIVER.HET.VAR.HET1_BIT14_PULL.VALUE=1
 DRIVER.HET.VAR.HET2_EDGE2_INTENA.VALUE=0x00000000
 DRIVER.HET.VAR.HET2_PWM6_DUTY.VALUE=50
@@ -6640,7 +6640,7 @@
 DRIVER.HET.VAR.HET1_EDGE6_EVENT.VALUE=1
 DRIVER.HET.VAR.HET1_EDGE3_BOTH.VALUE=0
 DRIVER.HET.VAR.HET1_PWM6_PERIOD_PRESCALER.VALUE=103296
-DRIVER.HET.VAR.HET1_BIT28_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT28_DIR.VALUE=0x10000000
 DRIVER.HET.VAR.HET2_BIT13_PULDIS.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_PWM5_POLARITY.VALUE=3
 DRIVER.HET.VAR.HET1_PWM1_DUTY.VALUE=50
@@ -6676,13 +6676,13 @@
 DRIVER.HET.VAR.HET2_PWM7_ACTUALPERIOD.VALUE=1000.862
 DRIVER.HET.VAR.HET2_BIT3_PDR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT25_PSL.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT17_PSL.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT17_PSL.VALUE=0x00020000
 DRIVER.HET.VAR.HET2_EDGE4_LVL.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT31_PULL.VALUE=1
 DRIVER.HET.VAR.HET1_BIT29_DIR.VALUE=0x00000000
 DRIVER.HET.VAR.HET1_BIT23_PULL.VALUE=1
-DRIVER.HET.VAR.HET1_BIT15_PULL.VALUE=1
-DRIVER.HET.VAR.HET1_BIT0_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT15_PULL.VALUE=2
+DRIVER.HET.VAR.HET1_BIT0_DIR.VALUE=0x00000001
 DRIVER.HET.VAR.HET2_CAP2_POLARITY.VALUE=0
 DRIVER.HET.VAR.HET2_PWM7_DUTY.VALUE=50
 DRIVER.HET.VAR.HET2_BIT6_XORSHARE.VALUE=0x00000000
@@ -7112,8 +7112,8 @@
 DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_2.VALUE=0
 DRIVER.PINMUX.VAR.MUX61_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX53_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX45_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX37_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX45_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX37_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX29_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX7_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.DMA_EIDXS_29.VALUE=0
@@ -7125,7 +7125,7 @@
 DRIVER.PINMUX.VAR.MUX53_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX45_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX37_OPTION1.VALUE=0
-DRIVER.PINMUX.VAR.MUX29_OPTION1.VALUE=1
+DRIVER.PINMUX.VAR.MUX29_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX7_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.DMA_FIDXD_30.VALUE=0
 DRIVER.PINMUX.VAR.DMA_FIDXD_22.VALUE=0
@@ -7141,7 +7141,7 @@
 DRIVER.PINMUX.VAR.MUX42_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.MUX37_OPTION2.VALUE=0
 DRIVER.PINMUX.VAR.MUX34_CONFLICT.VALUE=0
-DRIVER.PINMUX.VAR.MUX29_OPTION2.VALUE=0
+DRIVER.PINMUX.VAR.MUX29_OPTION2.VALUE=1
 DRIVER.PINMUX.VAR.MUX26_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.MUX18_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_FIDXD_31.VALUE=0
@@ -7209,7 +7209,7 @@
 DRIVER.PINMUX.VAR.DMA_INTLFSEN_12.VALUE=1
 DRIVER.PINMUX.VAR.MUX30_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX22_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX14_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX14_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.DMA_FIDXD_29.VALUE=0
 DRIVER.PINMUX.VAR.DMA_IFT_COUNT_25.VALUE=0
 DRIVER.PINMUX.VAR.DMA_IFT_COUNT_17.VALUE=0
@@ -7272,13 +7272,13 @@
 DRIVER.PINMUX.VAR.DMA_ENABLEINT_4.VALUE=1
 DRIVER.PINMUX.VAR.PINMUX10.VALUE=PINMUX_PIN_86_AD1EVT
 DRIVER.PINMUX.VAR.MUX11_CONFLICT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_11_SELECT.VALUE=2
+DRIVER.PINMUX.VAR.PIN_MUX_11_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_PRITY_11.VALUE=FIXED
 DRIVER.PINMUX.VAR.DMA_CHPR_10_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_PRITY_1_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.PINMUX11.VALUE=PINMUX_PIN_91_HET1_24
 DRIVER.PINMUX.VAR.DMA_PRITY_12.VALUE=FIXED
-DRIVER.PINMUX.VAR.PINMUX20.VALUE=PINMUX_PIN_130_MIBSPI1NCS_1
+DRIVER.PINMUX.VAR.PINMUX20.VALUE=PINMUX_PIN_130_HET1_17
 DRIVER.PINMUX.VAR.PINMUX12.VALUE="PINMUX_PIN_92_HET1_26 | PINMUX_PIN_96_MIBSPI1NENA | PINMUX_PIN_97_MIBSPI5NENA"
 DRIVER.PINMUX.VAR.DMA_PRITY_13.VALUE=FIXED
 DRIVER.PINMUX.VAR.PINMUX21.VALUE=PINMUX_PIN_133_GIOB_1
@@ -7295,9 +7295,9 @@
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_3_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_PRITY_15.VALUE=FIXED
 DRIVER.PINMUX.VAR.DMA_PRITY_16.VALUE=FIXED
-DRIVER.PINMUX.VAR.PINMUX33.VALUE="PINMUX_PIN_36_HET1_04 | PINMUX_PIN_51_MIBSPI3SOMI | PINMUX_PIN_52_MIBSPI3SIMO | PINMUX_PIN_53_MIBSPI3CLK"
+DRIVER.PINMUX.VAR.PINMUX33.VALUE="PINMUX_PIN_36_ETPWM4B | PINMUX_PIN_51_MIBSPI3SOMI | PINMUX_PIN_52_MIBSPI3SIMO | PINMUX_PIN_53_MIBSPI3CLK"
 DRIVER.PINMUX.VAR.PINMUX17.VALUE="PINMUX_PIN_118_HET1_10 | PINMUX_PIN_124_HET1_12"
-DRIVER.PINMUX.VAR.PINMUX34.VALUE="PINMUX_PIN_139_HET1_16 | PINMUX_PIN_140_ETPWM6A | PINMUX_PIN_141_HET1_20"
+DRIVER.PINMUX.VAR.PINMUX34.VALUE="PINMUX_PIN_139_HET1_16 | PINMUX_PIN_140_ETPWM6A | PINMUX_PIN_141_ETPWM6B"
 DRIVER.PINMUX.VAR.PINMUX18.VALUE="PINMUX_PIN_125_HET1_14 | PINMUX_PIN_126_GIOB_0"
 DRIVER.PINMUX.VAR.DMA_ADDMR_26_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_CHANNEL_20_VALUE.VALUE=0x0001
@@ -7402,12 +7402,12 @@
 DRIVER.PINMUX.VAR.MUX75_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX67_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX59_OPTION4.VALUE=0
-DRIVER.PINMUX.VAR.MUX6_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX6_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.DMA_CHANNEL_29.VALUE=CHANNEL0
 DRIVER.PINMUX.VAR.DMA_FIDXS_7.VALUE=0
 DRIVER.PINMUX.VAR.DMA_AIM_7.VALUE=ENABLED
 DRIVER.PINMUX.VAR.MUX59_OPTION5.VALUE=0
-DRIVER.PINMUX.VAR.MUX6_OPTION1.VALUE=1
+DRIVER.PINMUX.VAR.MUX6_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.DMA_FIDXS_8.VALUE=0
 DRIVER.PINMUX.VAR.DMA_AIM_8.VALUE=ENABLED
 DRIVER.PINMUX.VAR.MUX6_OPTION2.VALUE=0
@@ -7422,8 +7422,8 @@
 DRIVER.PINMUX.VAR.MUX6_OPTION3.VALUE=0
 DRIVER.PINMUX.VAR.MUX60_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX52_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX44_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX36_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX44_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX36_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX28_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX6_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX60_OPTION1.VALUE=0
@@ -7481,7 +7481,7 @@
 DRIVER.PINMUX.VAR.PIN_MUX_94_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_86_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_78_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_3_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_3_SELECT.VALUE=1
 DRIVER.PINMUX.VAR.DMA_TTYPE_31.VALUE=FRAME_TRANSFER
 DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_31.VALUE=0
 DRIVER.PINMUX.VAR.DMA_TTYPE_23.VALUE=FRAME_TRANSFER
@@ -7498,7 +7498,7 @@
 DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_16.VALUE=0
 DRIVER.PINMUX.VAR.DMA_STADD_2.VALUE=0
 DRIVER.PINMUX.VAR.MUX21_OPTION0.VALUE=1
-DRIVER.PINMUX.VAR.MUX13_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX13_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.DMA_TTYPE_25.VALUE=FRAME_TRANSFER
 DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_25.VALUE=0
 DRIVER.PINMUX.VAR.DMA_TTYPE_17.VALUE=FRAME_TRANSFER
@@ -7519,7 +7519,7 @@
 DRIVER.PINMUX.VAR.PIN_MUX_71_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_63_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_55_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_47_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_47_SELECT.VALUE=1
 DRIVER.PINMUX.VAR.PIN_MUX_39_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_TTYPE_27.VALUE=FRAME_TRANSFER
 DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_27.VALUE=0
@@ -7544,8 +7544,8 @@
 DRIVER.PINMUX.VAR.MUX79_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_40_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_32_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_24_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_16_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_24_SELECT.VALUE=1
+DRIVER.PINMUX.VAR.PIN_MUX_16_SELECT.VALUE=3
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_27_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_ADDMW_24_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_19_VALUE.VALUE=0x0001
@@ -7668,14 +7668,14 @@
 DRIVER.PINMUX.VAR.DMA_ADDMW_6.VALUE=CONSTANT
 DRIVER.PINMUX.VAR.DMA_INTFTCEN_2.VALUE=1
 DRIVER.PINMUX.VAR.MUX51_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX43_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX35_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX43_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX35_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX27_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX19_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX5_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMW_7.VALUE=CONSTANT
 DRIVER.PINMUX.VAR.DMA_INTFTCEN_3.VALUE=1
-DRIVER.PINMUX.VAR.MUX51_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX51_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.MUX43_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX35_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX27_OPTION1.VALUE=0
@@ -7737,16 +7737,16 @@
 DRIVER.PINMUX.VAR.DMA_INTMP_2_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_INTEN_16.VALUE=1
 DRIVER.PINMUX.VAR.MUX20_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX12_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX20_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX12_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX20_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.MUX12_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX20_OPTION2.VALUE=0
 DRIVER.PINMUX.VAR.MUX12_OPTION2.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_61_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_53_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_45_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_37_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_29_SELECT.VALUE=1
+DRIVER.PINMUX.VAR.PIN_MUX_29_SELECT.VALUE=2
 DRIVER.PINMUX.VAR.DMA_TTYPE_7_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.MUX20_OPTION3.VALUE=0
 DRIVER.PINMUX.VAR.MUX12_OPTION3.VALUE=0
@@ -7872,7 +7872,7 @@
 DRIVER.PINMUX.VAR.MUX73_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX65_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX57_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX49_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX49_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.DMA_FIDXS_25.VALUE=0
 DRIVER.PINMUX.VAR.DMA_AIM_25.VALUE=ENABLED
 DRIVER.PINMUX.VAR.DMA_FIDXS_17.VALUE=0
@@ -7926,7 +7926,7 @@
 DRIVER.PINMUX.VAR.DMA_IFT_COUNT_3.VALUE=0
 DRIVER.PINMUX.VAR.MUX57_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.MUX49_OPTION5.VALUE=0
-DRIVER.PINMUX.VAR.MUX4_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX4_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.DMA_IFT_COUNT_4.VALUE=0
 DRIVER.PINMUX.VAR.DMA_BYP_10.VALUE=1
 DRIVER.PINMUX.VAR.ECAP.VALUE=0
@@ -7943,8 +7943,8 @@
 DRIVER.PINMUX.VAR.DMA_BYP_12.VALUE=1
 DRIVER.PINMUX.VAR.DMA_INTBTCEN_2.VALUE=1
 DRIVER.PINMUX.VAR.MUX50_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX42_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX34_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX42_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX34_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX26_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX18_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX4_OPTION4.VALUE=0
@@ -7967,7 +7967,7 @@
 DRIVER.PINMUX.VAR.MUX18_OPTION2.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_97_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_89_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_6_SELECT.VALUE=1
+DRIVER.PINMUX.VAR.PIN_MUX_6_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMR_31_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_ADDMR_23_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_ADDMR_15_VALUE.VALUE=0x0001
@@ -8009,14 +8009,14 @@
 DRIVER.PINMUX.VAR.DMA_TRIG_6_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_PRITY_5.VALUE=FIXED
 DRIVER.PINMUX.VAR.DMA_PRITY_6.VALUE=FIXED
-DRIVER.PINMUX.VAR.MUX11_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX11_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.DMA_PRITY_7.VALUE=FIXED
 DRIVER.PINMUX.VAR.MUX11_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.DMA_PRITY_8.VALUE=FIXED
 DRIVER.PINMUX.VAR.MUX21_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.MUX13_CONFLICT.VALUE=0
-DRIVER.PINMUX.VAR.MUX11_OPTION2.VALUE=1
-DRIVER.PINMUX.VAR.PIN_MUX_51_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.MUX11_OPTION2.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_51_SELECT.VALUE=1
 DRIVER.PINMUX.VAR.PIN_MUX_43_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_35_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_27_SELECT.VALUE=0
@@ -8032,7 +8032,7 @@
 DRIVER.PINMUX.VAR.MUX94_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.MUX86_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.MUX78_CONFLICT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_20_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_20_SELECT.VALUE=1
 DRIVER.PINMUX.VAR.PIN_MUX_12_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_11_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_ADDMR_0_VALUE.VALUE=0x0001
@@ -8102,7 +8102,7 @@
 DRIVER.PINMUX.VAR.MUX72_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX64_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX56_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX48_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX48_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_21.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_13.VALUE=0
 DRIVER.PINMUX.VAR.HET1.VALUE=0
@@ -8153,7 +8153,7 @@
 DRIVER.PINMUX.VAR.DMA_INTEN_3.VALUE=1
 DRIVER.PINMUX.VAR.MUX56_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.MUX48_OPTION5.VALUE=0
-DRIVER.PINMUX.VAR.MUX3_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX3_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.DMA_EIDXD_30.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_26.VALUE=0
 DRIVER.PINMUX.VAR.DMA_EIDXD_22.VALUE=0
@@ -8183,9 +8183,9 @@
 DRIVER.PINMUX.VAR.DMA_ADDMR_12.VALUE=CONSTANT
 DRIVER.PINMUX.VAR.DMA_INTEN_6.VALUE=1
 DRIVER.PINMUX.VAR.EMIF.VALUE=0
-DRIVER.PINMUX.VAR.MUX41_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX33_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX25_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX41_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX33_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX25_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX17_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX3_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CP0_ISADDR_29.VALUE=0
@@ -8219,7 +8219,7 @@
 DRIVER.PINMUX.VAR.PIN_MUX_95_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_87_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_79_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_4_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_4_SELECT.VALUE=1
 DRIVER.PINMUX.VAR.DMA_ADDMR_31.VALUE=CONSTANT
 DRIVER.PINMUX.VAR.DMA_EIDXD_27.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMR_23.VALUE=CONSTANT
@@ -8283,7 +8283,7 @@
 DRIVER.PINMUX.VAR.DMA_IET_COUNT_16.VALUE=0
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_12.VALUE=8BIT
 DRIVER.PINMUX.VAR.GIOB.VALUE=0
-DRIVER.PINMUX.VAR.MUX10_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX10_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMR_29.VALUE=CONSTANT
 DRIVER.PINMUX.VAR.DMA_IET_COUNT_25.VALUE=0
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_21.VALUE=8BIT
@@ -8296,7 +8296,7 @@
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_22.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_IET_COUNT_18.VALUE=0
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_14.VALUE=8BIT
-DRIVER.PINMUX.VAR.MUX10_OPTION2.VALUE=0
+DRIVER.PINMUX.VAR.MUX10_OPTION2.VALUE=1
 DRIVER.PINMUX.VAR.PIN_MUX_41_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_33_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_25_SELECT.VALUE=0
@@ -8323,7 +8323,7 @@
 DRIVER.PINMUX.VAR.MUX10_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_26.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_18.VALUE=8BIT
-DRIVER.PINMUX.VAR.PIN_MUX_10_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_10_SELECT.VALUE=2
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_27.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_WRITE_ELSIZE_19.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_BYP_1.VALUE=1
@@ -8380,11 +8380,11 @@
 DRIVER.PINMUX.VAR.MUX94_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX86_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX78_OPTION4.VALUE=0
-DRIVER.PINMUX.VAR.MUX9_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX9_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX9_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.DMA_EIDXD_0.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CHPR_10.VALUE=HIGH
-DRIVER.PINMUX.VAR.MUX9_OPTION2.VALUE=1
+DRIVER.PINMUX.VAR.MUX9_OPTION2.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_101_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_20_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_12_VALUE.VALUE=0x0001
@@ -8400,14 +8400,14 @@
 DRIVER.PINMUX.VAR.MUX63_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX55_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX47_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX39_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX39_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX9_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.DMA_EIDXD_3.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CHPR_13.VALUE=HIGH
 DRIVER.PINMUX.VAR.MUX71_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX63_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX55_OPTION1.VALUE=0
-DRIVER.PINMUX.VAR.MUX47_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX47_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.MUX39_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX9_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMW_10.VALUE=CONSTANT
@@ -8466,7 +8466,7 @@
 DRIVER.PINMUX.VAR.DMA_IET_COUNT_4.VALUE=0
 DRIVER.PINMUX.VAR.DMA_TRIG_10.VALUE=HARDWARE_TRIGGER
 DRIVER.PINMUX.VAR.MUX2_OPTION2.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_9_SELECT.VALUE=2
+DRIVER.PINMUX.VAR.PIN_MUX_9_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMW_31.VALUE=CONSTANT
 DRIVER.PINMUX.VAR.DMA_CHANNEL_31_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_ADDMR_29_VALUE.VALUE=0x0001
@@ -8486,7 +8486,7 @@
 DRIVER.PINMUX.VAR.DMA_IET_COUNT_6.VALUE=0
 DRIVER.PINMUX.VAR.DMA_TRIG_12.VALUE=HARDWARE_TRIGGER
 DRIVER.PINMUX.VAR.MUX40_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX32_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX32_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX24_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX16_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX2_OPTION4.VALUE=0
@@ -8496,7 +8496,7 @@
 DRIVER.PINMUX.VAR.DMA_TRIG_13.VALUE=HARDWARE_TRIGGER
 DRIVER.PINMUX.VAR.MUX40_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX32_OPTION1.VALUE=0
-DRIVER.PINMUX.VAR.MUX24_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX24_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.MUX16_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX2_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMW_26.VALUE=CONSTANT
@@ -8523,7 +8523,7 @@
 DRIVER.PINMUX.VAR.MUX40_OPTION3.VALUE=0
 DRIVER.PINMUX.VAR.MUX32_OPTION3.VALUE=0
 DRIVER.PINMUX.VAR.MUX24_OPTION3.VALUE=0
-DRIVER.PINMUX.VAR.MUX16_OPTION3.VALUE=0
+DRIVER.PINMUX.VAR.MUX16_OPTION3.VALUE=1
 DRIVER.PINMUX.VAR.DMA_ADDMW_28.VALUE=CONSTANT
 DRIVER.PINMUX.VAR.DMA_TRIG_16.VALUE=HARDWARE_TRIGGER
 DRIVER.PINMUX.VAR.DMA_INTFTCEN_12.VALUE=1
@@ -8691,8 +8691,8 @@
 DRIVER.PINMUX.VAR.MUX70_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX62_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX54_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX46_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX38_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX46_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX38_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX8_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX70_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX62_OPTION1.VALUE=0
@@ -8719,7 +8719,7 @@
 DRIVER.PINMUX.VAR.MUX54_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX46_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX38_OPTION4.VALUE=0
-DRIVER.PINMUX.VAR.MUX1_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX1_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX62_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.MUX54_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.MUX46_OPTION5.VALUE=0
@@ -8732,7 +8732,7 @@
 DRIVER.PINMUX.VAR.DMA_ADDMR_17_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_CHANNEL_11_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.MUX1_OPTION3.VALUE=0
-DRIVER.PINMUX.VAR.MUX31_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX31_OPTION0.VALUE=1
 DRIVER.PINMUX.VAR.MUX23_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX15_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX1_OPTION4.VALUE=0
@@ -8827,10 +8827,10 @@
 DRIVER.PINMUX.VAR.RMII.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CHAS_16.VALUE=0
 DRIVER.PINMUX.VAR.DMA_INTLFSEN_6.VALUE=1
-DRIVER.PINMUX.VAR.PINMUX0.VALUE="PINMUX_PIN_1_GIOB_3 | PINMUX_PIN_2_GIOA_0 | PINMUX_PIN_3_MIBSPI3NCS_3 | PINMUX_PIN_4_MIBSPI3NCS_2"
+DRIVER.PINMUX.VAR.PINMUX0.VALUE="PINMUX_PIN_1_GIOB_3 | PINMUX_PIN_2_GIOA_0 | PINMUX_PIN_3_I2C_SCL | PINMUX_PIN_4_I2C_SDA"
 DRIVER.PINMUX.VAR.MUX99_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.DMA_INTLFSEN_7.VALUE=1
-DRIVER.PINMUX.VAR.PINMUX1.VALUE="PINMUX_PIN_5_GIOA_1 | PINMUX_PIN_6_MIBSPI3NCS_4"
+DRIVER.PINMUX.VAR.PINMUX1.VALUE="PINMUX_PIN_5_GIOA_1 | PINMUX_PIN_6_HET1_11"
 DRIVER.PINMUX.VAR.MUX99_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_10.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_INTLFSEN_8.VALUE=1
@@ -8846,17 +8846,17 @@
 DRIVER.PINMUX.VAR.DMA_INTLFSEN_9.VALUE=1
 DRIVER.PINMUX.VAR.DMA_INTMP_5_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_ACC_1_VALUE.VALUE=0x0001
-DRIVER.PINMUX.VAR.PINMUX3.VALUE="PINMUX_PIN_15_W2FC_SE0O | PINMUX_PIN_16_GIOA_6"
+DRIVER.PINMUX.VAR.PINMUX3.VALUE="PINMUX_PIN_15_HET1_22 | PINMUX_PIN_16_ETPWM1B"
 DRIVER.PINMUX.VAR.MUX99_OPTION3.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_20.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_12.VALUE=8BIT
 DRIVER.PINMUX.VAR.ETPWM4_EQEPERR12.VALUE=EQEPERR12
-DRIVER.PINMUX.VAR.PINMUX4.VALUE="PINMUX_PIN_22_ETPWM2A | PINMUX_PIN_23_HET1_01 | PINMUX_PIN_24_HET1_03"
+DRIVER.PINMUX.VAR.PINMUX4.VALUE="PINMUX_PIN_22_GIOA_7 | PINMUX_PIN_23_HET1_01 | PINMUX_PIN_24_HET1_03"
 DRIVER.PINMUX.VAR.MUX101_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX99_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_21.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_13.VALUE=8BIT
-DRIVER.PINMUX.VAR.PINMUX5.VALUE="PINMUX_PIN_25_HET1_0 | PINMUX_PIN_30_ETPWM3A | PINMUX_PIN_31_HET1_05"
+DRIVER.PINMUX.VAR.PINMUX5.VALUE="PINMUX_PIN_25_HET1_0 | PINMUX_PIN_30_ETPWM3A | PINMUX_PIN_31_ETPWM3B"
 DRIVER.PINMUX.VAR.MUX101_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_30.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_22.VALUE=8BIT
@@ -8881,7 +8881,7 @@
 DRIVER.PINMUX.VAR.DMA_EIDXS_12.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CHANNEL_2.VALUE=CHANNEL0
 DRIVER.PINMUX.VAR.ALT_ADC_B.VALUE=0
-DRIVER.PINMUX.VAR.PINMUX8.VALUE="PINMUX_PIN_39_SCITX | PINMUX_PIN_40_MIBSPI1NCS_2 | PINMUX_PIN_41_HET1_15"
+DRIVER.PINMUX.VAR.PINMUX8.VALUE="PINMUX_PIN_39_SCITX | PINMUX_PIN_40_HET1_19 | PINMUX_PIN_41_HET1_15"
 DRIVER.PINMUX.VAR.MUX101_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX92_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX84_OPTION0.VALUE=0
@@ -8892,7 +8892,7 @@
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_17.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_EIDXS_13.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CHANNEL_3.VALUE=CHANNEL0
-DRIVER.PINMUX.VAR.PINMUX9.VALUE="PINMUX_PIN_54_MIBSPI3NCS_5 | PINMUX_PIN_55_MIBSPI3NCS_0"
+DRIVER.PINMUX.VAR.PINMUX9.VALUE="PINMUX_PIN_54_HET1_31 | PINMUX_PIN_55_MIBSPI3NCS_0"
 DRIVER.PINMUX.VAR.MUX92_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX84_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX76_OPTION1.VALUE=0
@@ -9380,7 +9380,7 @@
 DRIVER.ETPWM.VAR.ETPWM2_PWMB_POLARITY.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM1_OSHT1.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM1_OSHT2.VALUE=0x0000
-DRIVER.ETPWM.VAR.ETPWM1_PWMA_DEADBAND_OUT.VALUE=1
+DRIVER.ETPWM.VAR.ETPWM1_PWMA_DEADBAND_OUT.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM4_ENABLE_SOCA.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM1_OSHT3.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM4_ENABLE_SOCB.VALUE=0x0000
@@ -9413,7 +9413,7 @@
 DRIVER.ETPWM.VAR.ETPWM6_OSHT1.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM2_PWMA_RISING_EDGE_DELAY_REG.VALUE=1
 DRIVER.ETPWM.VAR.ETPWM6_OSHT2.VALUE=0x0000
-DRIVER.ETPWM.VAR.ETPWM6_PWMA_DEADBAND_OUT.VALUE=1
+DRIVER.ETPWM.VAR.ETPWM6_PWMA_DEADBAND_OUT.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM1_SOCB_PERIOD.VALUE=1
 DRIVER.ETPWM.VAR.ETPWM6_OSHT3.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM5_PWMB_DUTYTIME.VALUE=503.218
@@ -9625,7 +9625,7 @@
 DRIVER.ETPWM.VAR.ETPWM4_PWMB_ENA.VALUE=1
 DRIVER.ETPWM.VAR.ETPWM3_OSHT5.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM3_HSPCLKDIV_REG.VALUE=0
-DRIVER.ETPWM.VAR.ETPWM4_PWMA_DEADBAND_OUT.VALUE=1
+DRIVER.ETPWM.VAR.ETPWM4_PWMA_DEADBAND_OUT.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM3_OSHT6.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM1_TB_ACTUALFREQUENCY.VALUE=103.335
 DRIVER.ETPWM.VAR.ETPWM5_CLKDIV.VALUE=0
@@ -9731,7 +9731,7 @@
 DRIVER.ETPWM.VAR.ETPWM2_PWMB_DUTY.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM5_PWMB_PERIOD.VALUE=1000
 DRIVER.ETPWM.VAR.ETPWM4_DEADBAND_INPUT.VALUE=PWMA_RED_FED
-DRIVER.ETPWM.VAR.ETPWM3_PWMA_DEADBAND_OUT.VALUE=1
+DRIVER.ETPWM.VAR.ETPWM3_PWMA_DEADBAND_OUT.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM6_PWMB_RISING_EDGE_DELAY.VALUE=9.091
 DRIVER.ETPWM.VAR.ETPWM4_BASE.VALUE=0xFCF78F00
 DRIVER.ETPWM.VAR.ETPWM3_PWMA_FALLING_EDGE_DELAY.VALUE=9.091
@@ -9867,7 +9867,7 @@
 DRIVER.ETPWM.VAR.ETPWM5_OSHT6.VALUE=0x0000
 DRIVER.ETPWM.VAR.ETPWM7_OSHT_ACTUAL_WIDTH.VALUE=77.418
 DRIVER.ETPWM.VAR.ETPWM6_CLKDIV.VALUE=0
-DRIVER.ETPWM.VAR.ETPWM7_PWMA_DEADBAND_OUT.VALUE=1
+DRIVER.ETPWM.VAR.ETPWM7_PWMA_DEADBAND_OUT.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM7_HSPCLKDIV_REG.VALUE=0
 DRIVER.ETPWM.VAR.ETPWM2_CHOPPER_DUTY_NEW.VALUE=50.0
 DRIVER.ETPWM.VAR.ETPWM3_PWMA_PERIOD.VALUE=250000
Index: firmware/include/etpwm.h
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/include/etpwm.h	(.../etpwm.h)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/include/etpwm.h	(.../etpwm.h)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -474,7 +474,7 @@
 #define ETPWM1_CMPB_CONFIGVALUE           0U
 #define ETPWM1_AQCTLA_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 4U))
 #define ETPWM1_AQCTLB_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 8U))
-#define ETPWM1_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)1U << 1U) | (uint16)((uint16)0U << 0U)) 
+#define ETPWM1_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)0U << 1U) | (uint16)((uint16)0U << 0U)) 
 #define ETPWM1_DBRED_CONFIGVALUE          1U
 #define ETPWM1_DBFED_CONFIGVALUE          1U
 #define ETPWM1_TZSEL_CONFIGVALUE          (0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U)
@@ -526,7 +526,7 @@
 #define ETPWM3_CMPB_CONFIGVALUE           0U
 #define ETPWM3_AQCTLA_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 4U))
 #define ETPWM3_AQCTLB_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 8U))
-#define ETPWM3_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)1U << 1U) | (uint16)((uint16)0U << 0U)) 
+#define ETPWM3_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)0U << 1U) | (uint16)((uint16)0U << 0U)) 
 #define ETPWM3_DBRED_CONFIGVALUE          1U
 #define ETPWM3_DBFED_CONFIGVALUE          1U
 #define ETPWM3_TZSEL_CONFIGVALUE          (0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U)
@@ -552,7 +552,7 @@
 #define ETPWM4_CMPB_CONFIGVALUE           0U
 #define ETPWM4_AQCTLA_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 4U))
 #define ETPWM4_AQCTLB_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 8U))
-#define ETPWM4_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)1U << 1U) | (uint16)((uint16)0U << 0U)) 
+#define ETPWM4_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)0U << 1U) | (uint16)((uint16)0U << 0U)) 
 #define ETPWM4_DBRED_CONFIGVALUE          1U
 #define ETPWM4_DBFED_CONFIGVALUE          1U
 #define ETPWM4_TZSEL_CONFIGVALUE          (0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U)
@@ -604,7 +604,7 @@
 #define ETPWM6_CMPB_CONFIGVALUE           0U
 #define ETPWM6_AQCTLA_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 4U))
 #define ETPWM6_AQCTLB_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 8U))
-#define ETPWM6_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)1U << 1U) | (uint16)((uint16)0U << 0U)) 
+#define ETPWM6_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)0U << 1U) | (uint16)((uint16)0U << 0U)) 
 #define ETPWM6_DBRED_CONFIGVALUE          1U
 #define ETPWM6_DBFED_CONFIGVALUE          1U
 #define ETPWM6_TZSEL_CONFIGVALUE          (0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U)
@@ -630,7 +630,7 @@
 #define ETPWM7_CMPB_CONFIGVALUE           0U
 #define ETPWM7_AQCTLA_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 4U))
 #define ETPWM7_AQCTLB_CONFIGVALUE         ((uint16)((uint16)ActionQual_Set << 0U) | (uint16)((uint16)ActionQual_Clear << 8U))
-#define ETPWM7_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)1U << 1U) | (uint16)((uint16)0U << 0U)) 
+#define ETPWM7_DBCTL_CONFIGVALUE          ((uint16)((uint16)0U << 5U) | (uint16)((uint16)0u << 4U) | (uint16)((uint16)0U << 3U) | (uint16)((uint16)0U << 2U) | (uint16)((uint16)0U << 1U) | (uint16)((uint16)0U << 0U)) 
 #define ETPWM7_DBRED_CONFIGVALUE          1U
 #define ETPWM7_DBFED_CONFIGVALUE          1U
 #define ETPWM7_TZSEL_CONFIGVALUE          (0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U | 0x0000U)
Index: firmware/include/gio.h
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/include/gio.h	(.../gio.h)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/include/gio.h	(.../gio.h)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -96,11 +96,11 @@
 							     | (uint32)((uint32)0U << 4U) \
 							     | (uint32)((uint32)0U << 5U) \
 							     | (uint32)((uint32)0U << 6U) \
-							     | (uint32)((uint32)0U << 7U) \
-								 | (uint32)((uint32)0U << 8U) \
+							     | (uint32)((uint32)1U << 7U) \
+								 | (uint32)((uint32)1U << 8U) \
 								 | (uint32)((uint32)0U << 9U) \
-								 | (uint32)((uint32)0U << 10U)\
-								 | (uint32)((uint32)0U << 11U)\
+								 | (uint32)((uint32)1U << 10U)\
+								 | (uint32)((uint32)1U << 11U)\
 								 | (uint32)((uint32)0U << 12U)\
 								 | (uint32)((uint32)0U << 13U)\
 								 | (uint32)((uint32)0U << 14U)\
@@ -113,8 +113,8 @@
 								 | (uint32)((uint32)0U << 4U) \
 								 | (uint32)((uint32)0U << 5U) \
 								 | (uint32)((uint32)0U << 6U) \
-								 | (uint32)((uint32)0U << 7U) \
-								 | (uint32)((uint32)0U << 8U) \
+								 | (uint32)((uint32)1U << 7U) \
+								 | (uint32)((uint32)1U << 8U) \
 								 | (uint32)((uint32)0U << 9U) \
 								 | (uint32)((uint32)0U << 10U)\
 								 | (uint32)((uint32)0U << 11U)\
@@ -123,15 +123,15 @@
 								 | (uint32)((uint32)0U << 14U)\
 								 | (uint32)((uint32)0U << 15U))
 
-#define GIO_PORTADIR_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 6U) | (uint32)((uint32)0U << 7U))
+#define GIO_PORTADIR_CONFIGVALUE	((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 6U) | (uint32)((uint32)0U << 7U))
 #define GIO_PORTAPDR_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U))
-#define GIO_PORTAPSL_CONFIGVALUE	((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 6U) | (uint32)((uint32)0U << 7U))
+#define GIO_PORTAPSL_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 6U) | (uint32)((uint32)1U << 7U))
 #define GIO_PORTAPULDIS_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) |(uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 6U) | (uint32)((uint32)0U << 7U))
 
-#define GIO_PORTBDIR_CONFIGVALUE	((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U))
+#define GIO_PORTBDIR_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U))
 #define GIO_PORTBPDR_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U))
 #define GIO_PORTBPSL_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U))
-#define GIO_PORTBPULDIS_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) |(uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U))
+#define GIO_PORTBPULDIS_CONFIGVALUE	((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)1U << 2U) |(uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 7U))
 
 
 /**
Index: firmware/include/mibspi.h
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/include/mibspi.h	(.../mibspi.h)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/include/mibspi.h	(.../mibspi.h)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -192,8 +192,8 @@
 #define MIBSPI1_INT0_CONFIGVALUE     ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 8U)  | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 0U))
 #define MIBSPI1_LVL_CONFIGVALUE      ((uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 0U))
 
-#define MIBSPI1_PCFUN_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) |  (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U) | (uint32)((uint32)1U << 17U) | (uint32)((uint32)1U << 25U))
-#define MIBSPI1_PCDIR_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)1U << 5U) |  (uint32)((uint32)0U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 25U))
+#define MIBSPI1_PCFUN_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) |  (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U) | (uint32)((uint32)1U << 17U) | (uint32)((uint32)1U << 25U))
+#define MIBSPI1_PCDIR_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)1U << 5U) |  (uint32)((uint32)0U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 25U))
 #define MIBSPI1_PCPDR_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) |  (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 25U))
 #define MIBSPI1_PCDIS_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) |  (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 25U))
 #define MIBSPI1_PCPSL_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)1U << 4U) | (uint32)((uint32)1U << 5U) |  (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U) | (uint32)((uint32)1U << 17U) | (uint32)((uint32)1U << 25U))
@@ -224,7 +224,7 @@
 #define MIBSPI3_INT0_CONFIGVALUE     ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 8U)  | (uint32)((uint32)1U << 6U) | (uint32)((uint32)1U << 4U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 0U))
 #define MIBSPI3_LVL_CONFIGVALUE      ((uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 6U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 0U))
 
-#define MIBSPI3_PCFUN_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)1U << 5U) | (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U))
+#define MIBSPI3_PCFUN_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U))
 #define MIBSPI3_PCDIR_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)1U << 4U) | (uint32)((uint32)1U << 5U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U))
 #define MIBSPI3_PCPDR_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U))
 #define MIBSPI3_PCDIS_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 4U) | (uint32)((uint32)0U << 5U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U))
@@ -259,7 +259,7 @@
 #define MIBSPI5_PCDIR_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 18U) | (uint32)((uint32)0U << 19U) | (uint32)((uint32)0U << 25U) | (uint32)((uint32)0U << 26U) | (uint32)((uint32)0U << 27U))
 #define MIBSPI5_PCPDR_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 18U) | (uint32)((uint32)0U << 19U) | (uint32)((uint32)0U << 25U) | (uint32)((uint32)0U << 26U) | (uint32)((uint32)0U << 27U))
 #define MIBSPI5_PCDIS_CONFIGVALUE    ((uint32)((uint32)0U << 0U) | (uint32)((uint32)0U << 1U) | (uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 3U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 9U) | (uint32)((uint32)0U << 10U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 11U) | (uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 17U) | (uint32)((uint32)0U << 18U) | (uint32)((uint32)0U << 19U) | (uint32)((uint32)0U << 25U) | (uint32)((uint32)0U << 26U) | (uint32)((uint32)0U << 27U))
-#define MIBSPI5_PCPSL_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U) | (uint32)((uint32)1U << 17U) | (uint32)((uint32)1U << 18U) | (uint32)((uint32)1U << 19U) | (uint32)((uint32)1U << 25U) | (uint32)((uint32)1U << 26U) | (uint32)((uint32)1U << 27U))
+#define MIBSPI5_PCPSL_CONFIGVALUE    ((uint32)((uint32)1U << 0U) | (uint32)((uint32)1U << 1U) | (uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 3U) | (uint32)((uint32)1U << 8U) | (uint32)((uint32)1U << 9U) | (uint32)((uint32)1U << 10U) | (uint32)((uint32)1U << 16U) | (uint32)((uint32)1U << 11U) | (uint32)((uint32)1U << 24U) | (uint32)((uint32)1U << 17U) | (uint32)((uint32)1U << 18U) | (uint32)((uint32)1U << 19U) | (uint32)((uint32)1U << 25U) | (uint32)((uint32)1U << 26U) | (uint32)((uint32)1U << 27U))
 
 #define MIBSPI5_DELAY_CONFIGVALUE    ((uint32)((uint32)0U << 24U) | (uint32)((uint32)0U << 16U) | (uint32)((uint32)0U << 8U) | (uint32)((uint32)0U << 0U))
 
Index: firmware/include/sci.h
===================================================================
diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/include/sci.h	(.../sci.h)	(revision eff7b1575f008f81b29ef906f6346fac6012d3ab)
+++ firmware/include/sci.h	(.../sci.h)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -130,8 +130,8 @@
                                    |(uint32)((uint32)0U << 1U) \
                                    |(uint32)((uint32)0U << 0U))
                                    
-#define SCI_SETINT_CONFIGVALUE     ((uint32)((uint32)1U << 26U) \
-                                   |(uint32)((uint32)1U << 25U) \
+#define SCI_SETINT_CONFIGVALUE     ((uint32)((uint32)0U << 26U) \
+                                   |(uint32)((uint32)0U << 25U) \
                                    |(uint32)((uint32)0U << 24U) \
                                    |(uint32)((uint32)0U << 9U) \
                                    |(uint32)((uint32)0U << 1U) \
Index: firmware/source/adc.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/adc.c	(.../adc.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/source/adc.c	(.../adc.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -173,13 +173,13 @@
     adcREG1->EVTOUT = 0U;
 
     /** - ADC1 EVT pin direction */
-    adcREG1->EVTDIR = 0U;
+    adcREG1->EVTDIR = 1U;
 	
     /** - ADC1 EVT pin open drain enable */
 	adcREG1->EVTPDR = 0U;
 
     /** - ADC1 EVT pin pullup / pulldown selection */
-	adcREG1->EVTPSEL = 1U;
+	adcREG1->EVTPSEL = 0U;
 
     /** - ADC1 EVT pin pullup / pulldown enable*/
 	adcREG1->EVTDIS = 0U;
Index: firmware/source/can.c
===================================================================
diff -u -r36a2fa774e2f5721c30261a40360d706bb4ea4bb -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/can.c	(.../can.c)	(revision 36a2fa774e2f5721c30261a40360d706bb4ea4bb)
+++ firmware/source/can.c	(.../can.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -254,7 +254,7 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x8U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x08U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 4U;
@@ -330,7 +330,7 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x100U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x200U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 8U;
@@ -368,8 +368,8 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x403U & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x403U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 10U;
 
Index: firmware/source/etpwm.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/etpwm.c	(.../etpwm.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/source/etpwm.c	(.../etpwm.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -107,7 +107,7 @@
                       | (uint16)((uint16)0u << 4U)    /* Source for Rising edge delay(0-PWMA, 1-PWMB)  */
                       | (uint16)((uint16)0U << 3U)    /* Enable/Disable EPWMxB invert       */
                       | (uint16)((uint16)0U << 2U)    /* Enable/Disable EPWMxA invert       */
-                      | (uint16)((uint16)1U << 1U)    /* Enable/Disable Rising Edge Delay   */
+                      | (uint16)((uint16)0U << 1U)    /* Enable/Disable Rising Edge Delay   */
                       | (uint16)((uint16)0U << 0U));  /* Enable/Disable Falling Edge Delay  */
 
     /** - Set the rising edge delay  */
@@ -297,7 +297,7 @@
                       | (uint16)((uint16)0U << 4U) /* Source for Rising edge delay(0-PWMA, 1-PWMB)  */
                       | (uint16)((uint16)0U << 3U)  /* Enable/Disable EPWMxB invert       */
                       | (uint16)((uint16)0U << 2U)  /* Enable/Disable EPWMxA invert       */
-                      | (uint16)((uint16)1U << 1U) /* Enable/Disable Rising Edge Delay   */
+                      | (uint16)((uint16)0U << 1U) /* Enable/Disable Rising Edge Delay   */
                       | (uint16)((uint16)0U << 0U));   /* Enable/Disable Falling Edge Delay  */
 
     /** - Set the rising edge delay  */
@@ -393,7 +393,7 @@
                      | (uint16)((uint16)0U << 4U) /* Source for Rising edge delay(0-PWMA, 1-PWMB)  */
                      | (uint16)((uint16)0U << 3U)  /* Enable/Disable EPWMxB invert       */
                      | (uint16)((uint16)0U << 2U)  /* Enable/Disable EPWMxA invert       */
-                     | (uint16)((uint16)1U << 1U) /* Enable/Disable Rising Edge Delay   */
+                     | (uint16)((uint16)0U << 1U) /* Enable/Disable Rising Edge Delay   */
                      | (uint16)((uint16)0U << 0U);    /* Enable/Disable Falling Edge Delay  */
 
     /** - Set the rising edge delay  */
@@ -489,7 +489,7 @@
                      | (uint16)((uint16)0U << 4U) /* Source for Rising edge delay(0-PWMA, 1-PWMB)  */
                      | (uint16)((uint16)0U << 3U)  /* Enable/Disable EPWMxB invert       */
                      | (uint16)((uint16)0U << 2U)  /* Enable/Disable EPWMxA invert       */
-                     | (uint16)((uint16)1U << 1U) /* Enable/Disable Rising Edge Delay   */
+                     | (uint16)((uint16)0U << 1U) /* Enable/Disable Rising Edge Delay   */
                      | (uint16)((uint16)0U << 0U);    /* Enable/Disable Falling Edge Delay  */
 
     /** - Set the rising edge delay  */
@@ -587,7 +587,7 @@
                      | (uint16)((uint16)0U << 4U) /* Source for Rising edge delay(0-PWMA, 1-PWMB)  */
                      | (uint16)((uint16)0U << 3U)  /* Enable/Disable EPWMxB invert       */
                      | (uint16)((uint16)0U << 2U)  /* Enable/Disable EPWMxA invert       */
-                     | (uint16)((uint16)1U << 1U) /* Enable/Disable Rising Edge Delay   */
+                     | (uint16)((uint16)0U << 1U) /* Enable/Disable Rising Edge Delay   */
                      | (uint16)((uint16)0U << 0U);    /* Enable/Disable Falling Edge Delay  */
 
     /** - Set the rising edge delay  */
Index: firmware/source/gio.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/gio.c	(.../gio.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/source/gio.c	(.../gio.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -81,9 +81,9 @@
                    | (uint32)((uint32)0U << 7U); /* Bit 7 */
 
     /** - Port A direction */
-    gioPORTA->DIR  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
-                   | (uint32)((uint32)0U << 1U)  /* Bit 1 */
-                   | (uint32)((uint32)1U << 2U)  /* Bit 2 */
+    gioPORTA->DIR  = (uint32)((uint32)1U << 0U)  /* Bit 0 */
+                   | (uint32)((uint32)1U << 1U)  /* Bit 1 */
+                   | (uint32)((uint32)0U << 2U)  /* Bit 2 */
                    | (uint32)((uint32)0U << 3U)  /* Bit 3 */
                    | (uint32)((uint32)0U << 4U)  /* Bit 4 */
                    | (uint32)((uint32)0U << 5U)  /* Bit 5 */
@@ -101,14 +101,14 @@
                    | (uint32)((uint32)0U << 7U); /* Bit 7 */
 
     /** - Port A pullup / pulldown selection */
-    gioPORTA->PSL  = (uint32)((uint32)1U << 0U)  /* Bit 0 */
-                   | (uint32)((uint32)1U << 1U)  /* Bit 1 */
+    gioPORTA->PSL  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
+                   | (uint32)((uint32)0U << 1U)  /* Bit 1 */
                    | (uint32)((uint32)0U << 2U)  /* Bit 2 */
                    | (uint32)((uint32)0U << 3U)  /* Bit 3 */
                    | (uint32)((uint32)0U << 4U)  /* Bit 4 */
                    | (uint32)((uint32)0U << 5U)  /* Bit 5 */
                    | (uint32)((uint32)1U << 6U)  /* Bit 6 */
-                   | (uint32)((uint32)0U << 7U); /* Bit 7 */
+                   | (uint32)((uint32)1U << 7U); /* Bit 7 */
 
     /** - Port A pullup / pulldown enable*/
     gioPORTA->PULDIS  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
@@ -133,10 +133,10 @@
                    | (uint32)((uint32)0U << 7U); /* Bit 7 */
 
     /** - Port B direction */
-    gioPORTB->DIR  = (uint32)((uint32)1U << 0U)  /* Bit 0 */
-                   | (uint32)((uint32)1U << 1U)  /* Bit 1 */
+    gioPORTB->DIR  = (uint32)((uint32)0U << 0U)  /* Bit 0 */
+                   | (uint32)((uint32)0U << 1U)  /* Bit 1 */
                    | (uint32)((uint32)0U << 2U)  /* Bit 2 */
-                   | (uint32)((uint32)1U << 3U)  /* Bit 3 */
+                   | (uint32)((uint32)0U << 3U)  /* Bit 3 */
                    | (uint32)((uint32)0U << 4U)  /* Bit 4 */
                    | (uint32)((uint32)0U << 5U)  /* Bit 5 */
                    | (uint32)((uint32)0U << 6U)  /* Bit 6 */
@@ -165,7 +165,7 @@
     /** - Port B pullup / pulldown enable*/
     gioPORTB->PULDIS  = (uint32)((uint32)0U << 0U) /* Bit 0 */
                       | (uint32)((uint32)0U << 1U)  /* Bit 1 */
-                      | (uint32)((uint32)0U << 2U)  /* Bit 2 */
+                      | (uint32)((uint32)1U << 2U)  /* Bit 2 */
                       | (uint32)((uint32)0U << 3U)  /* Bit 3 */
                       | (uint32)((uint32)0U << 4U)  /* Bit 4 */
                       | (uint32)((uint32)0U << 5U)  /* Bit 5 */
@@ -204,8 +204,8 @@
                    | (uint32)((uint32)0U << 4U)   /* Bit 4 */
                    | (uint32)((uint32)0U << 5U)   /* Bit 5 */
                    | (uint32)((uint32)0U << 6U)   /* Bit 6 */
-                   | (uint32)((uint32)0U << 7U)   /* Bit 7 */
-                   | (uint32)((uint32)0U << 8U)   /* Bit 8  */
+                   | (uint32)((uint32)1U << 7U)   /* Bit 7 */
+                   | (uint32)((uint32)1U << 8U)   /* Bit 8  */
                    | (uint32)((uint32)0U << 9U)   /* Bit 9  */
                    | (uint32)((uint32)0U << 10U)  /* Bit 10 */
                    | (uint32)((uint32)0U << 11U)  /* Bit 11 */
@@ -228,11 +228,11 @@
                    | (uint32)((uint32)0U << 4U)   /* Bit 4 */
                    | (uint32)((uint32)0U << 5U)   /* Bit 5 */
                    | (uint32)((uint32)0U << 6U)   /* Bit 6 */
-                   | (uint32)((uint32)0U << 7U)   /* Bit 7 */
-                   | (uint32)((uint32)0U << 8U)   /* Bit 8  */
+                   | (uint32)((uint32)1U << 7U)   /* Bit 7 */
+                   | (uint32)((uint32)1U << 8U)   /* Bit 8  */
                    | (uint32)((uint32)0U << 9U)   /* Bit 9  */
-                   | (uint32)((uint32)0U << 10U)  /* Bit 10 */
-                   | (uint32)((uint32)0U << 11U)  /* Bit 11 */
+                   | (uint32)((uint32)1U << 10U)  /* Bit 10 */
+                   | (uint32)((uint32)1U << 11U)  /* Bit 11 */
                    | (uint32)((uint32)0U << 12U)  /* Bit 12 */
                    | (uint32)((uint32)0U << 13U)  /* Bit 13 */
                    | (uint32)((uint32)0U << 14U)  /* Bit 14 */
Index: firmware/source/mibspi.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/mibspi.c	(.../mibspi.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/source/mibspi.c	(.../mibspi.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -482,7 +482,7 @@
                     | (uint32)((uint32)0U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO[0] */
-                    | (uint32)((uint32)0U << 11U)  /* SOMI[0] */
+                    | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
                     | (uint32)((uint32)0U << 17U)  /* SIMO[1] */
                     | (uint32)((uint32)0U << 25U); /* SOMI[1] */
 
@@ -529,7 +529,7 @@
                     | (uint32)((uint32)0U << 25U); /* SOMI[1] */
 
     /* MIBSPI1 set all pins to functional */
-    mibspiREG1->PC0 = (uint32)((uint32)1U << 0U)  /* SCS[0] */
+    mibspiREG1->PC0 = (uint32)((uint32)0U << 0U)  /* SCS[0] */
                     | (uint32)((uint32)0U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)0U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)0U << 3U)  /* SCS[3] */
@@ -538,7 +538,7 @@
                     | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)0U << 10U)  /* SIMO[0] */
-                    | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
+                    | (uint32)((uint32)0U << 11U)  /* SOMI[0] */
                     | (uint32)((uint32)1U << 17U)  /* SIMO[1] */
                     | (uint32)((uint32)1U << 25U); /* SOMI[1] */
 
@@ -1006,11 +1006,11 @@
 
     /* MIBSPI3 set all pins to functional */
     mibspiREG3->PC0 = (uint32)((uint32)0U << 0U)  /* SCS[0] */
-                    | (uint32)((uint32)1U << 1U)  /* SCS[1] */
+                    | (uint32)((uint32)0U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)0U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)0U << 3U)  /* SCS[3] */
                     | (uint32)((uint32)0U << 4U)  /* SCS[4] */
-                    | (uint32)((uint32)1U << 5U)  /* SCS[5] */
+                    | (uint32)((uint32)0U << 5U)  /* SCS[5] */
                     | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO */
@@ -1468,7 +1468,7 @@
                     | (uint32)((uint32)1U << 1U)  /* SCS[1] */
                     | (uint32)((uint32)1U << 2U)  /* SCS[2] */
                     | (uint32)((uint32)1U << 3U)  /* SCS[3] */
-                    | (uint32)((uint32)0U << 8U)  /* ENA */
+                    | (uint32)((uint32)1U << 8U)  /* ENA */
                     | (uint32)((uint32)1U << 9U)  /* CLK */
                     | (uint32)((uint32)1U << 10U)  /* SIMO[0] */
                     | (uint32)((uint32)1U << 11U)  /* SOMI[0] */
Index: firmware/source/pinmux.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/pinmux.c	(.../pinmux.c)	(revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/source/pinmux.c	(.../pinmux.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -168,25 +168,25 @@
 /* USER CODE BEGIN (2) */
 /* USER CODE END */
 
-    pinMuxReg->PINMMR0 =    PINMUX_PIN_1_GIOB_3 | PINMUX_PIN_2_GIOA_0 | PINMUX_PIN_3_MIBSPI3NCS_3 | PINMUX_PIN_4_MIBSPI3NCS_2;
+    pinMuxReg->PINMMR0 =    PINMUX_PIN_1_GIOB_3 | PINMUX_PIN_2_GIOA_0 | PINMUX_PIN_3_I2C_SCL | PINMUX_PIN_4_I2C_SDA;
     
-    pinMuxReg->PINMMR1 =    PINMUX_PIN_5_GIOA_1 | PINMUX_PIN_6_MIBSPI3NCS_4;
+    pinMuxReg->PINMMR1 =    PINMUX_PIN_5_GIOA_1 | PINMUX_PIN_6_HET1_11;
     
     pinMuxReg->PINMMR2 =    PINMUX_PIN_9_GIOA_2 | PINMUX_PIN_14_ETPWM1A;
     
-    pinMuxReg->PINMMR3 =    PINMUX_PIN_15_W2FC_SE0O | PINMUX_PIN_16_GIOA_6;
+    pinMuxReg->PINMMR3 =    PINMUX_PIN_15_HET1_22 | PINMUX_PIN_16_ETPWM1B;
     
-    pinMuxReg->PINMMR4 =    PINMUX_PIN_22_ETPWM2A | PINMUX_PIN_23_HET1_01 | PINMUX_PIN_24_HET1_03;
+    pinMuxReg->PINMMR4 =    PINMUX_PIN_22_GIOA_7 | PINMUX_PIN_23_HET1_01 | PINMUX_PIN_24_HET1_03;
     
-    pinMuxReg->PINMMR5 =    PINMUX_PIN_25_HET1_0 | PINMUX_PIN_30_ETPWM3A | PINMUX_PIN_31_HET1_05;
+    pinMuxReg->PINMMR5 =    PINMUX_PIN_25_HET1_0 | PINMUX_PIN_30_ETPWM3A | PINMUX_PIN_31_ETPWM3B;
     
     pinMuxReg->PINMMR6 =    PINMUX_PIN_33_HET1_07 | PINMUX_PIN_35_ETPWM7A;
     
     pinMuxReg->PINMMR7 =    PINMUX_PIN_37_MIBSPI3NCS_1 | PINMUX_PIN_38_SCIRX;
     
-    pinMuxReg->PINMMR8 =    PINMUX_PIN_39_SCITX | PINMUX_PIN_40_MIBSPI1NCS_2 | PINMUX_PIN_41_HET1_15;
+    pinMuxReg->PINMMR8 =    PINMUX_PIN_39_SCITX | PINMUX_PIN_40_HET1_19 | PINMUX_PIN_41_HET1_15;
     
-    pinMuxReg->PINMMR9 =  ((~(pinMuxReg->PINMMR9 >> 18U) & 0x00000001U ) << 18U) | PINMUX_PIN_54_MIBSPI3NCS_5 | PINMUX_PIN_55_MIBSPI3NCS_0;
+    pinMuxReg->PINMMR9 =  ((~(pinMuxReg->PINMMR9 >> 18U) & 0x00000001U ) << 18U) | PINMUX_PIN_54_HET1_31 | PINMUX_PIN_55_MIBSPI3NCS_0;
     
     pinMuxReg->PINMMR10 =   PINMUX_PIN_86_AD1EVT;
     
@@ -208,7 +208,7 @@
     
     pinMuxReg->PINMMR19 =   PINMUX_PIN_127_HET1_30;
     
-    pinMuxReg->PINMMR20 =   PINMUX_PIN_130_MIBSPI1NCS_1;
+    pinMuxReg->PINMMR20 =   PINMUX_PIN_130_HET1_17;
     
     pinMuxReg->PINMMR21 =   PINMUX_PIN_133_GIOB_1;
     
@@ -234,9 +234,9 @@
 
     pinMuxReg->PINMMR32 = 0x00010101U;    
 
-    pinMuxReg->PINMMR33 =   PINMUX_PIN_36_HET1_04 | PINMUX_PIN_51_MIBSPI3SOMI | PINMUX_PIN_52_MIBSPI3SIMO | PINMUX_PIN_53_MIBSPI3CLK;
+    pinMuxReg->PINMMR33 =   PINMUX_PIN_36_ETPWM4B | PINMUX_PIN_51_MIBSPI3SOMI | PINMUX_PIN_52_MIBSPI3SIMO | PINMUX_PIN_53_MIBSPI3CLK;
 
-    pinMuxReg->PINMMR34 =   PINMUX_PIN_139_HET1_16 | PINMUX_PIN_140_ETPWM6A | PINMUX_PIN_141_HET1_20;
+    pinMuxReg->PINMMR34 =   PINMUX_PIN_139_HET1_16 | PINMUX_PIN_140_ETPWM6A | PINMUX_PIN_141_ETPWM6B;
 
     
 /* USER CODE BEGIN (3) */
Index: firmware/source/sci.c
===================================================================
diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -r6d2d8f0267c57135554e5a1acaca9aef37f27949
--- firmware/source/sci.c	(.../sci.c)	(revision eff7b1575f008f81b29ef906f6346fac6012d3ab)
+++ firmware/source/sci.c	(.../sci.c)	(revision 6d2d8f0267c57135554e5a1acaca9aef37f27949)
@@ -135,8 +135,8 @@
                       | (uint32)((uint32)0U << 0U);  /* Break detect */
 
     /** - set interrupt enable */
-    sciREG->SETINT = (uint32)((uint32)1U << 26U)  /* Framing error */
-                   | (uint32)((uint32)1U << 25U)  /* Overrun error */
+    sciREG->SETINT = (uint32)((uint32)0U << 26U)  /* Framing error */
+                   | (uint32)((uint32)0U << 25U)  /* Overrun error */
                    | (uint32)((uint32)0U << 24U)  /* Parity error */
                    | (uint32)((uint32)0U << 9U)  /* Receive */
                    | (uint32)((uint32)0U << 1U)  /* Wakeup */