Index: firmware/App/Controllers/DrainPump.c
===================================================================
diff -u -re30951f62cdc9c52f20e9218df947d3860b3c7a7 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Controllers/DrainPump.c (.../DrainPump.c) (revision e30951f62cdc9c52f20e9218df947d3860b3c7a7)
+++ firmware/App/Controllers/DrainPump.c (.../DrainPump.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -41,6 +41,10 @@
// ********** private definitions **********
+#define DRAIN_PUMP_MIN_DAC ( ((F32)MIN_DRAIN_PUMP_RPM * \
+ DRP_SPEED_RPM_TO_ADC_FACTOR ) + FLOAT_TO_INT_ROUNDUP_OFFSET ) ///<, Drain pump minimum RPM to DAC conversion
+#define DRAIN_PUMP_MAX_DAC ( ((F32)MAX_DRAIN_PUMP_RPM * \
+ DRP_SPEED_RPM_TO_ADC_FACTOR ) + FLOAT_TO_INT_ROUNDUP_OFFSET ) ///< Drain pump maximum RPM to DAC conversion
#define DRAIN_PUMP_DATA_PUB_INTERVAL ( MS_PER_SECOND / TASK_PRIORITY_INTERVAL ) ///< interval (ms/task time) at which the Drain Pump data is published on the CAN bus
#define DRP_CONTROL_INTERVAL ( MS_PER_SECOND / TASK_GENERAL_INTERVAL ) ///< interval (ms/task time) at which the Drain pump is controlled
@@ -93,6 +97,7 @@
static OVERRIDE_F32_T targetDrainPumpDeltaPressure = { 0.0, 0.0, 0.0, 0.0 }; ///< Target delta pressure for the drain pump
static U32 drainControlTimerCounter = 0; ///< determines when to perform control on drain pump
+static BOOL hasClosedLoopBeenRequested = FALSE; ///< Close loop pump control flag
/* These variables are used for POST. POST will be implemented later
static DRAIN_PUMP_SELF_TEST_STATE_T drainPumpSelfTestState = DRAIN_PUMP_SELF_TEST_STATE_START; ///< current drain pump self test state
@@ -118,12 +123,14 @@
*************************************************************************/
void initDrainPump( void )
{
- stopDrainPump();
+ stopDrainPump();
+
+ hasClosedLoopBeenRequested = FALSE;
// Initialize the drain pump PI controller
- initializePIController( PI_CONTROLLER_ID_DRAIN_PUMP, MIN_DRAIN_PUMP_RPM_TARGET,
+ initializePIController( PI_CONTROLLER_ID_DRAIN_PUMP, DRAIN_PUMP_MIN_DAC,
DRAIN_PUMP_P_COEFFICIENT, DRAIN_PUMP_I_COEFFICIENT,
- MIN_DRAIN_PUMP_RPM_TARGET, MAX_DRAIN_PUMP_RPM_TARGET );
+ DRAIN_PUMP_MIN_DAC, DRAIN_PUMP_MAX_DAC );
}
/*********************************************************************//**
@@ -140,7 +147,7 @@
BOOL result = FALSE;
if ( ( 0 == rpm ) ||
- ( ( rpm >= MIN_DRAIN_PUMP_RPM_TARGET ) && ( rpm <= MAX_DRAIN_PUMP_RPM_TARGET ) ) )
+ ( ( rpm >= MIN_DRAIN_PUMP_RPM ) && ( rpm <= MAX_DRAIN_PUMP_RPM ) ) )
{
#ifdef EMC_TEST_BUILD
drainPumpDAC = (U32)((F32)2500 * DRP_SPEED_RPM_TO_ADC_FACTOR + FLOAT_TO_INT_ROUNDUP_OFFSET);
@@ -165,11 +172,12 @@
* @param: deltaP : new target drain pump delta pressure
* @return: TRUE if new target speed is set, FALSE if not
*************************************************************************/
-BOOL setDrainPumpTargetDeltaPressure ( F32 deltaP )
+BOOL setDrainPumpTargetDeltaPressure( F32 deltaP )
{
BOOL result = FALSE;
targetDrainPumpDeltaPressure.data = deltaP;
+ hasClosedLoopBeenRequested = TRUE;
drainPumpControlMode = PUMP_CONTROL_MODE_CLOSED_LOOP;
result = TRUE;
@@ -189,6 +197,7 @@
targetDrainPumpSpeed.data = 0;
stopDrainPump();
drainPumpState = DRAIN_PUMP_OFF_STATE;
+ hasClosedLoopBeenRequested = FALSE;
drainPumpControlMode = NUM_OF_PUMP_CONTROL_MODES; // Set the control mode to none
drainControlTimerCounter = 0;
}
@@ -255,7 +264,7 @@
*************************************************************************/
static DRAIN_PUMP_STATE_T handleDrainPumpOffState( void )
{
- DRAIN_PUMP_STATE_T result = DRAIN_PUMP_OFF_STATE;
+ DRAIN_PUMP_STATE_T result = DRAIN_PUMP_OFF_STATE;
#ifdef DEBUG_ENABLED
#ifdef ENABLE_DIP_SWITCHES
@@ -290,15 +299,15 @@
// If the drain pump is set to closed loop, call the proper state
// It is checked for the value of delta pressure because it can be anything
// including 0
- else if ( drainPumpControlMode == PUMP_CONTROL_MODE_CLOSED_LOOP )
+ else if ( drainPumpControlMode == PUMP_CONTROL_MODE_CLOSED_LOOP && hasClosedLoopBeenRequested )
{
// set drain pump enable pin
SET_DRAIN_PUMP_ENABLE();
- resetPIController( PI_CONTROLLER_ID_DRAIN_PUMP, MIN_DRAIN_PUMP_RPM_TARGET );
+ resetPIController( PI_CONTROLLER_ID_DRAIN_PUMP, DRAIN_PUMP_MIN_DAC );
- U32 rpm = targetDrainPumpSpeed.data;
- drainPumpDAC = (U32)((F32)rpm * DRP_SPEED_RPM_TO_ADC_FACTOR + FLOAT_TO_INT_ROUNDUP_OFFSET);
+ // Set the drain to the DAC value of minimum RPM
+ drainPumpDAC = DRAIN_PUMP_MIN_DAC;
// set drain pump DAC
drainPumpDACSet = drainPumpDAC;
setFPGADrainPumpSpeed( drainPumpDACSet );
Index: firmware/App/Controllers/DrainPump.h
===================================================================
diff -u -rab304e2ca6e3e40ed8cb12650e9855ae0b9649d8 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Controllers/DrainPump.h (.../DrainPump.h) (revision ab304e2ca6e3e40ed8cb12650e9855ae0b9649d8)
+++ firmware/App/Controllers/DrainPump.h (.../DrainPump.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -30,8 +30,8 @@
// ********** public definitions **********
-#define MAX_DRAIN_PUMP_RPM_TARGET 3000 ///< Maximum RPM target for drain pump.
-#define MIN_DRAIN_PUMP_RPM_TARGET 300 ///< Minimum RPM target for drain pump (though zero is allowed if turning pump off).
+#define MIN_DRAIN_PUMP_RPM 300 ///< Minimum RPM target for drain pump (though zero is allowed if turning pump off).
+#define MAX_DRAIN_PUMP_RPM 3000 ///< Maximum RPM target for drain pump.
// ********** public function prototypes **********
@@ -41,7 +41,7 @@
BOOL setDrainPumpTargetSpeed( U32 rpm );
-BOOL setDrainPumpTargetDeltaPressure ( F32 deltaP );
+BOOL setDrainPumpTargetDeltaPressure( F32 deltaP );
void signalDrainPumpHardStop( void );
Index: firmware/App/Controllers/ROPump.c
===================================================================
diff -u -re30951f62cdc9c52f20e9218df947d3860b3c7a7 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Controllers/ROPump.c (.../ROPump.c) (revision e30951f62cdc9c52f20e9218df947d3860b3c7a7)
+++ firmware/App/Controllers/ROPump.c (.../ROPump.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -320,9 +320,9 @@
{
F32 avgROFlow = (F32)measuredFlowReadingsSum * FLOW_AVERAGE_MULTIPLIER;
- if ( ( avgROFlow == FLOW_SENSOR_ZERO_READING ) || ( measuredFlowReadingsSum == 0 ) )
+ if ( ( roFlowReading == FLOW_SENSOR_ZERO_READING ) || ( roFlowReading == 0 ) )
{
- measuredROFlowRateLPM.data = 0.0;
+ measuredROFlowRateLPM.data = 0.0;
}
else
{
@@ -439,17 +439,17 @@
roPumpControlModeSet = roPumpControlMode;
// set initial PWM duty cycle
roPumpPWMDutyCyclePctSet = roPumpPWMDutyCyclePct;
- setROPumpControlSignalPWM ( roPumpPWMDutyCyclePctSet );
+ setROPumpControlSignalPWM( roPumpPWMDutyCyclePctSet );
// reset controller
- resetPIController ( I_CONTROLLER_ID_RO_PUMP_RAMP_UP, roPumpPWMDutyCyclePctSet );
+ resetPIController( I_CONTROLLER_ID_RO_PUMP_RAMP_UP, roPumpPWMDutyCyclePctSet );
// set pump to on
isROPumpOn = TRUE;
result = RO_PUMP_RAMP_UP_STATE;
}
if ( roPumpOpenLoopTargetPWM > 0 && roPumpControlMode == PUMP_CONTROL_MODE_OPEN_LOOP )
{
- setROPumpControlSignalPWM ( roPumpOpenLoopTargetPWM );
+ setROPumpControlSignalPWM( roPumpOpenLoopTargetPWM );
isROPumpOn = TRUE;
result = RO_PUMP_OPEN_LOOP_STATE;
}
@@ -560,19 +560,19 @@
RO_PUMP_STATE_T result = RO_PUMP_CONTROL_TO_TARGET_STATE;
// control at set interval
- if ( ++roControlTimerCounter >= ROP_CONTROL_INTERVAL )
+ if ( ++roControlTimerCounter >= ROP_CONTROL_INTERVAL && roPumpControlModeSet == PUMP_CONTROL_MODE_CLOSED_LOOP )
{
F32 actualPressure = getMeasuredDGPressure( PRESSURE_SENSOR_RO_PUMP_OUTLET );
F32 newPWM = runPIController( PI_CONTROLLER_ID_RO_PUMP, tgtROPumpPressure, actualPressure );
roPumpPWMDutyCyclePctSet = newPWM;
setROPumpControlSignalPWM( newPWM );
-/*#ifndef EMC_TEST_BUILD
+#ifndef EMC_TEST_BUILD
newPWM = runPIController( PI_CONTROLLER_ID_RO_PUMP, tgtPres, actPres );
roPumpPWMDutyCyclePctSet = newPWM;
setROPumpControlSignalPWM( newPWM );
-#endif*/
+#endif
roControlTimerCounter = 0;
}
@@ -714,9 +714,14 @@
// publish RO pump data on interval
if ( ++roPumpDataPublicationTimerCounter >= getPublishROPumpDataInterval() )
{
- F32 measFlow = getMeasuredROFlowRate();
- F32 pumpPWMPctDutyCycle = roPumpPWMDutyCyclePctSet * FRACTION_TO_PERCENT_FACTOR;
- broadcastROPumpData( tgtROPumpPressure, measFlow, pumpPWMPctDutyCycle, (U32)roPumpState );
+ RO_PUMP_DATA_T valveData;
+
+ valveData.roPumpTgtPressure = tgtROPumpPressure;
+ valveData.measROFlowRate = getMeasuredROFlowRate();
+ valveData.roPumpPWM = roPumpPWMDutyCyclePctSet * FRACTION_TO_PERCENT_FACTOR;
+ valveData.roPumpState = (U32)roPumpState;
+
+ broadcastROPumpData( &valveData );
roPumpDataPublicationTimerCounter = 0;
}
}
Index: firmware/App/Controllers/ROPump.h
===================================================================
diff -u -re30951f62cdc9c52f20e9218df947d3860b3c7a7 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Controllers/ROPump.h (.../ROPump.h) (revision e30951f62cdc9c52f20e9218df947d3860b3c7a7)
+++ firmware/App/Controllers/ROPump.h (.../ROPump.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -30,7 +30,19 @@
// ********** public definitions **********
#define MAX_RO_FLOWRATE_LPM 1.2 ///< Maximum target RO flow rate (in LPM)
-#define MIN_RO_FLOWRATE_LPM 0.2 ///< Minimum target RO flow rate (in LPM)
+#define MIN_RO_FLOWRATE_LPM 0.2 ///< Minimum target RO flow rate (in LPM)
+
+#pragma pack(push, 1)
+/// RO pump data struct.
+typedef struct
+{
+ U32 setROPumpPressure; ///< RO pump pressure set target
+ F32 measROFlowRate; ///< RO flow rate measurement
+ F32 roPumpPWM; ///< RO pump pwm
+ U32 roPumpState; ///< RO pump current state
+ F32 roPumpTgtPressure; ///< RO pump target pressure
+} RO_PUMP_DATA_T;
+#pragma pack(pop)
// ********** public function prototypes **********
Index: firmware/App/Controllers/UVReactors.c
===================================================================
diff -u -r9dd9502d10f57408dd50fd43275b29b89a8a66c9 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Controllers/UVReactors.c (.../UVReactors.c) (revision 9dd9502d10f57408dd50fd43275b29b89a8a66c9)
+++ firmware/App/Controllers/UVReactors.c (.../UVReactors.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -1,49 +1,200 @@
-/*
- * UVReactors.c
- *
- * Created on: Jun 20, 2020
- * Author: fw
- */
+#include "reg_het.h"
#include "gio.h"
+#include "TaskGeneral.h"
#include "UVReactors.h"
#include "Common.h"
+#include "SystemCommMessages.h"
-#define ENABLE_UV_REACTOR 1
-#define DISABLE_UV_REACTOR 0
+/**
+ * @addtogroup UV Reactors
+ * @{
+ */
-#define UV_1_GIO_PORT_PIN 0
-#define UV_2_GIO_PORT_PIN 1
+// ********** private definitions **********
-SELF_TEST_STATUS_T execUVReactorsSelfTest( void )
+#define INLET_UV_REACTOR_ENABLE_PIN 0 ///< Inlet UV reactor GPIO pin number (enable pin)
+#define OUTLET_UV_REACTOR_ENABLE_PIN 1 ///< Outlet UV reactor GPIO pin number (enable Pin)
+
+#define INLET_UV_REACTOR_INDICATION_PIN 24 ///< Inlet UV reactor N2HET1 pin number (health check)
+#define OUTLET_UV_REACTOR_INDICATION_PIN 11 ///< Outlet UV reactor N2HET1 pin number (health check)
+
+#define UV_REACTORS_DATA_PUB_INTERVAL ( MS_PER_SECOND / TASK_GENERAL_INTERVAL ) ///< UV reactors data publication time interval
+
+/// UV reactors exec states
+typedef enum exec_states
{
+ UV_REACTOR_STATE_OFF = 0, ///< UV reactor state off
+ UV_REACTOR_STATE_ON, ///< UV reactor state on
+ NUM_OF_UV_REACTOR_STATES, ///< Number of UV reactor states
+} UV_REACTOR_STATE_T;
+/// UV reactor status
+typedef struct
+{
+ PIN_SIGNAL_STATE_T enableStatus; ///< UV reactor enable status
+ UV_REACTOR_STATE_T execState; ///< UV reactor executive state
+ BOOL hasTurnOnBeenRequested; ///< UV reactor turn on request
+ U32 reactorEnablePin; ///< UV reactor enable pin of GIO port A
+ U32 reactorHealthStatusPin; ///< UV reactor status pin of N2HET1
+} UV_REACTOR_STATUS_T;
+
+// ********** private data **********
+
+static UV_REACTOR_STATUS_T reactorsStatus[ NUM_OF_UV_REACTORS ]; ///< UV reactors status array
+static SELF_TEST_STATUS_T uvReactosSelfTestResult = SELF_TEST_STATUS_IN_PROGRESS; ///< Valves self test result
+
+static OVERRIDE_U32_T uvReactorsDataPublishInterval = { UV_REACTORS_DATA_PUB_INTERVAL,
+ UV_REACTORS_DATA_PUB_INTERVAL, 0, 0 }; ///< UV reactors data publish interval
+static U32 dataPublishCounter = 0;
+
+// Monitor function of the UV reactors
+static UV_REACTOR_STATE_T handleUVReactorStateOff( UV_REACTORS_T reactor );
+static UV_REACTOR_STATE_T handleUVReactorStateOn( UV_REACTORS_T reactor );
+static void execMonitorUVReactors( void );
+static void publishUVReactorsData( void );
+static U32 getPublishValvesDataInterval( void );
+
+void initUVReactors( void )
+{
+ uvReactosSelfTestResult = SELF_TEST_STATUS_IN_PROGRESS;
+ dataPublishCounter = 0;
+
+ reactorsStatus[ INLET_UV_REACTOR ].reactorEnablePin = INLET_UV_REACTOR_ENABLE_PIN;
+ reactorsStatus[ INLET_UV_REACTOR ].reactorHealthStatusPin = INLET_UV_REACTOR_INDICATION_PIN;
+
+ reactorsStatus[ OUTLET_UV_REACTOR ].reactorEnablePin = OUTLET_UV_REACTOR_ENABLE_PIN;
+ reactorsStatus[ OUTLET_UV_REACTOR ].reactorHealthStatusPin = OUTLET_UV_REACTOR_INDICATION_PIN;
}
+SELF_TEST_STATUS_T execUVReactorsSelfTest( void )
+{
+ //TODO what to do in POST?
+}
+
void execUVReactos( void )
{
+ UV_REACTORS_T reactor;
+ execMonitorUVReactors();
+
+ for ( reactor = INLET_UV_REACTOR; reactor < NUM_OF_UV_REACTORS; reactor++ )
+ {
+ switch ( reactorsStatus[ reactor ].execState )
+ {
+ case UV_REACTOR_STATE_OFF:
+ reactorsStatus[ reactor ].execState = handleUVReactorStateOff( reactor );
+ break;
+
+ case UV_REACTOR_STATE_ON:
+ reactorsStatus[ reactor ].execState = handleUVReactorStateOn( reactor );
+ break;
+
+ default:
+ SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_UV_REACTORS_INVALID_EXEC_STATE,
+ reactorsStatus[ reactor ].execState );
+ reactorsStatus[ reactor].execState = UV_REACTOR_STATE_OFF;
+ break;
+ }
+
+ publishUVReactorsData();
+ }
}
-BOOL startInletUVReactor()
+BOOL turnOnUVReactor( UV_REACTORS_T reactor )
{
- BOOL status = TRUE;
- //gioSetBit( gioPORTA, UV_1_GIO_PORT_PIN, ENABLE_UV_REACTOR );
- return status;
+ BOOL result = FALSE;
+
+ //TODO check the status of reactor
+ if ( FALSE == reactorsStatus[ reactor ].hasTurnOnBeenRequested )
+ {
+ reactorsStatus[ reactor ].hasTurnOnBeenRequested = TRUE;
+
+ result = TRUE;
+ }
+
+ return result;
}
-BOOL startOutletUVReactor()
+BOOL turnOffUVReactor( UV_REACTORS_T reactor )
{
- BOOL status = TRUE;
- //gioSetBit( gioPORTA, UV_2_GIO_PORT_PIN, ENABLE_UV_REACTOR );
- return status;
+ BOOL result = FALSE;
+
+ //TODO check the status of reactor
+ if ( TRUE == reactorsStatus[ reactor ].hasTurnOnBeenRequested )
+ {
+ reactorsStatus[ reactor ].hasTurnOnBeenRequested = FALSE;
+
+ result = TRUE;
+ }
+
+ return result;
}
-void stopInletUVReactor()
+static UV_REACTOR_STATE_T handleUVReactorStateOff( UV_REACTORS_T reactor )
{
- //gioSetBit( gioPORTA, UV_1_GIO_PORT_PIN, DISABLE_UV_REACTOR );
+ UV_REACTOR_STATE_T state = UV_REACTOR_STATE_OFF;
+
+ //TODO check the health
+ if( TRUE == reactorsStatus[ reactor ].hasTurnOnBeenRequested )
+ {
+ gioSetBit( gioPORTA, reactorsStatus[ reactor ].reactorEnablePin, PIN_SIGNAL_HIGH );
+ state = UV_REACTOR_STATE_ON;
+ }
+
+ return state;
}
-void stopOutletUVReactor()
+
+
+static UV_REACTOR_STATE_T handleUVReactorStateOn( UV_REACTORS_T reactor )
{
- //gioSetBit( gioPORTA, UV_2_GIO_PORT_PIN, DISABLE_UV_REACTOR );
+ UV_REACTOR_STATE_T state = UV_REACTOR_STATE_ON;
+
+ gioGetBit( hetPORT1, reactorsStatus[ reactor ].reactorHealthStatusPin );
+
+ if( FALSE == reactorsStatus[ reactor ].hasTurnOnBeenRequested )
+ {
+ gioSetBit( gioPORTA, reactorsStatus[ reactor ].reactorEnablePin, PIN_SIGNAL_LOW );
+ state = UV_REACTOR_STATE_OFF;
+ }
+
+ return state;
}
+
+
+static void execMonitorUVReactors( void )
+{
+
+}
+
+static U32 getPublishValvesDataInterval( void )
+{
+ U32 result = uvReactorsDataPublishInterval.data;
+
+ if ( OVERRIDE_KEY == uvReactorsDataPublishInterval.override )
+ {
+ result = uvReactorsDataPublishInterval.ovData;
+ }
+
+ return result;
+}
+
+static void publishUVReactorsData( void )
+{
+ if ( ++dataPublishCounter > getPublishValvesDataInterval() )
+ {
+ UV_REACTORS_DATA_T uvReactorsData;
+
+ uvReactorsData.inletUVReactorEnable = reactorsStatus[ INLET_UV_REACTOR ].enableStatus;
+ uvReactorsData.inletUVReactorHealthStatus = reactorsStatus[ INLET_UV_REACTOR ].reactorHealthStatusPin;
+
+ uvReactorsData.outletUVReactorEnable = reactorsStatus[ OUTLET_UV_REACTOR ].enableStatus;
+ uvReactorsData.outletUVReactorHealthStatus = reactorsStatus[ OUTLET_UV_REACTOR ].reactorHealthStatusPin;
+
+ broadcastUVReactorsData( &uvReactorsData );
+
+ dataPublishCounter = 0;
+ }
+}
+
+/**@}*/
Index: firmware/App/Controllers/UVReactors.h
===================================================================
diff -u -r1e044a958c655d09fed725cfbc9808319b642d13 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Controllers/UVReactors.h (.../UVReactors.h) (revision 1e044a958c655d09fed725cfbc9808319b642d13)
+++ firmware/App/Controllers/UVReactors.h (.../UVReactors.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -19,16 +19,34 @@
* @{
*/
+/// UV reactors names
+typedef enum uv_reactors_names
+{
+ INLET_UV_REACTOR = 0, ///< Inlet UV reactor
+ OUTLET_UV_REACTOR, ///< Outlet UV reactor
+ NUM_OF_UV_REACTORS, ///< Number of UV reactors
+} UV_REACTORS_T;
+
+#pragma pack(push, 1)
+/// UV reactors data publish
+typedef struct
+{
+ U32 inletUVReactorEnable; ///< Inlet UV reactor enable status
+ U32 inletUVReactorHealthStatus; ///< Inlet UV reactor health status
+ U32 outletUVReactorEnable; ///< Outlet UV reactor enable status
+ U32 outletUVReactorHealthStatus; ///< Outlet UV reactor health status
+} UV_REACTORS_DATA_T;
+#pragma pack(pop)
+
+void initUVReactors( void );
+
SELF_TEST_STATUS_T execUVReactorsSelfTest( void );
void execUVReactos( void );
-BOOL startInletUVReactor( void );
-BOOL startOutletUVReactor( void );
+BOOL turnOnUVReactor( UV_REACTORS_T reactor );
+BOOL turnOffUVReactor( UV_REACTORS_T reactor );
-void stopInletUVReactor( void );
-void stopOutletUVReactor( void );
+/**@}*/
-// TODO publications
-
-#endif /* UVREACTORS_H_ */
+#endif
Index: firmware/App/DGCommon.h
===================================================================
diff -u -rab304e2ca6e3e40ed8cb12650e9855ae0b9649d8 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/DGCommon.h (.../DGCommon.h) (revision ab304e2ca6e3e40ed8cb12650e9855ae0b9649d8)
+++ firmware/App/DGCommon.h (.../DGCommon.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -37,13 +37,13 @@
// #define DISABLE_HEATERS_AND_TEMPS 1
// #define ENABLE_DIP_SWITCHES 1
-// #define EMC_TEST_BUILD 1
+ #define EMC_TEST_BUILD 1
// #define ALARMS_DEBUG 1
// #define DISABLE_ACCELS 1
#define SKIP_POST 1
- #define ENABLE_DIP_SWITCHES 1
- #define EMC_TEST_BUILD 1
+ //#define ENABLE_DIP_SWITCHES 1
+ //#define EMC_TEST_BUILD 1
#define ALARMS_DEBUG 1
// #define HEATERS_DEBUG 1
// #define PRESSURES_DEBUG 1
Index: firmware/App/Modes/ModeHeatDisinfect.c
===================================================================
diff -u -re30951f62cdc9c52f20e9218df947d3860b3c7a7 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Modes/ModeHeatDisinfect.c (.../ModeHeatDisinfect.c) (revision e30951f62cdc9c52f20e9218df947d3860b3c7a7)
+++ firmware/App/Modes/ModeHeatDisinfect.c (.../ModeHeatDisinfect.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -252,22 +252,6 @@
/*********************************************************************//**
* @brief
- * The startDGHeatDisinfect function starts heat disinfect mode.
- * @details
- * Inputs: none
- * Outputs: none
- * @return: TRUE if the switch was successful
- *************************************************************************/
-BOOL startDGHeatDisinfect( void )
-{
- // TODO: make sure DG is not in the middle of something and it is in standby
- requestNewOperationMode( DG_MODE_HEAT );
-
- return TRUE; // TODO Check whether it is the right request before switching
-}
-
-/*********************************************************************//**
- * @brief
* The stopDGHeatDisinfect function stops heat disinfect mode.
* @details
* Inputs: heatDisinfectionState
@@ -656,17 +640,17 @@
{
// Set the actuators for evacuate recirculation path
setValveState( VPI, VALVE_STATE_OPEN );
- setValveState( VBF, VALVE_STATE_OPEN );
+ setValveState( VBF, VALVE_STATE_CLOSED );
setValveState( VSP, VALVE_STATE_CLOSED );
setValveState( VPD, VALVE_STATE_OPEN_C_TO_NO );
setValveState( VPO, VALVE_STATE_NOFILL_C_TO_NO );
setValveState( VDR, VALVE_STATE_DRAIN_C_TO_NO ); // C to NC
setValveState( VRC, VALVE_STATE_DRAIN_C_TO_NO ); // C to NC
- setValveState( VRO, VALVE_STATE_R2_C_TO_NO );
- setValveState( VRD, VALVE_STATE_R1_C_TO_NO );
+ setValveState( VRO, VALVE_STATE_R1_C_TO_NO );
+ setValveState( VRD, VALVE_STATE_R2_C_TO_NO );
setValveState( VRI, VALVE_STATE_R1_C_TO_NO );
setValveState( VRF, VALVE_STATE_R2_C_TO_NO );
- setROPumpTargetFlowRate( RO_PUMP_TARGET_FLOW_RATE_LPM );
+ setROPumpTargetFlowRate( 0.3 ); //RO_PUMP_TARGET_FLOW_RATE_LPM
stateTimer = getMSTimerCount(); // For evac recirc path. TODO later, it should be controlled using
// the composite pump
@@ -677,8 +661,8 @@
setActuatorsToFillWater();
// Start the UV reactors to disinfect the water that
// is being filled up
- startInletUVReactor();
- startOutletUVReactor();
+ //startInletUVReactor();
+ //startOutletUVReactor();
state = INTERNAL_HEAT_DISINFECT_STATE_FILL_WITH_WATER;
}
@@ -769,7 +753,7 @@
INTERNAL_HEAT_DISINFECT_STATE_T state = INTERNAL_HEAT_DISINFECT_STATE_EVACUATE_RECIRC_PATH;
// TODO change this to composition pump mode
- if ( didTimeout( stateTimer, HEAT_DISINFECT_EVAC_RECIRC_PATH_TIME_MS ) )
+ /*if ( didTimeout( stateTimer, HEAT_DISINFECT_EVAC_RECIRC_PATH_TIME_MS ) )
{
// Set the state to evacuate reservoir 1
signalROPumpHardStop();
@@ -787,7 +771,7 @@
setDrainPumpTargetSpeed( drainPumpTargetRPM ); //TODO commented for testing
state = INTERNAL_HEAT_DISINFECT_STATE_EVACUATE_R1;
- }
+ }*/
return state;
}
@@ -880,16 +864,16 @@
setValveState( VPO, VALVE_STATE_NOFILL_C_TO_NO );
setValveState( VDR, VALVE_STATE_DRAIN_C_TO_NO );
setValveState( VRC, VALVE_STATE_DRAIN_C_TO_NO );
- setValveState( VRO, VALVE_STATE_R2_C_TO_NO );
- setValveState( VRD, VALVE_STATE_R1_C_TO_NC );
+ setValveState( VRO, VALVE_STATE_R1_C_TO_NO );
+ setValveState( VRD, VALVE_STATE_R2_C_TO_NO );
setValveState( VRI, VALVE_STATE_R1_C_TO_NO );
setValveState( VRF, VALVE_STATE_R2_C_TO_NO );
//TODO composition pumps
signalROPumpHardStop();
signalDrainPumpHardStop();
- stopInletUVReactor();
- stopOutletUVReactor();
+ //stopInletUVReactor();
+ //stopOutletUVReactor();
stopPrimaryHeater();
stopTrimmerHeater();
}
Index: firmware/App/Modes/ModeHeatDisinfect.h
===================================================================
diff -u -rab304e2ca6e3e40ed8cb12650e9855ae0b9649d8 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Modes/ModeHeatDisinfect.h (.../ModeHeatDisinfect.h) (revision ab304e2ca6e3e40ed8cb12650e9855ae0b9649d8)
+++ firmware/App/Modes/ModeHeatDisinfect.h (.../ModeHeatDisinfect.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -41,7 +41,6 @@
DG_HEAT_DISINFECT_STATE_T getCurrentHeatDisinfectState( void ); // get the current state of the heat disinfect mode.
-BOOL startDGHeatDisinfect( void );
void stopDGHeatDisinfect( void );
BOOL testSetHeatDisinfectDataPublishIntervalOverride( U32 value );
Index: firmware/App/Modes/ModeStandby.c
===================================================================
diff -u -r54f45c387430e440ab4607451fc84dea61f273f1 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Modes/ModeStandby.c (.../ModeStandby.c) (revision 54f45c387430e440ab4607451fc84dea61f273f1)
+++ firmware/App/Modes/ModeStandby.c (.../ModeStandby.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -227,6 +227,22 @@
/*********************************************************************//**
* @brief
+ * The startDGHeatDisinfect function starts heat disinfect mode.
+ * @details
+ * Inputs: none
+ * Outputs: none
+ * @return: TRUE if the switch was successful
+ *************************************************************************/
+BOOL startDGHeatDisinfect( void )
+{
+ // TODO: make sure DG is not in the middle of something and it is in standby
+ requestNewOperationMode( DG_MODE_HEAT );
+
+ return TRUE; // TODO Check whether it is the right request before switching
+}
+
+/*********************************************************************//**
+ * @brief
* The getCurrentStandbyState function returns the current state of standby mode.
* @details
* Inputs : standbyState
Index: firmware/App/Modes/ModeStandby.h
===================================================================
diff -u -r54f45c387430e440ab4607451fc84dea61f273f1 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Modes/ModeStandby.h (.../ModeStandby.h) (revision 54f45c387430e440ab4607451fc84dea61f273f1)
+++ firmware/App/Modes/ModeStandby.h (.../ModeStandby.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -42,6 +42,8 @@
BOOL requestWaterSample( void ); // HD requests water sample
BOOL requestDGStart( void ); // HD requests DG start (go to re-circulate mode)
+BOOL startDGHeatDisinfect( void );
+
/**@}*/
#endif
Index: firmware/App/Services/AlarmMgmt.h
===================================================================
diff -u -r54f45c387430e440ab4607451fc84dea61f273f1 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Services/AlarmMgmt.h (.../AlarmMgmt.h) (revision 54f45c387430e440ab4607451fc84dea61f273f1)
+++ firmware/App/Services/AlarmMgmt.h (.../AlarmMgmt.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -144,6 +144,7 @@
SW_FAULT_ID_UTIL_INVALID_WIN_COUNT,
SW_FAULT_ID_UTIL_INVALID_WIN_MAX_COUNT,
SW_FAULT_ID_PERSISTENT_ALARM_INVALID_INDEX,
+ SW_FAULT_ID_UV_REACTORS_INVALID_EXEC_STATE, // 55
NUM_OF_SW_FAULT_IDS
} SW_FAULT_ID_T;
Index: firmware/App/Services/MessagePayloads.h
===================================================================
diff -u -rab304e2ca6e3e40ed8cb12650e9855ae0b9649d8 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Services/MessagePayloads.h (.../MessagePayloads.h) (revision ab304e2ca6e3e40ed8cb12650e9855ae0b9649d8)
+++ firmware/App/Services/MessagePayloads.h (.../MessagePayloads.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -67,16 +67,6 @@
F32 loadCellB2inGram; ///< Loadcell B2 measurement in gram
} LOAD_CELL_DATA_T;
-/// RO pump data struct.
-typedef struct
-{
- U32 setROPumpPressure; ///< RO pump pressure set target
- F32 measROFlowRate; ///< RO flow rate measurement
- F32 roPumpPWM; ///< RO pump pwm
- U32 roPumpState; ///< RO pump current state
- F32 roPumpTgtPressure; ///< RO pump target pressure
-} RO_PUMP_DATA_T;
-
/// Drain pump data struct.
typedef struct
{
Index: firmware/App/Services/SystemCommMessages.c
===================================================================
diff -u -rab304e2ca6e3e40ed8cb12650e9855ae0b9649d8 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Services/SystemCommMessages.c (.../SystemCommMessages.c) (revision ab304e2ca6e3e40ed8cb12650e9855ae0b9649d8)
+++ firmware/App/Services/SystemCommMessages.c (.../SystemCommMessages.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -41,6 +41,7 @@
#include "Valves.h"
#include "WatchdogMgmt.h"
#include "ModeHeatDisinfect.h"
+#include "UVReactors.h"
/**
* @addtogroup SystemCommMessages
@@ -505,30 +506,22 @@
* @details
* Inputs : none
* Outputs : RO pump data msg constructed and queued
- * @param tgtPressure target pressure for RO pump in PSI
- * @param measFlow measure RO flow rate in LPM
- * @param setPWM set PWM duty cycle in %
+ * @param RO Pump msg constructed and queued
* @return TRUE if msg successfully queued for transmit, FALSE if not
*************************************************************************/
-BOOL broadcastROPumpData( F32 tgtPressure, F32 measFlow, F32 setPWM, U32 pumpState )
+BOOL broadcastROPumpData( RO_PUMP_DATA_T *pumpData )
{
BOOL result;
MESSAGE_T msg;
U08 *payloadPtr = msg.payload;
- RO_PUMP_DATA_T payload;
// create a message record
blankMessage( &msg );
msg.hdr.msgID = MSG_ID_RO_PUMP_DATA;
msg.hdr.payloadLen = sizeof( RO_PUMP_DATA_T );
+
+ memcpy( payloadPtr, pumpData, sizeof( RO_PUMP_DATA_T ) );
- payload.roPumpTgtPressure = tgtPressure;
- payload.measROFlowRate = measFlow;
- payload.roPumpPWM = setPWM;
- payload.roPumpState = pumpState;
-
- memcpy( payloadPtr, &payload, sizeof( RO_PUMP_DATA_T ) );
-
// serialize the message (w/ sync, CRC, and appropriate CAN padding) and add serialized message data to appropriate comm buffer
result = serializeMessage( msg, COMM_BUFFER_OUT_CAN_DG_BROADCAST, ACK_NOT_REQUIRED );
@@ -741,6 +734,33 @@
return result;
}
+/*********************************************************************//**
+ * @brief
+ * The broadcastUVReactorsData function sends out UV reactors data.
+ * @details
+ * Inputs : none
+ * Outputs : UV reactors data msg constructed and queued
+ * @param UV reactors msg constructed and queued
+ * @return TRUE if msg successfully queued for transmit, FALSE if not
+ *************************************************************************/
+BOOL broadcastUVReactorsData( UV_REACTORS_DATA_T *uvReactorsData )
+{
+ BOOL result;
+ MESSAGE_T msg;
+ U08 *payloadPtr = msg.payload;
+
+ // create a message record
+ blankMessage( &msg );
+ msg.hdr.msgID = MSG_ID_DG_UV_REACTORS_DATA;
+ msg.hdr.payloadLen = sizeof( UV_REACTORS_DATA_T );
+
+ memcpy( payloadPtr, uvReactorsData, sizeof( UV_REACTORS_DATA_T ) );
+
+ // serialize the message (w/ sync, CRC, and appropriate CAN padding) and add serialized message data to appropriate comm buffer
+ result = serializeMessage( msg, COMM_BUFFER_OUT_CAN_DG_BROADCAST, ACK_NOT_REQUIRED );
+
+ return result;
+}
// ***********************************************************************
// **************** Message Handling Helper Functions ********************
Index: firmware/App/Services/SystemCommMessages.h
===================================================================
diff -u -rab304e2ca6e3e40ed8cb12650e9855ae0b9649d8 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/App/Services/SystemCommMessages.h (.../SystemCommMessages.h) (revision ab304e2ca6e3e40ed8cb12650e9855ae0b9649d8)
+++ firmware/App/Services/SystemCommMessages.h (.../SystemCommMessages.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -19,7 +19,9 @@
#define __SYSTEM_COMM_MESSAGES_H__
#include "DGCommon.h"
-#include "MsgQueues.h"
+#include "MsgQueues.h"
+#include "ROPump.h"
+#include "UVReactors.h"
/**
* @defgroup SystemCommMessages SystemCommMessages
@@ -58,7 +60,7 @@
BOOL broadcastValvesStates( U16 valvesStates );
// MSG_ID_RO_PUMP_DATA
-BOOL broadcastROPumpData( F32 tgtPressure, F32 measFlow, F32 setPWM, U32 pumpState );
+BOOL broadcastROPumpData( RO_PUMP_DATA_T *pumpData );
// MSG_ID_DRAIN_PUMP_DATA
BOOL broadcastDrainPumpData( U32 tgtSpeed, U32 dac, F32 deltaP, U32 drainPumpState );
@@ -115,8 +117,11 @@
BOOL broadcastTemperatureSensorsData ( U08 *sensorsValue, U32 byteLength );
//MSG_ID_DG_HEAT_DISINFECT_DATA
-BOOL broadcastHeatDisinfectData( U32 internalState, F32 minutesElapsed, U32 currentCycle );
+BOOL broadcastHeatDisinfectData( U32 internalState, F32 minutesElapsed, U32 currentCycle );
+// MSG_ID_DG_UV_REACTORS_DATA
+BOOL broadcastUVReactorsData( UV_REACTORS_DATA_T *uvReactorsData );
+
// *********** public test support message functions **********
#ifdef DEBUG_ENABLED
Index: firmware/DG.dil
===================================================================
diff -u -r73113d51d6ca20fd4e34d69d241fbb18bb70dc1e -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/DG.dil (.../DG.dil) (revision 73113d51d6ca20fd4e34d69d241fbb18bb70dc1e)
+++ firmware/DG.dil (.../DG.dil) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -1,4 +1,4 @@
-# RM46L852PGE 07/27/20 12:39:13
+# RM46L852PGE 10/22/20 16:10:53
#
ARCH=RM46L852PGE
#
@@ -311,7 +311,7 @@
DRIVER.SYSTEM.VAR.VIM_CHANNEL_8_INT_ENABLE.VALUE=0
DRIVER.SYSTEM.VAR.SAFETY_INIT_STC_CPUSELFTEST_ENA.VALUE=0
DRIVER.SYSTEM.VAR.ETPWM2_ENABLE.VALUE=1
-DRIVER.SYSTEM.VAR.HET1_ENABLE.VALUE=0
+DRIVER.SYSTEM.VAR.HET1_ENABLE.VALUE=1
DRIVER.SYSTEM.VAR.CLKT_RTI1_PRE_SOURCE.VALUE=PLL1
DRIVER.SYSTEM.VAR.FLASH_MODE_VALUE.VALUE=1
DRIVER.SYSTEM.VAR.CORE_MPU_REGION_5_SIZE_VALUE.VALUE=0x19
@@ -923,7 +923,7 @@
DRIVER.SYSTEM.VAR.VIM_CHANNEL_19_INT_PRAGMA_ENABLE.VALUE=0
DRIVER.SYSTEM.VAR.SAFETY_INIT_FRAY_RAMPARITYCHECK_ENA.VALUE=0
DRIVER.SYSTEM.VAR.SAFETY_INIT_DMA_DP_PBISTCHECK_ENA.VALUE=0x00000800
-DRIVER.SYSTEM.VAR.HET_ENABLE.VALUE=0
+DRIVER.SYSTEM.VAR.HET_ENABLE.VALUE=1
DRIVER.SYSTEM.VAR.PBIST_ALGO_13_14.VALUE=0
DRIVER.SYSTEM.VAR.RAM_STACK_UNDEF_BASE.VALUE=0x08004800
DRIVER.SYSTEM.VAR.RAM_STACK_SVC_BASE.VALUE=0x08001000
@@ -6472,7 +6472,7 @@
DRIVER.HET.VAR.HET1_EDGE5_EVENT.VALUE=1
DRIVER.HET.VAR.HET1_EDGE1_BOTH.VALUE=0
DRIVER.HET.VAR.HET1_PWM5_PERIOD_LVL.VALUE=0x00000000
-DRIVER.HET.VAR.HET1_BIT24_DIR.VALUE=0x00000000
+DRIVER.HET.VAR.HET1_BIT24_DIR.VALUE=0x01000000
DRIVER.HET.VAR.HET1_BIT16_DIR.VALUE=0x00000000
DRIVER.HET.VAR.HET2_PWM1_POLARITY.VALUE=3
DRIVER.HET.VAR.HET2_BIT18_ANDSHARE.VALUE=0x00000000
@@ -7278,7 +7278,7 @@
DRIVER.PINMUX.VAR.DMA_PRITY_1_VALUE.VALUE=0x0001
DRIVER.PINMUX.VAR.PINMUX11.VALUE=PINMUX_PIN_91_HET1_24
DRIVER.PINMUX.VAR.DMA_PRITY_12.VALUE=FIXED
-DRIVER.PINMUX.VAR.PINMUX20.VALUE=PINMUX_PIN_130_HET1_17
+DRIVER.PINMUX.VAR.PINMUX20.VALUE=PINMUX_PIN_130_MIBSPI1NCS_1
DRIVER.PINMUX.VAR.PINMUX12.VALUE="PINMUX_PIN_92_HET1_26 | PINMUX_PIN_96_MIBSPI1NENA | PINMUX_PIN_97_MIBSPI5NENA"
DRIVER.PINMUX.VAR.DMA_PRITY_13.VALUE=FIXED
DRIVER.PINMUX.VAR.PINMUX21.VALUE=PINMUX_PIN_133_GIOB_1
@@ -7402,7 +7402,7 @@
DRIVER.PINMUX.VAR.MUX75_OPTION4.VALUE=0
DRIVER.PINMUX.VAR.MUX67_OPTION4.VALUE=0
DRIVER.PINMUX.VAR.MUX59_OPTION4.VALUE=0
-DRIVER.PINMUX.VAR.MUX6_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX6_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.DMA_CHANNEL_29.VALUE=CHANNEL0
DRIVER.PINMUX.VAR.DMA_FIDXS_7.VALUE=0
DRIVER.PINMUX.VAR.DMA_AIM_7.VALUE=ENABLED
@@ -7422,7 +7422,7 @@
DRIVER.PINMUX.VAR.MUX6_OPTION3.VALUE=0
DRIVER.PINMUX.VAR.MUX60_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX52_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX44_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX44_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX36_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX28_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX6_OPTION4.VALUE=0
@@ -7498,7 +7498,7 @@
DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_16.VALUE=0
DRIVER.PINMUX.VAR.DMA_STADD_2.VALUE=0
DRIVER.PINMUX.VAR.MUX21_OPTION0.VALUE=1
-DRIVER.PINMUX.VAR.MUX13_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX13_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.DMA_TTYPE_25.VALUE=FRAME_TRANSFER
DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_25.VALUE=0
DRIVER.PINMUX.VAR.DMA_TTYPE_17.VALUE=FRAME_TRANSFER
@@ -7519,7 +7519,7 @@
DRIVER.PINMUX.VAR.PIN_MUX_71_SELECT.VALUE=0
DRIVER.PINMUX.VAR.PIN_MUX_63_SELECT.VALUE=0
DRIVER.PINMUX.VAR.PIN_MUX_55_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_47_SELECT.VALUE=1
+DRIVER.PINMUX.VAR.PIN_MUX_47_SELECT.VALUE=0
DRIVER.PINMUX.VAR.PIN_MUX_39_SELECT.VALUE=0
DRIVER.PINMUX.VAR.DMA_TTYPE_27.VALUE=FRAME_TRANSFER
DRIVER.PINMUX.VAR.DMA_CP0_IDADDR_27.VALUE=0
@@ -7668,7 +7668,7 @@
DRIVER.PINMUX.VAR.DMA_ADDMW_6.VALUE=CONSTANT
DRIVER.PINMUX.VAR.DMA_INTFTCEN_2.VALUE=1
DRIVER.PINMUX.VAR.MUX51_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX43_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX43_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX35_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX27_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX19_OPTION0.VALUE=0
@@ -7737,7 +7737,7 @@
DRIVER.PINMUX.VAR.DMA_INTMP_2_VALUE.VALUE=0x0001
DRIVER.PINMUX.VAR.DMA_INTEN_16.VALUE=1
DRIVER.PINMUX.VAR.MUX20_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX12_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX12_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX20_OPTION1.VALUE=1
DRIVER.PINMUX.VAR.MUX12_OPTION1.VALUE=0
DRIVER.PINMUX.VAR.MUX20_OPTION2.VALUE=0
@@ -7872,7 +7872,7 @@
DRIVER.PINMUX.VAR.MUX73_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX65_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX57_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX49_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX49_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.DMA_FIDXS_25.VALUE=0
DRIVER.PINMUX.VAR.DMA_AIM_25.VALUE=ENABLED
DRIVER.PINMUX.VAR.DMA_FIDXS_17.VALUE=0
@@ -7943,7 +7943,7 @@
DRIVER.PINMUX.VAR.DMA_BYP_12.VALUE=1
DRIVER.PINMUX.VAR.DMA_INTBTCEN_2.VALUE=1
DRIVER.PINMUX.VAR.MUX50_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX42_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX42_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX34_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX26_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX18_OPTION0.VALUE=0
@@ -8183,8 +8183,8 @@
DRIVER.PINMUX.VAR.DMA_ADDMR_12.VALUE=CONSTANT
DRIVER.PINMUX.VAR.DMA_INTEN_6.VALUE=1
DRIVER.PINMUX.VAR.EMIF.VALUE=0
-DRIVER.PINMUX.VAR.MUX41_OPTION0.VALUE=1
-DRIVER.PINMUX.VAR.MUX33_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX41_OPTION0.VALUE=0
+DRIVER.PINMUX.VAR.MUX33_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX25_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX17_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX3_OPTION4.VALUE=0
@@ -8380,7 +8380,7 @@
DRIVER.PINMUX.VAR.MUX94_OPTION4.VALUE=0
DRIVER.PINMUX.VAR.MUX86_OPTION4.VALUE=0
DRIVER.PINMUX.VAR.MUX78_OPTION4.VALUE=0
-DRIVER.PINMUX.VAR.MUX9_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX9_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX9_OPTION1.VALUE=0
DRIVER.PINMUX.VAR.DMA_EIDXD_0.VALUE=0
DRIVER.PINMUX.VAR.DMA_CHPR_10.VALUE=HIGH
@@ -8407,7 +8407,7 @@
DRIVER.PINMUX.VAR.MUX71_OPTION1.VALUE=0
DRIVER.PINMUX.VAR.MUX63_OPTION1.VALUE=0
DRIVER.PINMUX.VAR.MUX55_OPTION1.VALUE=0
-DRIVER.PINMUX.VAR.MUX47_OPTION1.VALUE=1
+DRIVER.PINMUX.VAR.MUX47_OPTION1.VALUE=0
DRIVER.PINMUX.VAR.MUX39_OPTION1.VALUE=0
DRIVER.PINMUX.VAR.MUX9_OPTION5.VALUE=0
DRIVER.PINMUX.VAR.DMA_ADDMW_10.VALUE=CONSTANT
@@ -8486,7 +8486,7 @@
DRIVER.PINMUX.VAR.DMA_IET_COUNT_6.VALUE=0
DRIVER.PINMUX.VAR.DMA_TRIG_12.VALUE=HARDWARE_TRIGGER
DRIVER.PINMUX.VAR.MUX40_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX32_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX32_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX24_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX16_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX2_OPTION4.VALUE=0
@@ -8691,7 +8691,7 @@
DRIVER.PINMUX.VAR.MUX70_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX62_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX54_OPTION0.VALUE=0
-DRIVER.PINMUX.VAR.MUX46_OPTION0.VALUE=1
+DRIVER.PINMUX.VAR.MUX46_OPTION0.VALUE=0
DRIVER.PINMUX.VAR.MUX38_OPTION0.VALUE=1
DRIVER.PINMUX.VAR.MUX8_OPTION4.VALUE=0
DRIVER.PINMUX.VAR.MUX70_OPTION1.VALUE=0
Index: firmware/DG.hcg
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/DG.hcg (.../DG.hcg) (revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/DG.hcg (.../DG.hcg) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -292,7 +292,9 @@
htu.h
-
+
+ het.c
+
@@ -596,7 +598,7 @@
include\htu.h
-
+ source\het.c
Index: firmware/include/het.h
===================================================================
diff -u -reff7b1575f008f81b29ef906f6346fac6012d3ab -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/include/het.h (.../het.h) (revision eff7b1575f008f81b29ef906f6346fac6012d3ab)
+++ firmware/include/het.h (.../het.h) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -331,9 +331,274 @@
uint32 CONFIG_PCR;
} het_config_reg_t;
+/* Configuration registers initial value for HET1*/
+#define HET1_DIR_CONFIGVALUE ((uint32)0x80000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x10000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x01000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00400000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00080000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00020000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00008000U \
+ | (uint32)0x00004000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000800U \
+ | (uint32)0x00000400U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000008U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000002U \
+ | (uint32)0x00000001U)
+#define HET1_PDR_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_PULDIS_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_PSL_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00080000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00020000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00008000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_HRSH_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00001000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000008U \
+ | (uint32)0x00000004U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+#define HET1_AND_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_XOR_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_PFR_CONFIGVALUE (((uint32)7U << 8U) | (uint32)0U)
+
+#define HET1_PRY_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_INTENAC_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_INTENAS_CONFIGVALUE ((uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U \
+ | (uint32)0x00000000U)
+
+#define HET1_PCR_CONFIGVALUE ((uint32)0x00000005U)
+#define HET1_GCR_CONFIGVALUE 0x00030001U
+
+
+
+
/**
* @defgroup HET HET
* @brief HighEnd Timer Module.
@@ -378,6 +643,7 @@
/* Timestamp Interface Functions */
void hetResetTimestamp(hetRAMBASE_t * hetRAM);
uint32 hetGetTimestamp(hetRAMBASE_t * hetRAM);
+void het1GetConfigValue(het_config_reg_t *config_reg, config_value_type_t type);
/** @fn void hetNotification(hetBASE_t *het, uint32 offset)
* @brief het interrupt callback
Index: firmware/source/het.c
===================================================================
diff -u
--- firmware/source/het.c (revision 0)
+++ firmware/source/het.c (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -0,0 +1,1936 @@
+/** @file het.c
+* @brief HET Driver Implementation File
+* @date 11-Dec-2018
+* @version 04.07.01
+*
+*/
+
+/*
+* Copyright (C) 2009-2018 Texas Instruments Incorporated - www.ti.com
+*
+*
+* Redistribution and use in source and binary forms, with or without
+* modification, are permitted provided that the following conditions
+* are met:
+*
+* Redistributions of source code must retain the above copyright
+* notice, this list of conditions and the following disclaimer.
+*
+* Redistributions in binary form must reproduce the above copyright
+* notice, this list of conditions and the following disclaimer in the
+* documentation and/or other materials provided with the
+* distribution.
+*
+* Neither the name of Texas Instruments Incorporated nor the names of
+* its contributors may be used to endorse or promote products derived
+* from this software without specific prior written permission.
+*
+* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*
+*/
+
+
+#include "het.h"
+#include "sys_vim.h"
+/* USER CODE BEGIN (0) */
+/* USER CODE END */
+
+/*----------------------------------------------------------------------------*/
+/* Global variables */
+
+static const uint32 s_het1pwmPolarity[8U] =
+{
+ 3U,
+ 3U,
+ 3U,
+ 3U,
+ 3U,
+ 3U,
+ 3U,
+ 3U,
+};
+
+
+/*----------------------------------------------------------------------------*/
+/* Default Program */
+
+/** @var static const hetINSTRUCTION_t het1PROGRAM[58]
+* @brief Default Program
+*
+* Het program running after initialization.
+*/
+
+static const hetINSTRUCTION_t het1PROGRAM[58U] =
+{
+ /* CNT: Timebase
+ * - Instruction = 0
+ * - Next instruction = 1
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = na
+ * - Reg = T
+ */
+ {
+ /* Program */
+ 0x00002C80U,
+ /* Control */
+ 0x01FFFFFFU,
+ /* Data */
+ 0xFFFFFF80U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 0 -> Duty Cycle
+ * - Instruction = 1
+ * - Next instruction = 2
+ * - Conditional next instruction = 2
+ * - Interrupt = 1
+ * - Pin = 8
+ */
+ {
+ /* Program */
+ 0x000055C0U,
+ /* Control */
+ (0x00004006U | (uint32)((uint32)8U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 0 -> Period
+ * - Instruction = 2
+ * - Next instruction = 3
+ * - Conditional next instruction = 41
+ * - Interrupt = 2
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x00007480U,
+ /* Control */
+ 0x00052006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 1 -> Duty Cycle
+ * - Instruction = 3
+ * - Next instruction = 4
+ * - Conditional next instruction = 4
+ * - Interrupt = 3
+ * - Pin = 10
+ */
+ {
+ /* Program */
+ 0x000095C0U,
+ /* Control */
+ (0x00008006U | (uint32)((uint32)10U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 1 -> Period
+ * - Instruction = 4
+ * - Next instruction = 5
+ * - Conditional next instruction = 43
+ * - Interrupt = 4
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0000B480U,
+ /* Control */
+ 0x00056006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 2 -> Duty Cycle
+ * - Instruction = 5
+ * - Next instruction = 6
+ * - Conditional next instruction = 6
+ * - Interrupt = 5
+ * - Pin = 12
+ */
+ {
+ /* Program */
+ 0x0000D5C0U,
+ /* Control */
+ (0x0000C006U | (uint32)((uint32)12U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 2 -> Period
+ * - Instruction = 6
+ * - Next instruction = 7
+ * - Conditional next instruction = 45
+ * - Interrupt = 6
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0000F480U,
+ /* Control */
+ 0x0005A006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 3 -> Duty Cycle
+ * - Instruction = 7
+ * - Next instruction = 8
+ * - Conditional next instruction = 8
+ * - Interrupt = 7
+ * - Pin = 14
+ */
+ {
+ /* Program */
+ 0x000115C0U,
+ /* Control */
+ (0x00010006U | (uint32)((uint32)14U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 3 -> Period
+ * - Instruction = 8
+ * - Next instruction = 9
+ * - Conditional next instruction = 47
+ * - Interrupt = 8
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x00013480U,
+ /* Control */
+ 0x0005E006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 4 -> Duty Cycle
+ * - Instruction = 9
+ * - Next instruction = 10
+ * - Conditional next instruction = 10
+ * - Interrupt = 9
+ * - Pin = 16
+ */
+ {
+ /* Program */
+ 0x000155C0U,
+ /* Control */
+ (0x00014006U | (uint32)((uint32)16U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 4 -> Period
+ * - Instruction = 10
+ * - Next instruction = 11
+ * - Conditional next instruction = 49
+ * - Interrupt = 10
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x00017480U,
+ /* Control */
+ 0x00062006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 5 -> Duty Cycle
+ * - Instruction = 11
+ * - Next instruction = 12
+ * - Conditional next instruction = 12
+ * - Interrupt = 11
+ * - Pin = 17
+ */
+ {
+ /* Program */
+ 0x000195C0U,
+ /* Control */
+ (0x00018006U | (uint32)((uint32)17U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 5 -> Period
+ * - Instruction = 12
+ * - Next instruction = 13
+ * - Conditional next instruction = 51
+ * - Interrupt = 12
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0001B480U,
+ /* Control */
+ 0x00066006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 6 -> Duty Cycle
+ * - Instruction = 13
+ * - Next instruction = 14
+ * - Conditional next instruction = 14
+ * - Interrupt = 13
+ * - Pin = 18
+ */
+ {
+ /* Program */
+ 0x0001D5C0U,
+ /* Control */
+ (0x0001C006U | (uint32)((uint32)18U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 6 -> Period
+ * - Instruction = 14
+ * - Next instruction = 15
+ * - Conditional next instruction = 53
+ * - Interrupt = 14
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0001F480U,
+ /* Control */
+ 0x0006A006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PWCNT: PWM 7 -> Duty Cycle
+ * - Instruction = 15
+ * - Next instruction = 16
+ * - Conditional next instruction = 16
+ * - Interrupt = 15
+ * - Pin = 19
+ */
+ {
+ /* Program */
+ 0x000215C0U,
+ /* Control */
+ (0x00020006U | (uint32)((uint32)19U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* DJZ: PWM 7 -> Period
+ * - Instruction = 16
+ * - Next instruction = 17
+ * - Conditional next instruction = 55
+ * - Interrupt = 16
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x00023480U,
+ /* Control */
+ 0x0006E006U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 0
+ * - Instruction = 17
+ * - Next instruction = 18
+ * - Conditional next instruction = 18
+ * - Interrupt = 17
+ * - Pin = 9
+ */
+ {
+ /* Program */
+ 0x00025440U,
+ /* Control */
+ (0x00024007U | (uint32)((uint32)9U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 1
+ * - Instruction = 18
+ * - Next instruction = 19
+ * - Conditional next instruction = 19
+ * - Interrupt = 18
+ * - Pin = 11
+ */
+ {
+ /* Program */
+ 0x00027440U,
+ /* Control */
+ (0x00026007U | (uint32)((uint32)11U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 2
+ * - Instruction = 19
+ * - Next instruction = 20
+ * - Conditional next instruction = 20
+ * - Interrupt = 19
+ * - Pin = 13
+ */
+ {
+ /* Program */
+ 0x00029440U,
+ /* Control */
+ (0x00028007U | (uint32)((uint32)13U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 3
+ * - Instruction = 20
+ * - Next instruction = 21
+ * - Conditional next instruction = 21
+ * - Interrupt = 20
+ * - Pin = 15
+ */
+ {
+ /* Program */
+ 0x0002B440U,
+ /* Control */
+ (0x0002A007U | (uint32)((uint32)15U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 4
+ * - Instruction = 21
+ * - Next instruction = 22
+ * - Conditional next instruction = 22
+ * - Interrupt = 21
+ * - Pin = 20
+ */
+ {
+ /* Program */
+ 0x0002D440U,
+ /* Control */
+ (0x0002C007U | (uint32)((uint32)20U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 5
+ * - Instruction = 22
+ * - Next instruction = 23
+ * - Conditional next instruction = 23
+ * - Interrupt = 22
+ * - Pin = 21
+ */
+ {
+ /* Program */
+ 0x0002F440U,
+ /* Control */
+ (0x0002E007U | (uint32)((uint32)21U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 6
+ * - Instruction = 23
+ * - Next instruction = 24
+ * - Conditional next instruction = 24
+ * - Interrupt = 23
+ * - Pin = 22
+ */
+ {
+ /* Program */
+ 0x00031440U,
+ /* Control */
+ (0x00030007U | (uint32)((uint32)22U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* ECNT: CCU Edge 7
+ * - Instruction = 24
+ * - Next instruction = 25
+ * - Conditional next instruction = 25
+ * - Interrupt = 24
+ * - Pin = 23
+ */
+ {
+ /* Program */
+ 0x00033440U,
+ /* Control */
+ (0x00032007U | (uint32)((uint32)23U << 8U) | (uint32)((uint32)1U << 4U)),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 0
+ * - Instruction = 25
+ * - Next instruction = 26
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 0
+ */
+ {
+ /* Program */
+ 0x00034E00U | (uint32)((uint32)0U << 6U) | (uint32)(0U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 0
+ * - Instruction = 26
+ * - Next instruction = 27
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 0 + 1
+ */
+ {
+ /* Program */
+ 0x00036E80U | (uint32)((uint32)0U << 6U) | (uint32)((0U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 1
+ * - Instruction = 27
+ * - Next instruction = 28
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 2
+ */
+ {
+ /* Program */
+ 0x00038E00U | (uint32)((uint32)0U << 6U) | (uint32)(2U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 1
+ * - Instruction = 28
+ * - Next instruction = 29
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 2 + 1
+ */
+ {
+ /* Program */
+ 0x0003AE80U | (uint32)((uint32)0U << 6U) | (uint32)((2U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 2
+ * - Instruction = 29
+ * - Next instruction = 30
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 4
+ */
+ {
+ /* Program */
+ 0x0003CE00U | (uint32)((uint32)0U << 6U) | (uint32)(4U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 2
+ * - Instruction = 30
+ * - Next instruction = 31
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 4 + 1
+ */
+ {
+ /* Program */
+ 0x0003EE80U | (uint32)((uint32)0U << 6U) | (uint32)((4U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 3
+ * - Instruction = 31
+ * - Next instruction = 32
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 6
+ */
+ {
+ /* Program */
+ 0x00040E00U | (uint32)((uint32)0U << 6U) | (uint32)(6U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 3
+ * - Instruction = 32
+ * - Next instruction = 33
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 6 + 1
+ */
+ {
+ /* Program */
+ 0x00042E80U | (uint32)((uint32)0U << 6U) | (uint32)((6U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 4
+ * - Instruction = 33
+ * - Next instruction = 34
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 24
+ */
+ {
+ /* Program */
+ 0x00044E00U | (uint32)((uint32)0U << 6U) | (uint32)(24U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 4
+ * - Instruction = 34
+ * - Next instruction = 35
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 24 + 1
+ */
+ {
+ /* Program */
+ 0x00046E80U | (uint32)((uint32)0U << 6U) | (uint32)((24U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 5
+ * - Instruction = 35
+ * - Next instruction = 36
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 26
+ */
+ {
+ /* Program */
+ 0x00048E00U | (uint32)((uint32)0U << 6U) | (uint32)(26U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 5
+ * - Instruction = 36
+ * - Next instruction = 37
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 26 + 1
+ */
+ {
+ /* Program */
+ 0x0004AE80U | (uint32)((uint32)0U << 6U) | (uint32)((26U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 6
+ * - Instruction = 37
+ * - Next instruction = 38
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 28
+ */
+ {
+ /* Program */
+ 0x0004CE00U | (uint32)((uint32)0U << 6U) | (uint32)(28U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 6
+ * - Instruction = 38
+ * - Next instruction = 39
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 28 + 1
+ */
+ {
+ /* Program */
+ 0x0004EE80U | (uint32)((uint32)0U << 6U) | (uint32)((28U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Duty 7
+ * - Instruction = 39
+ * - Next instruction = 40
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 30
+ */
+ {
+ /* Program */
+ 0x00050E00U | (uint32)((uint32)0U << 6U) | (uint32)(30U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* PCNT: Capture Period 7
+ * - Instruction = 40
+ * - Next instruction = 57
+ * - Conditional next instruction = na
+ * - Interrupt = na
+ * - Pin = 30 + 1
+ */
+ {
+ /* Program */
+ 0x00072E80U | (uint32)((uint32)0U << 6U) | (uint32)((30U) + 1U),
+ /* Control */
+ 0x00000000U,
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 0 -> Duty Cycle Update
+ * - Instruction = 41
+ * - Next instruction = 42
+ * - Conditional next instruction = 2
+ * - Interrupt = 1
+ * - Pin = 8
+ */
+ {
+ /* Program */
+ 0x00054201U,
+ /* Control */
+ (0x00004007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)8U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 0 -> Period Update
+ * - Instruction = 42
+ * - Next instruction = 3
+ * - Conditional next instruction = 41
+ * - Interrupt = 2
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x00006202U,
+ /* Control */
+ (0x00052007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 1 -> Duty Cycle Update
+ * - Instruction = 43
+ * - Next instruction = 44
+ * - Conditional next instruction = 4
+ * - Interrupt = 3
+ * - Pin = 10
+ */
+ {
+ /* Program */
+ 0x00058203U,
+ /* Control */
+ (0x00008007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)10U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 1 -> Period Update
+ * - Instruction = 44
+ * - Next instruction = 5
+ * - Conditional next instruction = 43
+ * - Interrupt = 4
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0000A204U,
+ /* Control */
+ (0x00056007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 2 -> Duty Cycle Update
+ * - Instruction = 45
+ * - Next instruction = 46
+ * - Conditional next instruction = 6
+ * - Interrupt = 5
+ * - Pin = 12
+ */
+ {
+ /* Program */
+ 0x0005C205U,
+ /* Control */
+ (0x0000C007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)12U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 2 -> Period Update
+ * - Instruction = 46
+ * - Next instruction = 7
+ * - Conditional next instruction = 45
+ * - Interrupt = 6
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0000E206U,
+ /* Control */
+ (0x0005A007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 3 -> Duty Cycle Update
+ * - Instruction = 47
+ * - Next instruction = 48
+ * - Conditional next instruction = 8
+ * - Interrupt = 7
+ * - Pin = 14
+ */
+ {
+ /* Program */
+ 0x00060207U,
+ /* Control */
+ (0x00010007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)14U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 3 -> Period Update
+ * - Instruction = 48
+ * - Next instruction = 9
+ * - Conditional next instruction = 47
+ * - Interrupt = 8
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x00012208U,
+ /* Control */
+ (0x0005E007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 4 -> Duty Cycle Update
+ * - Instruction = 49
+ * - Next instruction = 50
+ * - Conditional next instruction = 10
+ * - Interrupt = 9
+ * - Pin = 16
+ */
+ {
+ /* Program */
+ 0x00064209U,
+ /* Control */
+ (0x00014007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)16U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 4 -> Period Update
+ * - Instruction = 50
+ * - Next instruction = 11
+ * - Conditional next instruction = 49
+ * - Interrupt = 10
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0001620AU,
+ /* Control */
+ (0x00062007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 5 -> Duty Cycle Update
+ * - Instruction = 51
+ * - Next instruction = 52
+ * - Conditional next instruction = 12
+ * - Interrupt = 11
+ * - Pin = 17
+ */
+ {
+ /* Program */
+ 0x0006820BU,
+ /* Control */
+ (0x00018007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)17U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 5 -> Period Update
+ * - Instruction = 52
+ * - Next instruction = 13
+ * - Conditional next instruction = 51
+ * - Interrupt = 12
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0001A20CU,
+ /* Control */
+ (0x00066007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 6 -> Duty Cycle Update
+ * - Instruction = 53
+ * - Next instruction = 54
+ * - Conditional next instruction = 14
+ * - Interrupt = 13
+ * - Pin = 18
+ */
+ {
+ /* Program */
+ 0x0006C20DU,
+ /* Control */
+ (0x0001C007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)18U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 6 -> Period Update
+ * - Instruction = 54
+ * - Next instruction = 15
+ * - Conditional next instruction = 53
+ * - Interrupt = 14
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x0001E20EU,
+ /* Control */
+ (0x0006A007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 7 -> Duty Cycle Update
+ * - Instruction = 55
+ * - Next instruction = 56
+ * - Conditional next instruction = 16
+ * - Interrupt = 15
+ * - Pin = 19
+ */
+ {
+ /* Program */
+ 0x0007020FU,
+ /* Control */
+ (0x00020007U | (uint32)((uint32)0U << 22U) | (uint32)((uint32)19U << 8U) | (uint32)((uint32)3U << 3U)),
+ /* Data */
+ 51968U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* MOV64: PWM 7 -> Period Update
+ * - Instruction = 56
+ * - Next instruction = 17
+ * - Conditional next instruction = 55
+ * - Interrupt = 16
+ * - Pin = na
+ */
+ {
+ /* Program */
+ 0x00022210U,
+ /* Control */
+ (0x0006E007U),
+ /* Data */
+ 103296U,
+ /* Reserved */
+ 0x00000000U
+ },
+ /* WCAP: Capture timestamp
+ * - Instruction = 57
+ * - Next instruction = 0
+ * - Conditional next instruction = 0
+ * - Interrupt = na
+ * - Pin = na
+ * - Reg = T
+ */
+ {
+ /* Program */
+ 0x00001600U,
+ /* Control */
+ (0x00000004U),
+ /* Data */
+ 0x00000000U,
+ /* Reserved */
+ 0x00000000U
+ },
+};
+
+
+
+/** @fn void hetInit(void)
+* @brief Initializes the het Driver
+*
+* This function initializes the het 1 module.
+*/
+/* SourceId : HET_SourceId_001 */
+/* DesignId : HET_DesignId_001 */
+/* Requirements : HL_SR363 */
+void hetInit(void)
+{
+ /** @b initialize @b HET */
+
+ /** - Set HET pins default output value */
+ hetREG1->DOUT = (uint32)((uint32)0U << 31U)
+ | (uint32)((uint32)0U << 30U)
+ | (uint32)((uint32)0U << 29U)
+ | (uint32)((uint32)0U << 28U)
+ | (uint32)((uint32)0U << 27U)
+ | (uint32)((uint32)0U << 26U)
+ | (uint32)((uint32)0U << 25U)
+ | (uint32)((uint32)0U << 24U)
+ | (uint32)((uint32)0U << 23U)
+ | (uint32)((uint32)0U << 22U)
+ | (uint32)((uint32)0U << 21U)
+ | (uint32)((uint32)0U << 20U)
+ | (uint32)((uint32)0U << 19U)
+ | (uint32)((uint32)0U << 18U)
+ | (uint32)((uint32)0U << 17U)
+ | (uint32)((uint32)0U << 16U)
+ | (uint32)((uint32)1U << 15U)
+ | (uint32)((uint32)0U << 14U)
+ | (uint32)((uint32)0U << 13U)
+ | (uint32)((uint32)0U << 12U)
+ | (uint32)((uint32)0U << 11U)
+ | (uint32)((uint32)0U << 10U)
+ | (uint32)((uint32)0U << 9U)
+ | (uint32)((uint32)0U << 8U)
+ | (uint32)((uint32)0U << 7U)
+ | (uint32)((uint32)0U << 6U)
+ | (uint32)((uint32)0U << 5U)
+ | (uint32)((uint32)0U << 4U)
+ | (uint32)((uint32)0U << 3U)
+ | (uint32)((uint32)0U << 2U)
+ | (uint32)((uint32)0U << 1U)
+ | (uint32)((uint32)0U << 0U);
+
+ /** - Set HET pins direction */
+ hetREG1->DIR = (uint32) 0x80000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x10000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x01000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00400000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00080000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00020000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00008000U
+ | (uint32) 0x00004000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000800U
+ | (uint32) 0x00000400U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000008U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000002U
+ | (uint32) 0x00000001U;
+
+ /** - Set HET pins open drain enable */
+ hetREG1->PDR = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+ /** - Set HET pins pullup/down enable */
+ hetREG1->PULDIS = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+ /** - Set HET pins pullup/down select */
+ hetREG1->PSL = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00080000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00020000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00008000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+ /** - Set HET pins high resolution share */
+ hetREG1->HRSH = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00001000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000008U
+ | (uint32) 0x00000004U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+ /** - Set HET pins AND share */
+ hetREG1->AND = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+ /** - Set HET pins XOR share */
+ hetREG1->XOR = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+/* USER CODE BEGIN (1) */
+/* USER CODE END */
+
+ /** - Setup prescaler values
+ * - Loop resolution prescaler
+ * - High resolution prescaler
+ */
+ hetREG1->PFR = (uint32)((uint32) 7U << 8U)
+ | ((uint32) 0U);
+
+
+ /** - Parity control register
+ * - Enable/Disable Parity check
+ */
+ hetREG1->PCR = (uint32) 0x00000005U;
+
+ /** - Fill HET RAM with opcodes and Data */
+ /*SAFETYMCUSW 94 S MR:11.1,11.2,11.4 "HET RAM Fill from the table - Allowed as per MISRA rule 11.2" */
+ /*SAFETYMCUSW 94 S MR:11.1,11.2,11.4 "HET RAM Fill from the table - Allowed as per MISRA rule 11.2" */
+ /*SAFETYMCUSW 95 S MR:11.1,11.4 "HET RAM Fill from the table - Allowed as per MISRA rule 11.2" */
+ /*SAFETYMCUSW 95 S MR:11.1,11.4 "HET RAM Fill from the table - Allowed as per MISRA rule 11.2" */
+ (void)memcpy((void *)hetRAM1, (const void *)het1PROGRAM, sizeof(het1PROGRAM));
+
+ /** - Setup interrupt priority level
+ * - PWM 0 end of duty level
+ * - PWM 0 end of period level
+ * - PWM 1 end of duty level
+ * - PWM 1 end of period level
+ * - PWM 2 end of duty level
+ * - PWM 2 end of period level
+ * - PWM 3 end of duty level
+ * - PWM 3 end of period level
+ * - PWM 4 end of duty level
+ * - PWM 4 end of period level
+ * - PWM 5 end of duty level
+ * - PWM 5 end of period level
+ * - PWM 6 end of duty level
+ * - PWM 6 end of period level
+ * - PWM 7 end of duty level
+ * - PWM 7 end of period level
+
+ * - CCU Edge Detection 0 level
+ * - CCU Edge Detection 1 level
+ * - CCU Edge Detection 2 level
+ * - CCU Edge Detection 3 level
+ * - CCU Edge Detection 4 level
+ * - CCU Edge Detection 5 level
+ * - CCU Edge Detection 6 level
+ * - CCU Edge Detection 7 level
+ */
+ hetREG1->PRY = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+ /** - Enable interrupts
+ * - PWM 0 end of duty
+ * - PWM 0 end of period
+ * - PWM 1 end of duty
+ * - PWM 1 end of period
+ * - PWM 2 end of duty
+ * - PWM 2 end of period
+ * - PWM 3 end of duty
+ * - PWM 3 end of period
+ * - PWM 4 end of duty
+ * - PWM 4 end of period
+ * - PWM 5 end of duty
+ * - PWM 5 end of period
+ * - PWM 6 end of duty
+ * - PWM 6 end of period
+ * - PWM 7 end of duty
+ * - PWM 7 end of period
+ * - CCU Edge Detection 0
+ * - CCU Edge Detection 1
+ * - CCU Edge Detection 2
+ * - CCU Edge Detection 3
+ * - CCU Edge Detection 4
+ * - CCU Edge Detection 5
+ * - CCU Edge Detection 6
+ * - CCU Edge Detection 7
+ */
+ hetREG1->INTENAC = 0xFFFFFFFFU;
+ hetREG1->INTENAS = (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U
+ | (uint32) 0x00000000U;
+
+
+ /** - Setup control register
+ * - Enable output buffers
+ * - Ignore software breakpoints
+ * - Master or Slave Clock Mode
+ * - Enable HET
+ */
+ hetREG1->GCR = ( 0x00000001U
+ | (uint32)((uint32)0U << 24U)
+ | (uint32)((uint32)1U << 16U)
+ | (0x00020000U));
+
+
+}
+/** @fn void pwmStart( hetRAMBASE_t * hetRAM, uint32 pwm)
+* @brief Start pwm signal
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] pwm Pwm signal:
+* - pwm0: Pwm 0
+* - pwm1: Pwm 1
+* - pwm2: Pwm 2
+* - pwm3: Pwm 3
+* - pwm4: Pwm 4
+* - pwm5: Pwm 5
+* - pwm6: Pwm 6
+* - pwm7: Pwm 7
+*
+* Start the given pwm signal
+*/
+/* SourceId : HET_SourceId_002 */
+/* DesignId : HET_DesignId_002 */
+/* Requirements : HL_SR364 */
+void pwmStart( hetRAMBASE_t * hetRAM, uint32 pwm)
+{
+
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control |= 0x00400000U;
+}
+
+
+/** @fn void pwmStop( hetRAMBASE_t * hetRAM, uint32 pwm)
+* @brief Stop pwm signal
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] pwm Pwm signal:
+* - pwm0: Pwm 0
+* - pwm1: Pwm 1
+* - pwm2: Pwm 2
+* - pwm3: Pwm 3
+* - pwm4: Pwm 4
+* - pwm5: Pwm 5
+* - pwm6: Pwm 6
+* - pwm7: Pwm 7
+*
+* Stop the given pwm signal
+*/
+/* SourceId : HET_SourceId_003 */
+/* DesignId : HET_DesignId_003 */
+/* Requirements : HL_SR365 */
+void pwmStop( hetRAMBASE_t * hetRAM, uint32 pwm)
+{
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control &= ~(uint32)0x00400000U;
+}
+
+
+/** @fn void pwmSetDuty(hetRAMBASE_t * hetRAM, uint32 pwm, uint32 pwmDuty)
+* @brief Set duty cycle
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] pwm Pwm signal:
+* - pwm0: Pwm 0
+* - pwm1: Pwm 1
+* - pwm2: Pwm 2
+* - pwm3: Pwm 3
+* - pwm4: Pwm 4
+* - pwm5: Pwm 5
+* - pwm6: Pwm 6
+* - pwm7: Pwm 7
+* @param[in] pwmDuty duty cycle in %.
+*
+* Sets a new duty cycle on the given pwm signal
+*/
+/* SourceId : HET_SourceId_004 */
+/* DesignId : HET_DesignId_004 */
+/* Requirements : HL_SR366 */
+void pwmSetDuty(hetRAMBASE_t * hetRAM, uint32 pwm, uint32 pwmDuty)
+{
+ uint32 action;
+ uint32 pwmPolarity =0U;
+ uint32 pwmPeriod = hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128U;
+ pwmPeriod = pwmPeriod >> 7U;
+
+ if(hetRAM == hetRAM1)
+ {
+ pwmPolarity = s_het1pwmPolarity[pwm];
+ }
+ else
+ {
+ }
+ if (pwmDuty == 0U)
+ {
+ action = (pwmPolarity == 3U) ? 0U : 2U;
+ }
+ else if (pwmDuty >= 100U)
+ {
+ action = (pwmPolarity == 3U) ? 2U : 0U;
+ }
+ else
+ {
+ action = pwmPolarity;
+ }
+
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control = ((hetRAM->Instruction[(pwm << 1U) + 41U].Control) & (~(uint32)(0x00000018U))) | (action << 3U);
+ hetRAM->Instruction[(pwm << 1U) + 41U].Data = (((pwmPeriod * pwmDuty) / 100U) << 7U) + 128U;
+}
+
+
+/** @fn void pwmSetSignal(hetRAMBASE_t * hetRAM, uint32 pwm, hetSIGNAL_t signal)
+* @brief Set period
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] pwm Pwm signal:
+* - pwm0: Pwm 0
+* - pwm1: Pwm 1
+* - pwm2: Pwm 2
+* - pwm3: Pwm 3
+* - pwm4: Pwm 4
+* - pwm5: Pwm 5
+* - pwm6: Pwm 6
+* - pwm7: Pwm 7
+* @param[in] signal signal
+ - duty cycle in %.
+* - period period in us.
+*
+* Sets a new pwm signal
+*/
+/* SourceId : HET_SourceId_005 */
+/* DesignId : HET_DesignId_005 */
+/* Requirements : HL_SR367 */
+void pwmSetSignal(hetRAMBASE_t * hetRAM, uint32 pwm, hetSIGNAL_t signal)
+{
+ uint32 action;
+ uint32 pwmPolarity = 0U;
+ float64 pwmPeriod = 0.0F;
+
+ if(hetRAM == hetRAM1)
+ {
+ pwmPeriod = (signal.period * 1000.0F) / 1238.690F;
+ pwmPolarity = s_het1pwmPolarity[pwm];
+ }
+ else
+ {
+ }
+ if (signal.duty == 0U)
+ {
+ action = (pwmPolarity == 3U) ? 0U : 2U;
+ }
+ else if (signal.duty >= 100U)
+ {
+ action = (pwmPolarity == 3U) ? 2U : 0U;
+ }
+ else
+ {
+ action = pwmPolarity;
+ }
+
+ hetRAM->Instruction[(pwm << 1U) + 41U].Control = ((hetRAM->Instruction[(pwm << 1U) + 41U].Control) & (~(uint32)(0x00000018U))) | (action << 3U);
+ hetRAM->Instruction[(pwm << 1U) + 41U].Data = ((((uint32)pwmPeriod * signal.duty) / 100U) << 7U ) + 128U;
+ hetRAM->Instruction[(pwm << 1U) + 42U].Data = ((uint32)pwmPeriod << 7U) - 128U;
+
+}
+
+
+/** @fn void pwmGetSignal(hetRAMBASE_t * hetRAM, uint32 pwm, hetSIGNAL_t signal)
+* @brief Get duty cycle
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] pwm Pwm signal:
+* - pwm0: Pwm 0
+* - pwm1: Pwm 1
+* - pwm2: Pwm 2
+* - pwm3: Pwm 3
+* - pwm4: Pwm 4
+* - pwm5: Pwm 5
+* - pwm6: Pwm 6
+* - pwm7: Pwm 7
+* @param[in] signal signal
+* - duty cycle in %.
+* - period period in us.
+*
+* Gets current signal of the given pwm signal.
+*/
+/* SourceId : HET_SourceId_006 */
+/* DesignId : HET_DesignId_006 */
+/* Requirements : HL_SR368 */
+void pwmGetSignal(hetRAMBASE_t * hetRAM, uint32 pwm, hetSIGNAL_t* signal)
+{
+ uint32 pwmDuty = (hetRAM->Instruction[(pwm << 1U) + 41U].Data - 128U) >> 7U;
+ uint32 pwmPeriod = (hetRAM->Instruction[(pwm << 1U) + 42U].Data + 128U) >> 7U;
+
+ signal->duty = (pwmDuty * 100U) / pwmPeriod;
+
+ if(hetRAM == hetRAM1)
+ {
+ signal->period = ((float64)pwmPeriod * 1238.690F) / 1000.0F;
+ }
+ else
+ {
+ signal->period = ((float64)pwmPeriod * 1238.690F) / 1000.0F;
+ }
+}
+
+/** @fn void pwmEnableNotification(hetBASE_t * hetREG, uint32 pwm, uint32 notification)
+* @brief Enable pwm notification
+* @param[in] hetREG Pointer to HET Module:
+* - hetREG1: HET1 Module pointer
+* - hetREG2: HET2 Module pointer
+* @param[in] pwm Pwm signal:
+* - pwm0: Pwm 0
+* - pwm1: Pwm 1
+* - pwm2: Pwm 2
+* - pwm3: Pwm 3
+* - pwm4: Pwm 4
+* - pwm5: Pwm 5
+* - pwm6: Pwm 6
+* - pwm7: Pwm 7
+* @param[in] notification Pwm notification:
+* - pwmEND_OF_DUTY: Notification on end of duty
+* - pwmEND_OF_PERIOD: Notification on end of end period
+* - pwmEND_OF_BOTH: Notification on end of both duty and period
+*/
+/* SourceId : HET_SourceId_007 */
+/* DesignId : HET_DesignId_007 */
+/* Requirements : HL_SR369 */
+void pwmEnableNotification(hetBASE_t * hetREG, uint32 pwm, uint32 notification)
+{
+ hetREG->FLG = notification << (pwm << 1U);
+ hetREG->INTENAS = notification << (pwm << 1U);
+}
+
+
+/** @fn void pwmDisableNotification(hetBASE_t * hetREG, uint32 pwm, uint32 notification)
+* @brief Enable pwm notification
+* @param[in] hetREG Pointer to HET Module:
+* - hetREG1: HET1 Module pointer
+* - hetREG2: HET2 Module pointer
+* @param[in] pwm Pwm signal:
+* - pwm0: Pwm 0
+* - pwm1: Pwm 1
+* - pwm2: Pwm 2
+* - pwm3: Pwm 3
+* - pwm4: Pwm 4
+* - pwm5: Pwm 5
+* - pwm6: Pwm 6
+* - pwm7: Pwm 7
+* @param[in] notification Pwm notification:
+* - pwmEND_OF_DUTY: Notification on end of duty
+* - pwmEND_OF_PERIOD: Notification on end of end period
+* - pwmEND_OF_BOTH: Notification on end of both duty and period
+*/
+/* SourceId : HET_SourceId_008 */
+/* DesignId : HET_DesignId_008 */
+/* Requirements : HL_SR370 */
+void pwmDisableNotification(hetBASE_t * hetREG, uint32 pwm, uint32 notification)
+{
+ hetREG->INTENAC = notification << (pwm << 1U);
+}
+
+
+/** @fn void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32 edge)
+* @brief Resets edge counter to 0
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] edge Edge signal:
+* - edge0: Edge 0
+* - edge1: Edge 1
+* - edge2: Edge 2
+* - edge3: Edge 3
+* - edge4: Edge 4
+* - edge5: Edge 5
+* - edge6: Edge 6
+* - edge7: Edge 7
+*
+* Reset edge counter to 0.
+*/
+/* SourceId : HET_SourceId_009 */
+/* DesignId : HET_DesignId_009 */
+/* Requirements : HL_SR372 */
+void edgeResetCounter(hetRAMBASE_t * hetRAM, uint32 edge)
+{
+ hetRAM->Instruction[edge + 17U].Data = 0U;
+}
+
+
+/** @fn uint32 edgeGetCounter(hetRAMBASE_t * hetRAM, uint32 edge)
+* @brief Get current edge counter value
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] edge Edge signal:
+* - edge0: Edge 0
+* - edge1: Edge 1
+* - edge2: Edge 2
+* - edge3: Edge 3
+* - edge4: Edge 4
+* - edge5: Edge 5
+* - edge6: Edge 6
+* - edge7: Edge 7
+*
+* Gets current edge counter value.
+*/
+/* SourceId : HET_SourceId_010 */
+/* DesignId : HET_DesignId_010 */
+/* Requirements : HL_SR373 */
+uint32 edgeGetCounter(hetRAMBASE_t * hetRAM, uint32 edge)
+{
+ return hetRAM->Instruction[edge + 17U].Data >> 7U;
+}
+
+
+/** @fn void edgeEnableNotification(hetBASE_t * hetREG, uint32 edge)
+* @brief Enable edge notification
+* @param[in] hetREG Pointer to HET Module:
+* - hetREG1: HET1 Module pointer
+* - hetREG2: HET2 Module pointer
+* @param[in] edge Edge signal:
+* - edge0: Edge 0
+* - edge1: Edge 1
+* - edge2: Edge 2
+* - edge3: Edge 3
+* - edge4: Edge 4
+* - edge5: Edge 5
+* - edge6: Edge 6
+* - edge7: Edge 7
+*/
+/* SourceId : HET_SourceId_011 */
+/* DesignId : HET_DesignId_011 */
+/* Requirements : HL_SR374 */
+void edgeEnableNotification(hetBASE_t * hetREG, uint32 edge)
+{
+ hetREG->FLG = (uint32)0x20000U << edge;
+ hetREG->INTENAS = (uint32)0x20000U << edge;
+}
+
+
+/** @fn void edgeDisableNotification(hetBASE_t * hetREG, uint32 edge)
+* @brief Enable edge notification
+* @param[in] hetREG Pointer to HET Module:
+* - hetREG1: HET1 Module pointer
+* - hetREG2: HET2 Module pointer
+* @param[in] edge Edge signal:
+* - edge0: Edge 0
+* - edge1: Edge 1
+* - edge2: Edge 2
+* - edge3: Edge 3
+* - edge4: Edge 4
+* - edge5: Edge 5
+* - edge6: Edge 6
+* - edge7: Edge 7
+*/
+/* SourceId : HET_SourceId_012 */
+/* DesignId : HET_DesignId_012 */
+/* Requirements : HL_SR375 */
+void edgeDisableNotification(hetBASE_t * hetREG, uint32 edge)
+{
+ hetREG->INTENAC = (uint32)0x20000U << edge;
+}
+
+
+/** @fn void capGetSignal(hetRAMBASE_t * hetRAM, uint32 cap, hetSIGNAL_t signal)
+* @brief Get capture signal
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+* @param[in] cap captured signal:
+* - cap0: Captured signal 0
+* - cap1: Captured signal 1
+* - cap2: Captured signal 2
+* - cap3: Captured signal 3
+* - cap4: Captured signal 4
+* - cap5: Captured signal 5
+* - cap6: Captured signal 6
+* - cap7: Captured signal 7
+* @param[in] signal signal
+* - duty cycle in %.
+* - period period in us.
+*
+* Gets current signal of the given capture signal.
+*/
+/* SourceId : HET_SourceId_013 */
+/* DesignId : HET_DesignId_013 */
+/* Requirements : HL_SR377 */
+void capGetSignal(hetRAMBASE_t * hetRAM, uint32 cap, hetSIGNAL_t *signal)
+{
+ uint32 pwmDuty = (hetRAM->Instruction[(cap << 1U) + 25U].Data) >> 7U;
+ uint32 pwmPeriod = (hetRAM->Instruction[(cap << 1U) + 26U].Data) >> 7U;
+
+ signal->duty = (pwmDuty * 100U) / pwmPeriod;
+
+ if( hetRAM == hetRAM1)
+ {
+ signal->period = ((float64)pwmPeriod * 1238.690F) / 1000.0F;
+ }
+ else
+ {
+ signal->period = ((float64)pwmPeriod * 1238.690F) / 1000.0F;
+ }
+}
+
+
+/** @fn void hetResetTimestamp(hetRAMBASE_t *hetRAM)
+* @brief Resets timestamp
+* @param[in] hetRAM Pointer to HET RAM:
+* - hetRAM1: HET1 RAM pointer
+* - hetRAM2: HET2 RAM pointer
+*
+* Resets loop count based timestamp.
+*/
+/* SourceId : HET_SourceId_014 */
+/* DesignId : HET_DesignId_014 */
+/* Requirements : HL_SR378 */
+void hetResetTimestamp(hetRAMBASE_t * hetRAM)
+{
+ hetRAM->Instruction[0U].Data = 0U;
+}
+
+
+/** @fn uint32 hetGetTimestamp(hetRAMBASE_t *hetRAM)
+* @brief Returns timestamp
+*
+* Returns loop count based timestamp.
+*/
+/* SourceId : HET_SourceId_015 */
+/* DesignId : HET_DesignId_015 */
+/* Requirements : HL_SR379 */
+uint32 hetGetTimestamp(hetRAMBASE_t * hetRAM)
+{
+ return hetRAM->Instruction[57U].Data;
+}
+
+/* USER CODE BEGIN (4) */
+/* USER CODE END */
+
+
+/** @fn void het1GetConfigValue(het_config_reg_t *config_reg, config_value_type_t type)
+* @brief Get the initial or current values of the HET1 configuration registers
+*
+* @param[in] *config_reg: pointer to the struct to which the initial or current
+* value of the configuration registers need to be stored
+* @param[in] type: whether initial or current value of the configuration registers need to be stored
+* - InitialValue: initial value of the configuration registers will be stored
+* in the struct pointed by config_reg
+* - CurrentValue: initial value of the configuration registers will be stored
+* in the struct pointed by config_reg
+*
+* This function will copy the initial or current value (depending on the parameter 'type')
+* of the configuration registers to the struct pointed by config_reg
+*
+*/
+/* SourceId : HET_SourceId_016 */
+/* DesignId : HET_DesignId_016 */
+/* Requirements : HL_SR379 */
+void het1GetConfigValue(het_config_reg_t *config_reg, config_value_type_t type)
+{
+ if (type == InitialValue)
+ {
+ config_reg->CONFIG_GCR = HET1_GCR_CONFIGVALUE;
+ config_reg->CONFIG_PFR = HET1_PFR_CONFIGVALUE;
+ config_reg->CONFIG_INTENAS = HET1_INTENAS_CONFIGVALUE;
+ config_reg->CONFIG_INTENAC = HET1_INTENAC_CONFIGVALUE;
+ config_reg->CONFIG_PRY = HET1_PRY_CONFIGVALUE;
+ config_reg->CONFIG_AND = HET1_AND_CONFIGVALUE;
+ config_reg->CONFIG_HRSH = HET1_HRSH_CONFIGVALUE;
+ config_reg->CONFIG_XOR = HET1_XOR_CONFIGVALUE;
+ config_reg->CONFIG_DIR = HET1_DIR_CONFIGVALUE;
+ config_reg->CONFIG_PDR = HET1_PDR_CONFIGVALUE;
+ config_reg->CONFIG_PULDIS = HET1_PULDIS_CONFIGVALUE;
+ config_reg->CONFIG_PSL = HET1_PSL_CONFIGVALUE;
+ config_reg->CONFIG_PCR = HET1_PCR_CONFIGVALUE;
+ }
+ else
+ {
+ /*SAFETYMCUSW 134 S MR:12.2 "LDRA Tool issue" */
+ config_reg->CONFIG_GCR = hetREG1->GCR;
+ config_reg->CONFIG_PFR = hetREG1->PFR;
+ config_reg->CONFIG_INTENAS = hetREG1->INTENAS;
+ config_reg->CONFIG_INTENAC = hetREG1->INTENAC;
+ config_reg->CONFIG_PRY = hetREG1->PRY;
+ config_reg->CONFIG_AND = hetREG1->AND;
+ config_reg->CONFIG_HRSH = hetREG1->HRSH;
+ config_reg->CONFIG_XOR = hetREG1->XOR;
+ config_reg->CONFIG_DIR = hetREG1->DIR;
+ config_reg->CONFIG_PDR = hetREG1->PDR;
+ config_reg->CONFIG_PULDIS = hetREG1->PULDIS;
+ config_reg->CONFIG_PSL = hetREG1->PSL;
+ config_reg->CONFIG_PCR = hetREG1->PCR;
+ }
+}
+
+
+
Index: firmware/source/notification.c
===================================================================
diff -u -rf068446fdb7889d320ddb6ffbd58f347ce0501e7 -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/source/notification.c (.../notification.c) (revision f068446fdb7889d320ddb6ffbd58f347ce0501e7)
+++ firmware/source/notification.c (.../notification.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -55,6 +55,7 @@
#include "gio.h"
#include "mibspi.h"
#include "sci.h"
+#include "het.h"
#include "rti.h"
#include "etpwm.h"
#include "sys_dma.h"
@@ -188,8 +189,38 @@
/* USER CODE BEGIN (30) */
/* USER CODE END */
+#pragma WEAK(pwmNotification)
+void pwmNotification(hetBASE_t * hetREG,uint32 pwm, uint32 notification)
+{
+/* enter user code between the USER CODE BEGIN and USER CODE END. */
+/* USER CODE BEGIN (35) */
+/* USER CODE END */
+}
+/* USER CODE BEGIN (36) */
+/* USER CODE END */
+#pragma WEAK(edgeNotification)
+void edgeNotification(hetBASE_t * hetREG,uint32 edge)
+{
+/* enter user code between the USER CODE BEGIN and USER CODE END. */
+/* USER CODE BEGIN (37) */
+/* USER CODE END */
+}
+/* USER CODE BEGIN (38) */
+/* USER CODE END */
+#pragma WEAK(hetNotification)
+void hetNotification(hetBASE_t *het, uint32 offset)
+{
+/* enter user code between the USER CODE BEGIN and USER CODE END. */
+/* USER CODE BEGIN (39) */
+/* USER CODE END */
+}
+
+/* USER CODE BEGIN (40) */
+/* USER CODE END */
+
+
/* USER CODE BEGIN (43) */
/* USER CODE END */
Index: firmware/source/pinmux.c
===================================================================
diff -u -r216bd924f989182e648ee5f33f4c91c43ac438ac -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/source/pinmux.c (.../pinmux.c) (revision 216bd924f989182e648ee5f33f4c91c43ac438ac)
+++ firmware/source/pinmux.c (.../pinmux.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -208,7 +208,7 @@
pinMuxReg->PINMMR19 = PINMUX_PIN_127_HET1_30;
- pinMuxReg->PINMMR20 = PINMUX_PIN_130_HET1_17;
+ pinMuxReg->PINMMR20 = PINMUX_PIN_130_MIBSPI1NCS_1;
pinMuxReg->PINMMR21 = PINMUX_PIN_133_GIOB_1;
Index: firmware/source/sys_main.c
===================================================================
diff -u -r9f03f8819187df2f9200c240c794ad69f4882d4a -raa36ab1ed13d099286cedcbd066f7dce11146d13
--- firmware/source/sys_main.c (.../sys_main.c) (revision 9f03f8819187df2f9200c240c794ad69f4882d4a)
+++ firmware/source/sys_main.c (.../sys_main.c) (revision aa36ab1ed13d099286cedcbd066f7dce11146d13)
@@ -56,6 +56,7 @@
#include "can.h"
#include "etpwm.h"
#include "gio.h"
+#include "het.h"
#include "mibspi.h"
#include "sci.h"
#include "rti.h"
@@ -135,6 +136,7 @@
static void initProcessor( void )
{
gioInit(); // configure GPIO pins
+ hetInit(); // configure HET1
adcInit(); // configure internal ADC channels
mibspiInit(); // configure MIBSPI3 and re-purpose MIBSPI1 & 5 pins for GPIO
etpwmInit(); // configure PWMs