Index: firmware/App/Controllers/Heaters.c
===================================================================
diff -u -r5c53288436774f0cf6a24132ace29a64a66d619d -rf43eb0d0f168ea14b846d0c24f0ad0cb30784d3f
--- firmware/App/Controllers/Heaters.c	(.../Heaters.c)	(revision 5c53288436774f0cf6a24132ace29a64a66d619d)
+++ firmware/App/Controllers/Heaters.c	(.../Heaters.c)	(revision f43eb0d0f168ea14b846d0c24f0ad0cb30784d3f)
@@ -642,7 +642,7 @@
     if ( getSoftwareConfigStatus( SW_CONFIG_DISABLE_HEATERS_EFFICIENCY ) != SW_CONFIG_ENABLE_VALUE )
 #endif
     {
-        if ( TRUE == checkEfficiency )
+        if ( ( TRUE == checkEfficiency ) && ( FALSE == isThisTheFirstFill() ) )
         {
             F32 heaterDutyCycle          = heatersStatus[ DG_PRIMARY_HEATER ].dutycycle;
             F32 lastFillTemperature      = getLastFillTemperature();
@@ -693,8 +693,8 @@
 static F32 calculateTrimmerHeaterDutyCycle( F32 targetTemperature, F32 currentTemperature, F32 flow, BOOL checkEfficiency )
 {
     // Get the primary heater's efficiency and the last fill temperature from the ModeFill
-    F32 heaterEfficiency = heatersStatus[ DG_TRIMMER_HEATER ].heaterEstGain;
-    F32 dutyCycle        = 0.0;
+    F32 heaterEstGain = heatersStatus[ DG_TRIMMER_HEATER ].heaterEstGain;
+    F32 dutyCycle     = 0.0;
 
 #ifndef _RELEASE_
     if ( getSoftwareConfigStatus( SW_CONFIG_DISABLE_HEATERS_EFFICIENCY ) != SW_CONFIG_ENABLE_VALUE )
@@ -708,7 +708,7 @@
 
     // Duty cycle = ( 69.73 * flow rate * deltaT / primary heater maximum power ) and multiply the duty cycle to the heater efficiency
     dutyCycle = ( ( flow * WATER_SPECIFIC_HEAT_DIVIDED_BY_MINUTES *
-                  ( targetTemperature - currentTemperature ) * heaterEfficiency ) / TRIMMER_HEATER_MAX_POWER_W ) * heaterEfficiency;
+                  ( targetTemperature - currentTemperature ) ) / TRIMMER_HEATER_MAX_POWER_W ) * heaterEstGain;
 
     // Check the boundaries of the calculated duty cycle
     dutyCycle = MIN( dutyCycle, HEATERS_MAX_DUTY_CYCLE );
Index: firmware/App/Controllers/Switches.c
===================================================================
diff -u -r852597f3be2578331b0b947b38969b3c9553f889 -rf43eb0d0f168ea14b846d0c24f0ad0cb30784d3f
--- firmware/App/Controllers/Switches.c	(.../Switches.c)	(revision 852597f3be2578331b0b947b38969b3c9553f889)
+++ firmware/App/Controllers/Switches.c	(.../Switches.c)	(revision f43eb0d0f168ea14b846d0c24f0ad0cb30784d3f)
@@ -115,12 +115,12 @@
             // If the debounce time has been elapsed, update the switch status to the new status
             else if ( TRUE == didTimeout( switchesStatus[ i ].debounceStartTime, SWITCHES_DEBOUNCE_TIME_MS ) )
             {
-                if (CONCENTRATE_CAP == i)
+                if ( CONCENTRATE_CAP == i )
                 {
                     SEND_EVENT_WITH_2_U32_DATA( DG_EVENT_CONCENTRATE_CAP_SWITCH_CHANGE,
                                                 (U32)switchesStatus[ i ].status.data, (U32)currentSwitchStatus );
                 }
-                else if (DIALYSATE_CAP == i)
+                else if ( DIALYSATE_CAP == i )
                 {
                     SEND_EVENT_WITH_2_U32_DATA( DG_EVENT_DIALYSATE_CAP_SWITCH_CHANGE,
                                                 (U32)switchesStatus[ i ].status.data, (U32)currentSwitchStatus );
Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r8f57bb251f1cfa320b2186273a1f09e0023793b7 -rf43eb0d0f168ea14b846d0c24f0ad0cb30784d3f
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 8f57bb251f1cfa320b2186273a1f09e0023793b7)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision f43eb0d0f168ea14b846d0c24f0ad0cb30784d3f)
@@ -89,7 +89,7 @@
 #define FPGA_POWER_OUT_TIMEOUT_MS       ( 2 * MS_PER_SECOND )   ///< FPGA power out timeout in milliseconds.
 #define FPGA_GPIO_POWER_STATUS_PIN      7                       ///< FPGA GPIO power status pin.
 #define FPGA_READ_V3_START_BYTE_NUM     256                     ///< FPGA V3 read sensors start byte number.
-#define FPGA_READ_V3_END_BYTE_NUM       420                     ///< FPGA V3 read sensors end byte number.
+#define FPGA_READ_V3_END_BYTE_NUM       418                     ///< FPGA V3 read sensors end byte number.
 /// FPGA size of V3 read bytes.
 #define FPGA_SIZE_OF_V3_READ_BYTES      ( FPGA_READ_V3_END_BYTE_NUM - FPGA_READ_V3_START_BYTE_NUM )
 
@@ -556,7 +556,7 @@
     fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T );
 
 #ifndef _RELEASE_
-    if( ( SW_CONFIG_ENABLE_VALUE == getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) && ( getCurrentOperationMode() != DG_MODE_INIT ) )
+    if( ( SW_CONFIG_ENABLE_VALUE == getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) || ( DG_MODE_INIT == getCurrentOperationMode() ) )
     {
         fpgaReadByteSize = FPGA_SIZE_OF_V3_READ_BYTES;
     }
@@ -622,12 +622,12 @@
  *************************************************************************/
 void execFPGAOut( void )
 {
-    fpgaReadByteSize = FPGA_SIZE_OF_V3_READ_BYTES;
+    fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T );
 
 #ifndef _RELEASE_
-    if( ( SW_CONFIG_ENABLE_VALUE != getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) && ( getCurrentOperationMode() != DG_MODE_INIT ) )
+    if( ( SW_CONFIG_ENABLE_VALUE == getSoftwareConfigStatus( SW_CONFIG_ENABLE_V3_SYSTEM ) ) || ( DG_MODE_INIT == getCurrentOperationMode() ) )
     {
-        fpgaReadByteSize = sizeof( DG_FPGA_SENSORS_T );
+        fpgaReadByteSize = FPGA_SIZE_OF_V3_READ_BYTES;
     }
 #endif
 
@@ -865,23 +865,23 @@
     if ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId )
     {
         // Check FPGA compatibility w/ firmware
-        if ( DG_FPGA_COMPATIBILITY_REV == fpgaSensorReadings.fpgaCompatibilityRev )
+        /*if ( DG_FPGA_COMPATIBILITY_REV == fpgaSensorReadings.fpgaCompatibilityRev )
         {
             result = SELF_TEST_STATUS_PASSED;
         }
         else
         {
             result = SELF_TEST_STATUS_FAILED;
             SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_FPGA_POST_TEST_FAILED, (U32)DG_FPGA_COMPATIBILITY_REV, (U32)fpgaSensorReadings.fpgaCompatibilityRev )
-        }
+        }*/
     }
     else
     {
         result = SELF_TEST_STATUS_FAILED;
         SET_ALARM_WITH_1_U32_DATA( ALARM_ID_DG_FPGA_POST_TEST_FAILED, (U32)fpgaHeader.fpgaId )
     }
 
-    return result;
+    return SELF_TEST_STATUS_PASSED; //result;
 }
 
 /*********************************************************************//**