Index: firmware/App/Services/Interrupts.c
===================================================================
diff -u -r2c1c34c153a146d659976b3aa499937b88264b1b -r1145e9197855b4f2cb79eb407d3899059b0ca410
--- firmware/App/Services/Interrupts.c	(.../Interrupts.c)	(revision 2c1c34c153a146d659976b3aa499937b88264b1b)
+++ firmware/App/Services/Interrupts.c	(.../Interrupts.c)	(revision 1145e9197855b4f2cb79eb407d3899059b0ca410)
@@ -53,8 +53,7 @@
 
 // ********** private data **********
 
-static U32 sci2FrameErrorCnt = 0;                                       ///< FPGA serial frame error counter.
-static U32 sci2OverrunErrorCnt = 0;                                     ///< FPGA serial overrun error counter.
+static BOOL sci2FEOEError = FALSE;                                      ///< FPGA serial frame or overrun flag;
 
 static U32 can1WarningCnt = 0;                                          ///< CAN warning mode counter.
 static U32 can1BusOffCnt = 0;                                           ///< CAN buss off mode counter.
@@ -74,8 +73,6 @@
     // Initialize various time windowed counts for monitoring CAN & UART errors and warnings
     initTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_OFF, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS );
     initTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_PARITY, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS );
-    initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_FRAME_ERROR, MAX_FPGA_HDW_COMM_ERRORS, FPGA_HDW_COMM_ERROR_TIME_WINDOW_MS );
-    initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_OVERRUN, MAX_FPGA_HDW_COMM_ERRORS, FPGA_HDW_COMM_ERROR_TIME_WINDOW_MS );
 }
 
 /*********************************************************************//**
@@ -203,23 +200,14 @@
     {
         if ( ( flags & SCI_FE_INT ) != 0 )
         {
-            sci2FrameErrorCnt++;
+            sci2FEOEError = TRUE;
             scilinREG->FLR |= SCI_FE_INT;
-            if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_FRAME_ERROR ) )
-            {
-                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_COMM_TIMEOUT, MAX_FPGA_HDW_COMM_ERRORS, sci2FrameErrorCnt )
-                //SET_ALARM_WITH_1_U32_DATA( ALARM_ID_HD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_UART_OVERRUN_ERROR )
-            }
         }
+
         if ( ( flags & SCI_OE_INT ) != 0 )
         {
-            sci2OverrunErrorCnt++;
+            sci2FEOEError = TRUE;
             scilinREG->FLR |= SCI_OE_INT;
-            if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_OVERRUN ) )
-            {
-                SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_FPGA_COMM_TIMEOUT, MAX_FPGA_HDW_COMM_ERRORS, sci2OverrunErrorCnt )
-                //SET_ALARM_WITH_1_U32_DATA( ALARM_ID_HD_SOFTWARE_FAULT, SW_FAULT_ID_FPGA_UART_OVERRUN_ERROR )
-            }
         }
     }
 }
@@ -290,4 +278,24 @@
     }
 }
 
+/*********************************************************************//**
+ * @brief
+ * The getSci2FEOEError function returns the sci2FEOEError (OE - Overrun,
+ * FE - Framing Error) status and resets the status if TRUE
+ * @details Inputs: sci2FEOEError
+ * @details Outputs: none
+ * @return sci2 FE / OE error
+ *************************************************************************/
+BOOL getSci2FEOEError( void )
+{
+    BOOL returnValue = sci2FEOEError;
+
+    if (TRUE == sci2FEOEError )
+    {
+        sci2FEOEError = FALSE;
+    }
+
+    return returnValue;;
+}
+
 /**@}*/