Index: firmware/App/Modes/ModeInitPOST.c =================================================================== diff -u -r26d736280fef713e7639cd2b98eed975e2eb4353 -r67adcef344943e66681e14cff0f48d5d40b04e05 --- firmware/App/Modes/ModeInitPOST.c (.../ModeInitPOST.c) (revision 26d736280fef713e7639cd2b98eed975e2eb4353) +++ firmware/App/Modes/ModeInitPOST.c (.../ModeInitPOST.c) (revision 67adcef344943e66681e14cff0f48d5d40b04e05) @@ -427,14 +427,15 @@ // when the event data can be sent if ( ++startPOSTDelayCounter > START_POST_DELAY_COUNT ) { - sendUIVersionRequest(); + U32 resetReason = systemREG1->SYSESR | crcREG->PSA_SIGREGL1; // power-on reset bit preserved in an unused CRC register - SEND_EVENT_WITH_2_U32_DATA( HD_EVENT_STARTUP, SYS_EXCEPTION, (U32)0x000BAD01 ) // log ESR value and BAD01 to indicate the causes of resets (see Table 2-8 Technical Ref Manual) - SYS_EXCEPTION = 0xFFFFU; // clear all exception flags by writing logic 1 to each bit + systemREG1->SYSESR = systemREG1->SYSESR; // clear reset bit(s) after logging event so subsequent resets can be properly identified as not being power-on resets. - //*(uint32_t *)(0xFFFFFA06) = (uint32_t)0xDEADBEEF; // Generate memory access violation. Remove when test is done + sendUIVersionRequest(); + // Send the startup event - SEND_EVENT_WITH_2_U32_DATA( HD_EVENT_STARTUP, 0, 0 ) + SEND_EVENT_WITH_2_U32_DATA( HD_EVENT_STARTUP, resetReason, systemREG1->GBLSTAT ) // log startup event w/ reset reason(s) bits + SEND_EVENT_WITH_2_U32_DATA( HD_EVENT_STARTUP, systemREG1->DEV, 0x12345678 ) // log startup event w/ device ID bits // Send the first submode change event. It is the mode Init and it does not start from a previous // mode previous and current are both published as Init SEND_EVENT_WITH_2_U32_DATA( HD_EVENT_OP_MODE_CHANGE, MODE_INIT, MODE_INIT )