Index: App/Common.h
===================================================================
diff -u -r40a959e1341c8964f872df462ac3a2d874e3b0b3 -r6c8c486d26306662402945537c5acaea2709d85b
--- App/Common.h	(.../Common.h)	(revision 40a959e1341c8964f872df462ac3a2d874e3b0b3)
+++ App/Common.h	(.../Common.h)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -23,7 +23,7 @@
 
 #ifndef _VECTORCAST_
     #define RM46_EVAL_BOARD_TARGET      1
-    #define SIMULATE_UI                 1
+//    #define SIMULATE_UI                 1
 #endif
 
 // ********** public definitions **********
@@ -69,20 +69,20 @@
 #define MASK_OFF_LSB                    0xFF00
 #define MASK_OFF_MSW                    0x0000FFFF
 #define MASK_OFF_LSW                    0xFFFF0000
-#define SHIFT_BITS_IN_BYTE              8
-#define SHIFT_BITS_IN_WORD              16
+#define SHIFT_8_BITS_FOR_BYTE_SHIFT     8
+#define SHIFT_16_BITS_FOR_WORD_SHIFT    16
 
 #define CAP(v,u)                        ((v) > (u) ? (u) : (v))
 #define RANGE(v,l,u)                    ((v) > (u) ? (u) : ((v) < (l) ? (l) : (v)))
 #define INC_WRAP(v,l,u)                 ((v) == (u) ? (l) : ((v)+1))
 #define MAX(a,b)                        ((a) < (b) ? (b) : (a))
 #define MIN(a,b)                        ((a) > (b) ? (b) : (a))
 #define GET_LSB_OF_WORD(w)              ((U08)((w) & MASK_OFF_MSB))
-#define GET_MSB_OF_WORD(w)              ((U08)(((w) >> SHIFT_BITS_IN_BYTE) & MASK_OFF_MSB))
+#define GET_MSB_OF_WORD(w)              ((U08)(((w) >> SHIFT_8_BITS_FOR_BYTE_SHIFT) & MASK_OFF_MSB))
 #define GET_LSW_OF_LONG(l)              ((U16)((l) & MASK_OFF_MSW))
-#define GET_MSW_OF_LONG(l)              ((U16)(((l) >> SHIFT_BITS_IN_WORD) & MASK_OFF_MSW))
-#define MAKE_WORD_OF_BYTES(h,l)         ((((U16)(h) << SHIFT_BITS_IN_BYTE) & MASK_OFF_LSB) | ((U16)(l) & MASK_OFF_MSB))
-#define MAKE_LONG_OF_WORDS(h,l)         ((((U32)(h) << SHIFT_BITS_IN_WORD) & MASK_OFF_LSW) | ((U32)(l) & MASK_OFF_MSW))
+#define GET_MSW_OF_LONG(l)              ((U16)(((l) >> SHIFT_16_BITS_FOR_WORD_SHIFT) & MASK_OFF_MSW))
+#define MAKE_WORD_OF_BYTES(h,l)         ((((U16)(h) << SHIFT_8_BITS_FOR_BYTE_SHIFT) & MASK_OFF_LSB) | ((U16)(l) & MASK_OFF_MSB))
+#define MAKE_LONG_OF_WORDS(h,l)         ((((U32)(h) << SHIFT_16_BITS_FOR_WORD_SHIFT) & MASK_OFF_LSW) | ((U32)(l) & MASK_OFF_MSW))
 
 // **** Script Support Definitions ****
 
Index: App/Services/CommInterrupts.c
===================================================================
diff -u -r7d8778a85f3e9618e4c7800cfca3bcf8ebf115c8 -r6c8c486d26306662402945537c5acaea2709d85b
--- App/Services/CommInterrupts.c	(.../CommInterrupts.c)	(revision 7d8778a85f3e9618e4c7800cfca3bcf8ebf115c8)
+++ App/Services/CommInterrupts.c	(.../CommInterrupts.c)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -274,4 +274,20 @@
     return ( ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
 }
 
+/*************************************************************************
+ * @brief isCAN1TransmitInProgress
+ * The isCAN1TransmitInProgress function determines whether a transmit \n
+ * is in progress on the CAN1 peripheral.
+ * @details
+ * Inputs : status registers
+ * Outputs : none
+ * @param none
+ * @return TRUE if a transmit is in progress, FALSE if not
+ *************************************************************************/
+BOOL isCAN1TransmitInProgress( void )
+{
+    BOOL result = ( ( canREG1->TXRQx[0] != 0 ) || ( canREG1->TXRQx[1] != 0 ) ? TRUE : FALSE );
 
+    return result;
+}
+
Index: App/Services/CommInterrupts.h
===================================================================
diff -u -r81ca79980a75ab71985d3d610bcef45fd6730458 -r6c8c486d26306662402945537c5acaea2709d85b
--- App/Services/CommInterrupts.h	(.../CommInterrupts.h)	(revision 81ca79980a75ab71985d3d610bcef45fd6730458)
+++ App/Services/CommInterrupts.h	(.../CommInterrupts.h)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -38,4 +38,6 @@
 BOOL isSCI1DMATransmitInProgress( void );
 BOOL isSCI2DMATransmitInProgress( void );
 
+BOOL isCAN1TransmitInProgress( void );
+
 #endif
Index: App/Services/FPGA.c
===================================================================
diff -u -r81ca79980a75ab71985d3d610bcef45fd6730458 -r6c8c486d26306662402945537c5acaea2709d85b
--- App/Services/FPGA.c	(.../FPGA.c)	(revision 81ca79980a75ab71985d3d610bcef45fd6730458)
+++ App/Services/FPGA.c	(.../FPGA.c)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -315,11 +315,12 @@
         fpgaReadCommandInProgress = FALSE;
         fpgaReadCommandACKed = ( fpgaReadResponseBuffer[0] == FPGA_READ_CMD_ACK ? TRUE : FALSE );
     }
-    // first receipt?
-    if ( 1 == fpgaReceiptCounter )
+
+    // see if we want to follow up with a bulk read command
+    if ( TRUE == fpgaBulkWriteAndReadInProgress )
     {
-        // see if we want to follow up with a bulk read command
-        if ( TRUE == fpgaBulkWriteAndReadInProgress )
+        // first receipt?
+        if ( 1 == fpgaReceiptCounter )
         {
             fpgaBulkWriteAndReadInProgress = FALSE;
             fpgaReadCommandInProgress = TRUE;
@@ -457,6 +458,7 @@
     fpgaReadCmdBuffer[4] = GET_LSB_OF_WORD( crc );
     fpgaReadCmdBuffer[5] = GET_MSB_OF_WORD( crc );
     // prep DMA for sending the read cmd and receiving the response
+    fpgaReadCommandInProgress = TRUE;
     setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + sizeof(FPGA_HEADER_T) + FPGA_CRC_LEN );
     setupDMAForReadCmd( FPGA_READ_CMD_HDR_LEN + FPGA_CRC_LEN );
     startDMAReceiptOfReadResp();
@@ -480,7 +482,7 @@
     FPGA_STATE_T result = FPGA_STATE_READ_HEADER;
 
     // did we get an FPGA response?
-    if ( ( TRUE == fpgaWriteCommandACKed ) && ( TRUE == fpgaReadCommandACKed ) )
+    if ( TRUE == fpgaReadCommandACKed )
     {
         // did FPGA Ack the read command?
         if ( fpgaReadResponseBuffer[0] == FPGA_READ_CMD_ACK )
@@ -493,7 +495,11 @@
             }
         }
     }
+    else //
+    {
 
+    }
+
     return result;
 }
 
Index: App/Services/SystemComm.c
===================================================================
diff -u -r81ca79980a75ab71985d3d610bcef45fd6730458 -r6c8c486d26306662402945537c5acaea2709d85b
--- App/Services/SystemComm.c	(.../SystemComm.c)	(revision 81ca79980a75ab71985d3d610bcef45fd6730458)
+++ App/Services/SystemComm.c	(.../SystemComm.c)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -40,8 +40,6 @@
 #define SCI1_RECEIVE_DMA_REQUEST        30
 #define SCI1_TRANSMIT_DMA_REQUEST       31
 
-#define CAN_TX_BUSY()                   ( ( canREG1->TXRQx[0] != 0 ) || ( canREG1->TXRQx[1] != 0 ) ? TRUE : FALSE )
-
 // ********** private data **********
 
 const COMM_BUFFER_T CAN_OUT_BUFFERS[NUM_OF_CAN_OUT_BUFFERS] =
@@ -137,13 +135,13 @@
 void execSystemCommTx( void )
 {
     // if CAN transmitter is idle, start transmitting any pending packets
-    if ( FALSE == CAN_TX_BUSY() )
+    if ( FALSE == isCAN1TransmitInProgress() )
     {
         transmitNextCANPacket();
     }
 
     // if UART transmitter is idle, start transmitting any pending packets
-    if ( FALSE == isSCI1DMATransmitInProgress() )
+//    if ( FALSE == isSCI1DMATransmitInProgress() )
     {
         transmitNextUARTPacket();
     }
Index: App/Services/Utilities.c
===================================================================
diff -u -r81ca79980a75ab71985d3d610bcef45fd6730458 -r6c8c486d26306662402945537c5acaea2709d85b
--- App/Services/Utilities.c	(.../Utilities.c)	(revision 81ca79980a75ab71985d3d610bcef45fd6730458)
+++ App/Services/Utilities.c	(.../Utilities.c)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -79,7 +79,8 @@
 
     while ( len-- > 0 )
     {
-        crc = (crc >> SHIFT_BITS_IN_BYTE) ^ crc16_table[*address++ ^ (crc & MASK_OFF_MSB)];
+        crc = (crc >> SHIFT_8_BITS_FOR_BYTE_SHIFT) ^ crc16_table[*address ^ (crc & MASK_OFF_MSB)];
+        address++;
     }
 
     return crc;
Index: HD.dil
===================================================================
diff -u -r38ff7a6fbf82b86ab1bac3b7b24c4ea33d5419f9 -r6c8c486d26306662402945537c5acaea2709d85b
--- HD.dil	(.../HD.dil)	(revision 38ff7a6fbf82b86ab1bac3b7b24c4ea33d5419f9)
+++ HD.dil	(.../HD.dil)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -1,4 +1,4 @@
-# RM46L852PGE 10/22/19 16:38:22
+# RM46L852PGE 10/24/19 17:47:30
 # 
 ARCH=RM46L852PGE
 # 
@@ -1676,28 +1676,28 @@
 DRIVER.SCI.VAR.SCI_ACTUALBAUDRATE.VALUE=115329
 DRIVER.SCI.VAR.SCI_EVENPARITY.VALUE=0
 DRIVER.SCI.VAR.SCILIN_PORT_BIT0_FUN.VALUE=0
-DRIVER.SCI.VAR.SCILIN_PORT_BIT2_DIR.VALUE=0
+DRIVER.SCI.VAR.SCILIN_PORT_BIT2_DIR.VALUE=1
 DRIVER.SCI.VAR.SCILIN_RXINTLVL.VALUE=0
 DRIVER.SCI.VAR.SCI_PORT_BIT1_DIR.VALUE=0
 DRIVER.SCI.VAR.SCI_BASE_PORT.VALUE=0xFFF7E540
 DRIVER.SCI.VAR.SCILIN_PRESCALE.VALUE=6
 DRIVER.SCI.VAR.SCILIN_PORT_BIT0_PDR.VALUE=0
 DRIVER.SCI.VAR.SCILIN_PORT_BIT1_FUN.VALUE=1
 DRIVER.SCI.VAR.SCI_PORT_BIT0_FUN.VALUE=0
-DRIVER.SCI.VAR.SCI_PORT_BIT2_DIR.VALUE=0
+DRIVER.SCI.VAR.SCI_PORT_BIT2_DIR.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PORT_BIT1_PDR.VALUE=0
 DRIVER.SCI.VAR.SCI_PORT_BIT0_PDR.VALUE=0
 DRIVER.SCI.VAR.SCILIN_PORT_BIT2_FUN.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PEINTLVL.VALUE=0
 DRIVER.SCI.VAR.SCI_PORT_BIT1_FUN.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PORT_BIT0_PSL.VALUE=1
 DRIVER.SCI.VAR.SCI_OEINTENA.VALUE=1
-DRIVER.SCI.VAR.SCILIN_PORT_BIT2_PDR.VALUE=0
+DRIVER.SCI.VAR.SCILIN_PORT_BIT2_PDR.VALUE=1
 DRIVER.SCI.VAR.SCI_PORT_BIT1_PDR.VALUE=0
 DRIVER.SCI.VAR.SCI_PORT_BIT2_FUN.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PORT_BIT1_PSL.VALUE=1
 DRIVER.SCI.VAR.SCI_PORT_BIT0_PSL.VALUE=1
-DRIVER.SCI.VAR.SCI_PORT_BIT2_PDR.VALUE=0
+DRIVER.SCI.VAR.SCI_PORT_BIT2_PDR.VALUE=1
 DRIVER.SCI.VAR.SCILIN_PORT_BIT2_PSL.VALUE=1
 DRIVER.SCI.VAR.SCI_PORT_BIT1_PSL.VALUE=1
 DRIVER.SCI.VAR.SCILIN_BREAKINTENA.VALUE=0
@@ -3919,7 +3919,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_32_INT_LEVEL.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_24_INT_LEVEL.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_16_INT_LEVEL.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_10_ID.VALUE=10
+DRIVER.CAN.VAR.CAN_1_MESSAGE_10_ID.VALUE=0x200
 DRIVER.CAN.VAR.CAN_2_MESSAGE_31_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_2_MESSAGE_23_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_2_MESSAGE_15_DLC.VALUE=8
@@ -4384,7 +4384,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_14_MASK.VALUE=0x000007FF
 DRIVER.CAN.VAR.CAN_1_MESSAGE_6_ENA.VALUE=0x80000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_1_RTR.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_1_ID.VALUE=1
+DRIVER.CAN.VAR.CAN_1_MESSAGE_1_ID.VALUE=0x1
 DRIVER.CAN.VAR.CAN_1_MESSAGE_63_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_1_MESSAGE_55_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_1_MESSAGE_47_DLC.VALUE=8
@@ -4440,7 +4440,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_34_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_26_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_18_RTR.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_2_ID.VALUE=2
+DRIVER.CAN.VAR.CAN_1_MESSAGE_2_ID.VALUE=0x2
 DRIVER.CAN.VAR.CAN_1_AUTO_BUS_ON_TR.VALUE=103
 DRIVER.CAN.VAR.CAN_3_MESSAGE_31_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_23_DLC.VALUE=8
@@ -4512,7 +4512,7 @@
 DRIVER.CAN.VAR.CAN_3_MESSAGE_11_ID.VALUE=11
 DRIVER.CAN.VAR.CAN_3_MESSAGE_10_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_7_INT_LEVEL.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_3_ID.VALUE=3
+DRIVER.CAN.VAR.CAN_1_MESSAGE_3_ID.VALUE=0x4
 DRIVER.CAN.VAR.CAN_1_MESSAGE_2_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_64_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_1_MESSAGE_56_DLC.VALUE=8
@@ -4574,7 +4574,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_35_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_27_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_19_RTR.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_4_ID.VALUE=4
+DRIVER.CAN.VAR.CAN_1_MESSAGE_4_ID.VALUE=0x8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_40_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_32_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_24_DLC.VALUE=8
@@ -4652,7 +4652,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_64_INT_LEVEL.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_56_INT_LEVEL.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_48_INT_LEVEL.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_5_ID.VALUE=5
+DRIVER.CAN.VAR.CAN_1_MESSAGE_5_ID.VALUE=0x10
 DRIVER.CAN.VAR.CAN_1_MESSAGE_3_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_57_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_1_MESSAGE_49_DLC.VALUE=8
@@ -4721,7 +4721,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_44_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_36_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_28_RTR.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_6_ID.VALUE=6
+DRIVER.CAN.VAR.CAN_1_MESSAGE_6_ID.VALUE=0x20
 DRIVER.CAN.VAR.CAN_3_MESSAGE_41_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_33_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_25_DLC.VALUE=8
@@ -4791,7 +4791,7 @@
 DRIVER.CAN.VAR.CAN_3_MESSAGE_12_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_3_MESSAGE_12_INT_LEVEL.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_PORT_TX_PSL.VALUE=1
-DRIVER.CAN.VAR.CAN_1_MESSAGE_7_ID.VALUE=7
+DRIVER.CAN.VAR.CAN_1_MESSAGE_7_ID.VALUE=0x40
 DRIVER.CAN.VAR.CAN_1_MESSAGE_4_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_58_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_41_EOB.VALUE=0x00000000
@@ -4853,7 +4853,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_45_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_37_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_29_RTR.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_8_ID.VALUE=8
+DRIVER.CAN.VAR.CAN_1_MESSAGE_8_ID.VALUE=0x80
 DRIVER.CAN.VAR.CAN_3_MESSAGE_50_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_42_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_3_MESSAGE_34_DLC.VALUE=8
@@ -4928,7 +4928,7 @@
 DRIVER.CAN.VAR.CAN_1_MESSAGE_33_INT_LEVEL.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_25_INT_LEVEL.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_17_INT_LEVEL.VALUE=0x00000000
-DRIVER.CAN.VAR.CAN_1_MESSAGE_9_ID.VALUE=9
+DRIVER.CAN.VAR.CAN_1_MESSAGE_9_ID.VALUE=0x100
 DRIVER.CAN.VAR.CAN_1_MESSAGE_5_RTR.VALUE=0x00000000
 DRIVER.CAN.VAR.CAN_1_MESSAGE_59_DLC.VALUE=8
 DRIVER.CAN.VAR.CAN_1_SJW.VALUE=3
@@ -7215,7 +7215,7 @@
 DRIVER.PINMUX.VAR.DMA_IFT_COUNT_17.VALUE=0
 DRIVER.PINMUX.VAR.DMA_INTLFSEN_13.VALUE=1
 DRIVER.PINMUX.VAR.MUX30_OPTION1.VALUE=0
-DRIVER.PINMUX.VAR.MUX22_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX22_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.MUX14_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.DMA_IFT_COUNT_26.VALUE=0
 DRIVER.PINMUX.VAR.DMA_IFT_COUNT_18.VALUE=0
@@ -7756,7 +7756,7 @@
 DRIVER.PINMUX.VAR.MUX12_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.MUX100_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_30_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_22_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_22_SELECT.VALUE=1
 DRIVER.PINMUX.VAR.PIN_MUX_14_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_31_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_23_VALUE.VALUE=0x0001
@@ -8560,7 +8560,7 @@
 DRIVER.PINMUX.VAR.MUX20_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.MUX12_CONFLICT.VALUE=0
 DRIVER.PINMUX.VAR.PIN_MUX_31_SELECT.VALUE=0
-DRIVER.PINMUX.VAR.PIN_MUX_23_SELECT.VALUE=0
+DRIVER.PINMUX.VAR.PIN_MUX_23_SELECT.VALUE=1
 DRIVER.PINMUX.VAR.PIN_MUX_15_SELECT.VALUE=0
 DRIVER.PINMUX.VAR.DMA_ADDMW_30_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_25_VALUE.VALUE=0x0001
@@ -8609,7 +8609,7 @@
 DRIVER.PINMUX.VAR.DMA_CHPR_9.VALUE=HIGH
 DRIVER.PINMUX.VAR.DMA_TRIG_5.VALUE=HARDWARE_TRIGGER
 DRIVER.PINMUX.VAR.DMA_INTHBCEN_1.VALUE=1
-DRIVER.PINMUX.VAR.SCI.VALUE=0
+DRIVER.PINMUX.VAR.SCI.VALUE=1
 DRIVER.PINMUX.VAR.DMA_INTMP_16.VALUE=GROUP_A
 DRIVER.PINMUX.VAR.DMA_TRIG_6.VALUE=HARDWARE_TRIGGER
 DRIVER.PINMUX.VAR.DMA_INTHBCEN_2.VALUE=1
@@ -8737,7 +8737,7 @@
 DRIVER.PINMUX.VAR.MUX15_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX1_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX31_OPTION1.VALUE=0
-DRIVER.PINMUX.VAR.MUX23_OPTION1.VALUE=0
+DRIVER.PINMUX.VAR.MUX23_OPTION1.VALUE=1
 DRIVER.PINMUX.VAR.MUX15_OPTION1.VALUE=0
 DRIVER.PINMUX.VAR.MUX1_OPTION5.VALUE=0
 DRIVER.PINMUX.VAR.MUX31_OPTION2.VALUE=0
@@ -8873,15 +8873,15 @@
 DRIVER.PINMUX.VAR.DMA_CHANNEL_1.VALUE=CHANNEL0
 DRIVER.PINMUX.VAR.DMA_CHPR_3_VALUE.VALUE=0x0001
 DRIVER.PINMUX.VAR.ALT_ADC_A.VALUE=0
-DRIVER.PINMUX.VAR.PINMUX7.VALUE="PINMUX_PIN_37_MIBSPI3NCS_1 | PINMUX_PIN_38_HET1_06"
+DRIVER.PINMUX.VAR.PINMUX7.VALUE="PINMUX_PIN_37_MIBSPI3NCS_1 | PINMUX_PIN_38_SCIRX"
 DRIVER.PINMUX.VAR.MUX101_OPTION3.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_24.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_EIDXS_20.VALUE=0
 DRIVER.PINMUX.VAR.DMA_READ_ELSIZE_16.VALUE=8BIT
 DRIVER.PINMUX.VAR.DMA_EIDXS_12.VALUE=0
 DRIVER.PINMUX.VAR.DMA_CHANNEL_2.VALUE=CHANNEL0
 DRIVER.PINMUX.VAR.ALT_ADC_B.VALUE=0
-DRIVER.PINMUX.VAR.PINMUX8.VALUE="PINMUX_PIN_39_HET1_13 | PINMUX_PIN_40_MIBSPI1NCS_2 | PINMUX_PIN_41_HET1_15"
+DRIVER.PINMUX.VAR.PINMUX8.VALUE="PINMUX_PIN_39_SCITX | PINMUX_PIN_40_MIBSPI1NCS_2 | PINMUX_PIN_41_HET1_15"
 DRIVER.PINMUX.VAR.MUX101_OPTION4.VALUE=0
 DRIVER.PINMUX.VAR.MUX92_OPTION0.VALUE=0
 DRIVER.PINMUX.VAR.MUX84_OPTION0.VALUE=0
Index: include/sci.h
===================================================================
diff -u -r38ff7a6fbf82b86ab1bac3b7b24c4ea33d5419f9 -r6c8c486d26306662402945537c5acaea2709d85b
--- include/sci.h	(.../sci.h)	(revision 38ff7a6fbf82b86ab1bac3b7b24c4ea33d5419f9)
+++ include/sci.h	(.../sci.h)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -140,8 +140,8 @@
 #define SCI_FORMAT_CONFIGVALUE     (8U - 1U)
 #define SCI_BRS_CONFIGVALUE        (55U)
 #define SCI_PIO0_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)1U << 1U))
-#define SCI_PIO1_CONFIGVALUE       ((uint32)((uint32)0U << 2U ) | (uint32)((uint32)0U << 1U))
-#define SCI_PIO6_CONFIGVALUE       ((uint32)((uint32)0U << 2U ) | (uint32)((uint32)0U << 1U))
+#define SCI_PIO1_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)0U << 1U))
+#define SCI_PIO6_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)0U << 1U))
 #define SCI_PIO7_CONFIGVALUE       ((uint32)((uint32)0U << 2U ) | (uint32)((uint32)0U << 1U))
 #define SCI_PIO8_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)1U << 1U))
  
@@ -175,8 +175,8 @@
 #define SCILIN_FORMAT_CONFIGVALUE     (8U - 1U)
 #define SCILIN_BRS_CONFIGVALUE        (6U)
 #define SCILIN_PIO0_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 1U))
-#define SCILIN_PIO1_CONFIGVALUE       ((uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U))
-#define SCILIN_PIO6_CONFIGVALUE       ((uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U))
+#define SCILIN_PIO1_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)0U << 1U))
+#define SCILIN_PIO6_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)0U << 1U))
 #define SCILIN_PIO7_CONFIGVALUE       ((uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U))
 #define SCILIN_PIO8_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 1U))
  
Index: source/can.c
===================================================================
diff -u -rcb47c5f896477ceae7597cb1a4191b3972e93f0d -r6c8c486d26306662402945537c5acaea2709d85b
--- source/can.c	(.../can.c)	(revision cb47c5f896477ceae7597cb1a4191b3972e93f0d)
+++ source/can.c	(.../can.c)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -197,7 +197,7 @@
 
 
     canREG1->IF1MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)1U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x1U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF1CMD  = (uint8) 0xF8U;
     canREG1->IF1NO   = 1U;
@@ -216,7 +216,7 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)2U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x2U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 2U;
@@ -235,7 +235,7 @@
     } /* Wait */
 
     canREG1->IF1MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)3U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x4U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF1CMD  = (uint8) 0xF8U;
     canREG1->IF1NO   = 3U;
@@ -254,7 +254,7 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)4U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x8U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 4U;
@@ -273,7 +273,7 @@
     } /* Wait */
 
     canREG1->IF1MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)5U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x10U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF1CMD  = (uint8) 0xF8U;
     canREG1->IF1NO   = 5U;
@@ -292,7 +292,7 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)6U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x20U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 6U;
@@ -311,7 +311,7 @@
     } /* Wait */
 
     canREG1->IF1MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)7U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x40U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF1CMD  = (uint8) 0xF8U;
     canREG1->IF1NO   = 7U;
@@ -330,7 +330,7 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)8U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x80U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 8U;
@@ -349,7 +349,7 @@
     } /* Wait */
 
     canREG1->IF1MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)9U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x100U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF1CMD  = (uint8) 0xF8U;
     canREG1->IF1NO   = 9U;
@@ -368,7 +368,7 @@
     } /* Wait */
 
     canREG1->IF2MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
-    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)10U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF2ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x200U & (uint32)0x000007FFU) << (uint32)18U);
     canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 10U;
Index: source/pinmux.c
===================================================================
diff -u -r765d2c35118e202444e737c66c77faf9678cc87e -r6c8c486d26306662402945537c5acaea2709d85b
--- source/pinmux.c	(.../pinmux.c)	(revision 765d2c35118e202444e737c66c77faf9678cc87e)
+++ source/pinmux.c	(.../pinmux.c)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -182,9 +182,9 @@
     
     pinMuxReg->PINMMR6 =    PINMUX_PIN_33_HET1_07 | PINMUX_PIN_35_HET1_09;
     
-    pinMuxReg->PINMMR7 =    PINMUX_PIN_37_MIBSPI3NCS_1 | PINMUX_PIN_38_HET1_06;
+    pinMuxReg->PINMMR7 =    PINMUX_PIN_37_MIBSPI3NCS_1 | PINMUX_PIN_38_SCIRX;
     
-    pinMuxReg->PINMMR8 =    PINMUX_PIN_39_HET1_13 | PINMUX_PIN_40_MIBSPI1NCS_2 | PINMUX_PIN_41_HET1_15;
+    pinMuxReg->PINMMR8 =    PINMUX_PIN_39_SCITX | PINMUX_PIN_40_MIBSPI1NCS_2 | PINMUX_PIN_41_HET1_15;
     
     pinMuxReg->PINMMR9 =  ((~(pinMuxReg->PINMMR9 >> 18U) & 0x00000001U ) << 18U) | PINMUX_PIN_54_MIBSPI3NENA | PINMUX_PIN_55_MIBSPI3NCS_0;
     
Index: source/sci.c
===================================================================
diff -u -r38ff7a6fbf82b86ab1bac3b7b24c4ea33d5419f9 -r6c8c486d26306662402945537c5acaea2709d85b
--- source/sci.c	(.../sci.c)	(revision 38ff7a6fbf82b86ab1bac3b7b24c4ea33d5419f9)
+++ source/sci.c	(.../sci.c)	(revision 6c8c486d26306662402945537c5acaea2709d85b)
@@ -110,11 +110,11 @@
                  | (uint32)((uint32)0U << 1U); /* rx pin */
 
     /** - set SCI pins output direction */
-    sciREG->PIO1 = (uint32)((uint32)0U << 2U)  /* tx pin */
+    sciREG->PIO1 = (uint32)((uint32)1U << 2U)  /* tx pin */
                  | (uint32)((uint32)0U << 1U); /* rx pin */
 
     /** - set SCI pins open drain enable */
-    sciREG->PIO6 = (uint32)((uint32)0U << 2U)  /* tx pin */
+    sciREG->PIO6 = (uint32)((uint32)1U << 2U)  /* tx pin */
                  | (uint32)((uint32)0U << 1U); /* rx pin */
 
     /** - set SCI pins pullup/pulldown enable */
@@ -188,12 +188,12 @@
 
 
     /** - set SCI pins output direction */
-    scilinREG->PIO1 = (uint32)((uint32)0U << 2U)  /* tx pin */
+    scilinREG->PIO1 = (uint32)((uint32)1U << 2U)  /* tx pin */
                     | (uint32)((uint32)0U << 1U); /* rx pin */
 
 
     /** - set SCI pins open drain enable */
-    scilinREG->PIO6 = (uint32)((uint32)0U << 2U)  /* tx pin */
+    scilinREG->PIO6 = (uint32)((uint32)1U << 2U)  /* tx pin */
                     | (uint32)((uint32)0U << 1U); /* rx pin */