Index: firmware/App/Modes/ModePreTreat.c
===================================================================
diff -u -r19a8bf98a7154e24c35da25225d4b55bf70ddd09 -rc9e6a090e98c46b073f5df0f4f4b53a31ae77374
--- firmware/App/Modes/ModePreTreat.c	(.../ModePreTreat.c)	(revision 19a8bf98a7154e24c35da25225d4b55bf70ddd09)
+++ firmware/App/Modes/ModePreTreat.c	(.../ModePreTreat.c)	(revision c9e6a090e98c46b073f5df0f4f4b53a31ae77374)
@@ -1133,7 +1133,7 @@
         }
         else if ( dgCmdResp.rejectCode != DG_CMD_REQUEST_REJECT_REASON_NONE )
         {
-            // TODO - s/w fault
+            SET_ALARM_WITH_2_U32_DATA( ALARM_ID_HD_SOFTWARE_FAULT, SW_FAULT_ID_DG_INVALID_FILL_COMMAND_REJECTED, dgCmdResp.rejectCode )
         }
     }
 
@@ -1170,10 +1170,13 @@
                 state = PRE_TREATMENT_RESERVOIR_MGMT_WAIT_FOR_RESERVOIR_SWITCH_STATE;
                 reservoirFilledStatus[ DG_RESERVOIR_1 ] = TRUE;
             }
-            else if ( ( TRUE == reservoirFilledStatus[ DG_RESERVOIR_1 ] ) && ( FALSE == reservoirFilledStatus[ DG_RESERVOIR_2 ] ) )
+            else
             {
-                reservoirFilledStatus[ DG_RESERVOIR_2 ] = TRUE;
-                state = PRE_TREATMENT_RESERVOIR_MGMT_COMPLETE_STATE;
+                if ( FALSE == reservoirFilledStatus[ DG_RESERVOIR_2 ] )
+                {
+                    reservoirFilledStatus[ DG_RESERVOIR_2 ] = TRUE;
+                    state = PRE_TREATMENT_RESERVOIR_MGMT_COMPLETE_STATE;
+                }
             }
         }
         else
@@ -1194,7 +1197,7 @@
                     cmdSetDGActiveReservoir( DG_RESERVOIR_1 );
                 }
             }
-            else if ( ( TRUE == reservoirFlushedStatus[ DG_RESERVOIR_1 ] ) && ( FALSE == reservoirFlushedStatus[ DG_RESERVOIR_2 ] ) )
+            else
             {
                 reservoirFlushedStatus[ DG_RESERVOIR_2 ] = TRUE;
                 cmdSetDGActiveReservoir( DG_RESERVOIR_2 );
Index: firmware/App/Services/AlarmMgmtSWFaults.h
===================================================================
diff -u -r37a9fd8f15e413db5337371a7d1a1cb65567af7c -rc9e6a090e98c46b073f5df0f4f4b53a31ae77374
--- firmware/App/Services/AlarmMgmtSWFaults.h	(.../AlarmMgmtSWFaults.h)	(revision 37a9fd8f15e413db5337371a7d1a1cb65567af7c)
+++ firmware/App/Services/AlarmMgmtSWFaults.h	(.../AlarmMgmtSWFaults.h)	(revision c9e6a090e98c46b073f5df0f4f4b53a31ae77374)
@@ -167,6 +167,7 @@
     SW_FAULT_ID_MODE_TREATMENT_PARAMS_INVALID_GET_S32_PARAM_MIN_LIMIT,
     SW_FAULT_ID_MODE_TREATMENT_PARAMS_INVALID_GET_S32_PARAM_MAX_LIMIT,
     SW_FAULT_ID_ILLEGAL_MEM_ACCESS,
+    SW_FAULT_ID_DG_INVALID_FILL_COMMAND_REJECTED,
     NUM_OF_SW_FAULT_IDS
 } SW_FAULT_ID_T;
 
Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r19a8bf98a7154e24c35da25225d4b55bf70ddd09 -rc9e6a090e98c46b073f5df0f4f4b53a31ae77374
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 19a8bf98a7154e24c35da25225d4b55bf70ddd09)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision c9e6a090e98c46b073f5df0f4f4b53a31ae77374)
@@ -936,7 +936,7 @@
         }
         else
         {
-            if ( ( MIN_HD_FPGA_MAJOR == fpgaHeader.fpgaRevMajor ) && ( fpgaHeader.fpgaRev >= MIN_HD_FPGA_MINOR ) )
+            if ( fpgaHeader.fpgaRev >= MIN_HD_FPGA_MINOR )
             {
                 result = SELF_TEST_STATUS_PASSED;
             }