Index: firmware/App/Controllers/Fans.c
===================================================================
diff -u -r27a68f930508638f2eb6265ebb381c8918cbc37b -ref6d5a5ca314cbe30131156824e9d32792402fc4
--- firmware/App/Controllers/Fans.c	(.../Fans.c)	(revision 27a68f930508638f2eb6265ebb381c8918cbc37b)
+++ firmware/App/Controllers/Fans.c	(.../Fans.c)	(revision ef6d5a5ca314cbe30131156824e9d32792402fc4)
@@ -54,7 +54,7 @@
 #define FANS_MIN_ALLOWED_RPM                         150                                           ///< Fans max allowed RPM value.
 #define FANS_MIN_RPM_OUT_OF_RANGE_TOL                0.25F                                         ///< Fans min RPM out of range tolerance.
 #define FANS_MAX_RPM_OUT_OF_RANGE_TOL                0.5F                                          ///< Fans max RPM out of range tolerance.
-#define DATA_PUBLISH_COUNTER_START_COUNT             15                                            ///< Data publish counter start count.
+#define DATA_PUBLISH_COUNTER_START_COUNT             17                                            ///< Data publish counter start count.
 
 /// Fans exec states
 typedef enum fans_Exec_States
Index: firmware/App/Controllers/Switches.c
===================================================================
diff -u -r657315a7f516ff9090d85f9009b8834421c3b4b6 -ref6d5a5ca314cbe30131156824e9d32792402fc4
--- firmware/App/Controllers/Switches.c	(.../Switches.c)	(revision 657315a7f516ff9090d85f9009b8834421c3b4b6)
+++ firmware/App/Controllers/Switches.c	(.../Switches.c)	(revision ef6d5a5ca314cbe30131156824e9d32792402fc4)
@@ -31,7 +31,7 @@
 
 #define SWITCHES_DATA_PUB_INTERVAL       ( MS_PER_SECOND / TASK_GENERAL_INTERVAL )              ///< Interval (ms/task time) at which the switches data is published on the CAN bus.
 #define SWITCHES_DEBOUNCE_TIME_MS        ( MS_PER_SECOND / 4 )                                  ///< Switches FPGA status check interval.
-#define DATA_PUBLISH_COUNTER_START_COUNT 4                                                      ///< Data publish counter start count.
+#define DATA_PUBLISH_COUNTER_START_COUNT 90                                                     ///< Data publish counter start count.
 
 #define FRONT_DOOR_SWITCH_MASK           0x0010                                                 ///< Front door switch bit mask. Bit 4 of the FPGA GPIO register.
 #define PUMP_TRACK_SWITCH_MASK           0x0020                                                 ///< Pump track switch bit mask. Bit 5 of the FPGA GPIO register.