Index: FPGA.c
===================================================================
diff -u -r9512aac6feeb1379d6d425361fa78d58f75c86f6 -re8ab746b2c16710ba012665b29d44c755a7dab3e
--- FPGA.c	(.../FPGA.c)	(revision 9512aac6feeb1379d6d425361fa78d58f75c86f6)
+++ FPGA.c	(.../FPGA.c)	(revision e8ab746b2c16710ba012665b29d44c755a7dab3e)
@@ -83,42 +83,15 @@
 #define SCI2_RECEIVE_DMA_REQUEST        28                              ///< Serial port 2 receive DMA request line.
 #define SCI2_TRANSMIT_DMA_REQUEST       29                              ///< Serial port 2 transmit DMA request line.
 
-#define FPGA_INPUT_VOLTAGE_SCALE        3.0F                            ///< FPGA source and aux voltage.
-#define FPGA_PVN_VOLTAGE_SCALE          1.0F                            ///< FPGA pvn voltage.
-
 #define FPGA_ADC1_AUTO_READ_ENABLE      0x01                            ///< Auto-read enable bit for ADC1 control register.
 
-#define FPGA_AIRTRAP_LEVEL_LOW_MASK     0x0008                          ///< Bit mask for air trap lower level sensor.
-#define FPGA_AIRTRAP_LEVEL_HIGH_MASK    0x0004                          ///< Bit mask for air trap upper level sensor.
-
-#define FPGA_FLUID_LEAK_STATE_MASK      0x0040                          ///< Bit mask for fluid leak detector.
-
 #define FPGA_BLOOD_LEAK_STATUS_MASK     0x1000                          ///< Bit mask for blood leak detector.
 #define FPGA_BLOOD_LEAK_ST_BIT_INDEX    12                              ///< Bit index for the blood leak self test status bit.
 #define FPGA_BLOOD_LEAK_ZERO_STATE_MASK 0x2000                          ///< Bit mask for blood leak detector zero.
 #define FPAG_BLOOD_LEAK_ZERO_BIT_INDEX  13                              ///< Bit index for the blood leak zero status bit.
 #define FPGA_BLOOD_LEAK_ZERO_CMD        0x02                            ///< Bit for blood leak detector zero command.
 #define FPGA_BLOOD_LEAK_SELF_TEST_CMD   0x01                            ///< Bit for blood leak detector self test command.
 
-#define FPGA_ADA_BUBBLE_STATUS_MASK     0x0001                          ///< Bit mask for arterial air bubble detector input status.
-#define FPGA_ADV_BUBBLE_STATUS_MASK     0x0002                          ///< Bit mask for venous air bubble detector input status.
-#define FPGA_ADA_BUBBLE_SELF_TEST_CMD   0x04                            ///< Bit for arterial air bubble detector self-test command.
-#define FPGA_ADV_BUBBLE_SELF_TEST_CMD   0x08                            ///< Bit for venous air bubble detector self-test command.
-
-#define FPGA_PBO_TEMP_DIVISOR           2047.0F                         ///< Used in conversion of PBo temperature reading to deg C.
-#define FPGA_PBO_TEMP_GAIN              200.0F                          ///< Used in conversion of PBo temperature reading to deg C.
-#define FPGA_PBO_TEMP_OFFSET            50.0F                           ///< Used in conversion of PBo temperature reading to deg C.
-
-#define FPGA_ALARM_AUDIO_VOLUME_SHIFT   3                               ///< Shift alarm audio volume 3 bits to left before writing to register.
-#define FPGA_ALARM_AUDIO_DIVIDE_SHIFT   6                               ///< Shift alarm audio volume divider 6 bits to left before writing to register.
-
-#define FPGA_BACKUP_ALARM_AUDIO_CONVERT 0.4F                            ///< Converts backup (piezo) alarm audio ADC volts to amps.
-
-#define FRONT_DOOR_SWITCH_MASK          0x0010                          ///< Front door switch bit mask. Bit 4 of the GPIO register.
-#define PUMP_TRACK_SWITCH_MASK          0x0020                          ///< Pump track switch bit mask. Bit 5 of the GPIO register.
-
-#define FPGA_VALVES_MIN_PWM_MODE_COUNT  2500                            ///< FPGA valves minimum PWM in PWM mode in counts.
-
 // ********** private data **********
 
 // FPGA state