/**************************************************************************
*
* Copyright (c) 2024-2024 Diality Inc. - All Rights Reserved.
*
* THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
* WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
*
* @file    Comm.c
*
* @author  (last)      Sean Nash
* @date    (last)      31-Jul-2024
*
* @author  (original)  Sean Nash
* @date    (original)  31-Jul-2024
*
***************************************************************************/

#include "can.h"
#include "sci.h"
#include "sys_dma.h"

#include "Comm.h"

/**
 *  @addtogroup CommInterrupts
 *  @{
 */

// ********** private definitions **********

#define DMA_CH_STATUS_BIT(ch)       ((U32)1U << (ch))               ///< Macro to get bit mask for status of a given DMA channel.

#define SCI_DMA_TRANSMIT_INT        0x00010000                      ///< Bit mask for setting/clearing serial DMA transmit interrupts.
#define SCI_DMA_RECEIVE_INT         0x00060000                      ///< Bit mask for setting/clearing serial DMA receive interrupts.

// ********** private data **********

static volatile BOOL canXmitsInProgress = FALSE;                    ///< Flag indicates a CAN frame transmit is in progress.

/*********************************************************************//**
 * @brief
 * The signalCANXmitsInitiated function sets the CAN transmits in
 * progress flag.
 * @details \b Inputs: none
 * @details \b Outputs: canXmitsInProgress
 * @return none
 *************************************************************************/
void signalCANXmitsInitiated( void )
{
    canXmitsInProgress = TRUE;
}

/*********************************************************************//**
 * @brief
 * The signalCANXmitsCompleted function resets the CAN transmits in
 * progress flag.
 * @details \b Inputs: none
 * @details \b Outputs: canXmitsInProgress
 * @return none
 *************************************************************************/
void signalCANXmitsCompleted( void )
{
    canXmitsInProgress = FALSE;
}

/*********************************************************************//**
 * @brief
 * The setSCI2DMAReceiveInterrupt function enables DMA receive interrupts
 * for the SCI2 peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA receive interrupt is enabled.
 * @return none
 *************************************************************************/
void setSCI2DMAReceiveInterrupt( void )
{
    scilinREG->SETINT = SCI_DMA_RECEIVE_INT;
}

/*********************************************************************//**
 * @brief
 * The setSCI2DMATransmitInterrupt function enables DMA transmit interrupts
 * for the SCI2 peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA transmit interrupt is enabled.
 * @return none
 *************************************************************************/
void setSCI2DMATransmitInterrupt( void )
{
    scilinREG->SETINT = SCI_DMA_TRANSMIT_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCI2DMAReceiveInterrupt function disables DMA receive interrupts
 * for the SCI2 peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA receive interrupt is disabled.
 * @return none
 *************************************************************************/
void clearSCI2DMAReceiveInterrupt( void )
{
    scilinREG->CLEARINT = SCI_DMA_RECEIVE_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCI2DMATransmitInterrupt function disables DMA transmit interrupts
 * for the SCI2 peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA transmit interrupt is disabled.
 * @return none
 *************************************************************************/
void clearSCI2DMATransmitInterrupt( void )
{
    scilinREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
}

/*********************************************************************//**
 * @brief
 * The setSCIDMAReceiveInterrupt function enables DMA receive interrupts
 * for the SCI peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA receive interrupt is enabled.
 * @return none
 *************************************************************************/
void setSCIDMAReceiveInterrupt( void )
{
    sciREG->SETINT = SCI_DMA_RECEIVE_INT;
}

/*********************************************************************//**
 * @brief
 * The setSCIDMATransmitInterrupt function enables DMA transmit interrupts
 * for the SCI peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA transmit interrupt is enabled.
 * @return none
 *************************************************************************/
void setSCIDMATransmitInterrupt( void )
{
    sciREG->SETINT = SCI_DMA_TRANSMIT_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCIDMAReceiveInterrupt function disables DMA receive interrupts
 * for the SCI peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA receive interrupt is disabled.
 * @return none
 *************************************************************************/
void clearSCIDMAReceiveInterrupt( void )
{
    sciREG->CLEARINT = SCI_DMA_RECEIVE_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCIDMATransmitInterrupt function disables DMA transmit interrupts
 * for the SCI peripheral.
 * @details \b Inputs: none
 * @details \b Outputs: DMA transmit interrupt is disabled.
 * @return none
 *************************************************************************/
void clearSCIDMATransmitInterrupt( void )
{
    sciREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCI1CommErrors function clears framing and/or overrun error flags \
 * for the SCI1 peripheral.
 * @details \b Inputs: none
 * @details \bOutputs: SCI1 error flags cleared.
 * @return none
 *************************************************************************/
void clearSCI1CommErrors( void )
{
    sciReceiveByte( sciREG );
    sciREG->FLR |= ( SCI_FE_INT | SCI_OE_INT );
}

/*********************************************************************//**
 * @brief
 * The isSCI2DMATransmitInProgress function determines whether a DMA transmit
 * is in progress on the SCI2 peripheral.
 * @details \b Inputs: status registers
 * @details \b Outputs: none
 * @return TRUE if a transmit is in progress, FALSE if not
 *************************************************************************/
BOOL isSCI2DMATransmitInProgress( void )
{
    BOOL transmitterBusy = ( ( scilinREG->FLR & (U32)SCI_TX_INT ) == 0U ? TRUE : FALSE );
    BOOL dmaTransmitterBusy = ( ( dmaREG->PEND & DMA_CH_STATUS_BIT(DMA_CH2) ) != 0U ? TRUE : FALSE );

    return ( ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
}

/*********************************************************************//**
 * @brief
 * The isCAN1TransmitInProgress function determines whether a transmit
 * is in progress on the CAN1 peripheral.
 * @details \b Inputs: status registers
 * @details \b Outputs: none
 * @return TRUE if a transmit is in progress, FALSE if not
 *************************************************************************/
BOOL isCAN1TransmitInProgress( void )
{
    BOOL result = ( ( TRUE == canXmitsInProgress ) || ( canREG1->TXRQx[ 0 ] != 0 ) || ( canREG1->TXRQx[ 1 ] != 0 ) ? TRUE : FALSE );

    return result;
}

/**@}*/