/************************************************************************** * * Copyright (c) 2019-2020 Diality Inc. - All Rights Reserved. * * THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN * WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER. * * @file Interrupts.c * * @author (last) Quang Nguyen * @date (last) 01-Sep-2020 * * @author (original) Dara Navaei * @date (original) 05-Nov-2019 * ***************************************************************************/ #include "can.h" #include "rti.h" #include "sci.h" #include "sys_dma.h" #include "AlarmMgmt.h" #include "Comm.h" #include "Interrupts.h" #include "FPGA.h" #include "SystemComm.h" #include "TaskGeneral.h" #include "TaskPriority.h" #include "TaskTimer.h" #include "Utilities.h" /** * @addtogroup Interrupts * @{ */ // ********** private definitions ********** #define MAX_COMM_ERRORS 5 ///< Maximum number of a given comm error for a given time window. #define COMM_ERROR_TIME_WINDOW_MS (10 * SEC_PER_MIN * MS_PER_SECOND) ///< Time window for comm error counts. // ********** private data ********** static U32 can1WarningCnt; ///< CAN1 warning count. static U32 can1BusOffCnt; ///< CAN1 bus offline count. static U32 can1ParityCnt; ///< CAN1 parity count. /*********************************************************************//** * @brief * The initInterrupts function initializes the Interrupts module. * @details Inputs: none * @details Outputs: Interrupts module initialized * @return none *************************************************************************/ void initInterrupts( void ) { can1WarningCnt = 0; can1BusOffCnt = 0; can1ParityCnt = 0; // initialize various time windowed counts for monitoring CAN & UART errors and warnings initTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_OFF, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); initTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_PARITY, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_FRAME_ERROR, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_UART_OVERRUN, MAX_COMM_ERRORS, COMM_ERROR_TIME_WINDOW_MS ); } /*********************************************************************//** * @brief * The phantomInterrupt function handles phantom interrupts. * @details Inputs: none * @details Outputs: phantom interrupt handled * @return none *************************************************************************/ void phantomInterrupt( void ) { // TODO - what to do with phantom interrupts? } /*********************************************************************//** * @brief * The rtiNotification function handles real-time interrupt notifications. * @details Inputs: none * @details Outputs: RTI notification handled * @param notification Which RTI timer caused this interrupt * @return none *************************************************************************/ void rtiNotification( uint32 notification ) { switch ( notification ) { case rtiNOTIFICATION_COMPARE0: taskTimer(); break; case rtiNOTIFICATION_COMPARE1: taskPriority(); break; case rtiNOTIFICATION_COMPARE2: // do nothing - unused at this time break; case rtiNOTIFICATION_COMPARE3: taskGeneral(); break; default: SET_ALARM_WITH_2_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_INVALID_RTI_NOTIFICATION, notification ) break; } } /*********************************************************************//** * @brief * The canMessageNotification function handles CAN message notifications. * @details Inputs: none * @details Outputs: CAN message notification handled * @param node which CAN controller * @param messageBox which message box triggered the message notification * @return none *************************************************************************/ void canMessageNotification(canBASE_t *node, uint32 messageBox) { if ( node == canREG1 ) { handleCANMsgInterrupt( (CAN_MESSAGE_BOX_T)messageBox ); } } /*********************************************************************//** * @brief * The canErrorNotification function handles CAN error notifications. * @details Inputs: none * @details Outputs: CAN error notification handled. * @param node which CAN controller * @param notification CAN error notification: * canLEVEL_PASSIVE (0x20) : When RX- or TX error counter are between 32 and 63 \n * canLEVEL_WARNING (0x40) : When RX- or TX error counter are between 64 and 127 \n * canLEVEL_BUS_OFF (0x80) : When RX- or TX error counter are between 128 and 255 \n * canLEVEL_PARITY_ERR (0x100): When parity error detected on CAN RAM read access * @return none *************************************************************************/ void canErrorNotification(canBASE_t *node, uint32 notification) { if ( node == canREG1 ) { // Parity error - message RAM is corrupted if ( notification & canLEVEL_PARITY_ERR ) { can1ParityCnt++; if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_PARITY ) ) { SET_ALARM_WITH_1_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_CAN_PARITY_ERROR ) } } // Bus off - our transmitter has counted 255+ errors else if ( notification & canLEVEL_BUS_OFF ) { can1BusOffCnt++; if ( TRUE == incTimeWindowedCount( TIME_WINDOWED_COUNT_CAN_OFF ) ) { SET_ALARM_WITH_1_U32_DATA( ALARM_ID_DG_SOFTWARE_FAULT, SW_FAULT_ID_CAN_OFF_ERROR ) } } // Warning - our transmitter has counted 96+ errors else if ( notification & canLEVEL_WARNING ) { can1WarningCnt++; } else { // Ignore - other notifications - unhandled } } } /*********************************************************************//** * @brief * The dmaGroupANotification function handles communication DMA interrupts. * @details Inputs: none * @details Outputs: DMA interrupt is handled. * @param inttype type of DMA interrupt * @param channel DMA channel that caused the interrupt * @return none *************************************************************************/ void dmaGroupANotification(dmaInterrupt_t inttype, uint32 channel) { if ( inttype == BTC ) // block transfer completed interrupt { switch ( channel ) { case DMA_CH0: // FPGA receive channel clearSCI2DMAReceiveInterrupt(); signalFPGAReceiptCompleted(); break; #ifdef DEBUG_ENABLED case DMA_CH1: // PC receive channel clearSCI1DMAReceiveInterrupt(); // handle received packet from PC handleUARTMsgRecvPacketInterrupt(); break; #endif case DMA_CH2: // FPGA transmit channel clearSCI2DMATransmitInterrupt(); signalFPGATransmitCompleted(); break; #ifdef DEBUG_ENABLED case DMA_CH3: // PC transmit channel clearSCI1DMATransmitInterrupt(); // send next pending packet to PC (if any) handleUARTMsgXmitPacketInterrupt(); break; #endif default: // TODO - ignore? break; } } } /**@}*/