/**************************************************************************
*
* Copyright (c) 2019-2020 Diality Inc. - All Rights Reserved.
*
* THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
* WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
*
* @file Comm.c
*
* @author (last) Quang Nguyen
* @date (last) 25-Aug-2020
*
* @author (original) Dara Navaei
* @date (original) 05-Nov-2019
*
***************************************************************************/

#include "can.h"
#include "sci.h"
#include "sys_dma.h"

#include "Comm.h"

// ********** private definitions **********

#define SCI_DMA_TRANSMIT_INT            0x00010000          ///< SCI DMA transmit interrupt mask.
#define SCI_DMA_RECEIVE_INT             0x00060000          ///< SCI DMA receive interrupt mask.
#define DMA_CH_STATUS_BIT(ch)           ((U32)1U << (ch))   ///< DMA channel status bit mask.

// ********** private data **********

static volatile BOOL canXmitsInProgress = FALSE;            ///< Flag to indicates CAN transmit is in progress.
#ifdef DEBUG_ENABLED
    static volatile BOOL uartXmitsInProgress = FALSE;       ///< Flag to indicates UART transmit is in progress.
#endif

/*********************************************************************//**
 * @brief
 * The signalCANXmitsInitiated function sets the CAN transmits in progress flag.
 * @details
 * Inputs : none
 * Outputs : canXmitsInProgress
 * @return none
 *************************************************************************/
void signalCANXmitsInitiated( void )
{
    canXmitsInProgress = TRUE;
}

/*********************************************************************//**
 * @brief
 * The signalCANXmitsCompleted function resets the CAN transmits in progress flag.
 * @details
 * Inputs : none
 * Outputs : canXmitsInProgress
 * @return none
 *************************************************************************/
void signalCANXmitsCompleted( void )
{
    canXmitsInProgress = FALSE;
}

/*********************************************************************//**
 * @brief
 * The signalSCI1XmitsInitiated function sets the SCI1 transmits in progress flag.
 * @details
 * Inputs : none
 * Outputs : uartXmitsInProgress
 * @return none
 *************************************************************************/
#ifdef DEBUG_ENABLED
void signalSCI1XmitsInitiated( void )
{
    uartXmitsInProgress = TRUE;
}
#endif

/*********************************************************************//**
 * @brief
 * The signalSCI1XmitsCompleted function resets the SCI1 transmits in progress flag.
 * @details
 * Inputs : none
 * Outputs : uartXmitsInProgress
 * @return none
 *************************************************************************/
#ifdef DEBUG_ENABLED
void signalSCI1XmitsCompleted( void )
{
    uartXmitsInProgress = FALSE;
}
#endif

/*********************************************************************//**
 * @brief
 * The setSCI1DMAReceiveInterrupt function enables DMA receive interrupts
 * for the SCI1 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA receive interrupt is enabled.
 * @return none
 *************************************************************************/
#ifdef DEBUG_ENABLED
void setSCI1DMAReceiveInterrupt( void )
{
    sciREG->SETINT = SCI_DMA_RECEIVE_INT;
}
#endif

/*********************************************************************//**
 * @brief
 * The setSCI1DMATransmitInterrupt function enables DMA transmit interrupts
 * for the SCI1 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA transmit interrupt is enabled.
 * @return none
 *************************************************************************/
#ifdef DEBUG_ENABLED
void setSCI1DMATransmitInterrupt( void )
{
    sciREG->SETINT = SCI_DMA_TRANSMIT_INT;
}
#endif

/*********************************************************************//**
 * @brief
 * The clearSCI1DMAReceiveInterrupt function disables DMA receive interrupts
 * for the SCI1 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA receive interrupt is disabled.
 * @return none
 *************************************************************************/
#ifdef DEBUG_ENABLED
void clearSCI1DMAReceiveInterrupt( void )
{
    sciREG->CLEARINT = SCI_DMA_RECEIVE_INT;
}
#endif

/*********************************************************************//**
 * @brief
 * The clearSCI1DMATransmitInterrupt function disables DMA transmit interrupts
 * for the SCI1 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA transmit interrupt is disabled.
 * @return none
 *************************************************************************/
#ifdef DEBUG_ENABLED
void clearSCI1DMATransmitInterrupt( void )
{
    sciREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
}
#endif

/*********************************************************************//**
 * @brief
 * The setSCI2DMAReceiveInterrupt function enables DMA receive interrupts
 * for the SCI2 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA receive interrupt is enabled.
 * @return none
 *************************************************************************/
void setSCI2DMAReceiveInterrupt( void )
{
    scilinREG->SETINT = SCI_DMA_RECEIVE_INT;
}

/*********************************************************************//**
 * @brief
 * The setSCI2DMATransmitInterrupt function enables DMA transmit interrupts
 * for the SCI2 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA transmit interrupt is enabled.
 * @return none
 *************************************************************************/
void setSCI2DMATransmitInterrupt( void )
{
    scilinREG->SETINT = SCI_DMA_TRANSMIT_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCI2DMAReceiveInterrupt function disables DMA receive interrupts
 * for the SCI2 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA receive interrupt is disabled.
 * @return none
 *************************************************************************/
void clearSCI2DMAReceiveInterrupt( void )
{
    scilinREG->CLEARINT = SCI_DMA_RECEIVE_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCI2DMATransmitInterrupt function disables DMA transmit interrupts
 * for the SCI2 peripheral.
 * @details
 * Inputs : none
 * Outputs : DMA transmit interrupt is disabled.
 * @return none
 *************************************************************************/
void clearSCI2DMATransmitInterrupt( void )
{
    scilinREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
}

/*********************************************************************//**
 * @brief
 * The clearSCI1CommErrors function clears framing and/or overrun error flags
 * for the SCI1 peripheral.
 * @details
 * Inputs : none
 * Outputs : SCI1 error flags cleared.
 * @return none
 *************************************************************************/
#ifdef DEBUG_ENABLED
void clearSCI1CommErrors( void )
{
    sciReceiveByte( sciREG );
    sciREG->FLR |= ( SCI_FE_INT | SCI_OE_INT );
}
#endif

/*********************************************************************//**
 * @brief
 * The clearSCI2CommErrors function clears framing and/or overrun error flags
 * for the SCI2 peripheral.
 * @details
 * Inputs : none
 * Outputs : SCI2 error flags cleared.
 * @return none
 *************************************************************************/
void clearSCI2CommErrors( void )
{
    sciReceiveByte( scilinREG );
    scilinREG->FLR |= ( SCI_FE_INT | SCI_OE_INT );
}

/*********************************************************************//**
 * @brief
 * The isSCI2DMATransmitInProgress function determines whether a DMA transmit
 * is in progress on the SCI1 peripheral.
 * @details
 * Inputs : status registers
 * Outputs : none
 * @return TRUE if a transmit is in progress, FALSE if not
 *************************************************************************/
#ifdef DEBUG_ENABLED
BOOL isSCI1DMATransmitInProgress( void )
{
    BOOL transmitterBusy = ( ( sciREG->FLR & (U32)SCI_TX_INT ) == 0U ? TRUE : FALSE );
    BOOL dmaTransmitterBusy = ( ( dmaREG->PEND & DMA_CH_STATUS_BIT(DMA_CH3) ) != 0U ? TRUE : FALSE );


    return ( ( TRUE == uartXmitsInProgress ) || ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
}
#endif

/*********************************************************************//**
 * @brief
 * The isSCI2DMATransmitInProgress function determines whether a DMA transmit
 * is in progress on the SCI2 peripheral.
 * @details
 * Inputs : status registers
 * Outputs : none
 * @return TRUE if a transmit is in progress, FALSE if not
 *************************************************************************/
BOOL isSCI2DMATransmitInProgress( void )
{
    BOOL transmitterBusy = ( ( scilinREG->FLR & (U32)SCI_TX_INT ) == 0U ? TRUE : FALSE );
    BOOL dmaTransmitterBusy = ( ( dmaREG->PEND & DMA_CH_STATUS_BIT(DMA_CH2) ) != 0U ? TRUE : FALSE );

    return ( ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
}

/*********************************************************************//**
 * @brief
 * The isCAN1TransmitInProgress function determines whether a transmit
 * is in progress on the CAN1 peripheral.
 * @details
 * Inputs : status registers
 * Outputs : none
 * @return TRUE if a transmit is in progress, FALSE if not
 *************************************************************************/
BOOL isCAN1TransmitInProgress( void )
{
    BOOL result = ( ( TRUE == canXmitsInProgress ) || ( canREG1->TXRQx[ 0 ] != 0 ) || ( canREG1->TXRQx[ 1 ] != 0 ) ? TRUE : FALSE );

    return result;
}

/**@}*/