-- VectorCAST 19 revision c2818cf (09/24/19) -- Test Case Script -- -- Environment : COMM -- Unit(s) Under Test: Comm -- -- Script Features TEST.SCRIPT_FEATURE:C_DIRECT_ARRAY_INDEXING TEST.SCRIPT_FEATURE:CPP_CLASS_OBJECT_REVISION TEST.SCRIPT_FEATURE:MULTIPLE_UUT_SUPPORT TEST.SCRIPT_FEATURE:MIXED_CASE_NAMES TEST.SCRIPT_FEATURE:STATIC_HEADER_FUNCS_IN_UUTS TEST.SCRIPT_FEATURE:VCAST_MAIN_NOT_RENAMED -- -- Unit: Comm -- Subprogram: clearSCI1DMAReceiveInterrupt -- Test Case: clearSCI1DMAReceiveInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:clearSCI1DMAReceiveInterrupt TEST.NEW TEST.NAME:clearSCI1DMAReceiveInterrupt TEST.VALUE:Comm.<>.sci1.CLEARINT:0 TEST.EXPECTED:Comm.<>.sci1.CLEARINT:0x60000 TEST.END -- Subprogram: clearSCI1DMATransmitInterrupt -- Test Case: clearSCI1DMATransmitInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:clearSCI1DMATransmitInterrupt TEST.NEW TEST.NAME:clearSCI1DMATransmitInterrupt TEST.VALUE:Comm.<>.sci1.CLEARINT:0 TEST.EXPECTED:Comm.<>.sci1.CLEARINT:0x10000 TEST.END -- Subprogram: clearSCI2DMAReceiveInterrupt -- Test Case: clearSCI2DMAReceiveInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:clearSCI2DMAReceiveInterrupt TEST.NEW TEST.NAME:clearSCI2DMAReceiveInterrupt TEST.VALUE:Comm.<>.sci2.CLEARINT:0 TEST.EXPECTED:Comm.<>.sci2.CLEARINT:0x60000 TEST.END -- Subprogram: clearSCI2DMATransmitInterrupt -- Test Case: clearSCI2DMATransmitInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:clearSCI2DMATransmitInterrupt TEST.NEW TEST.NAME:clearSCI2DMATransmitInterrupt TEST.VALUE:Comm.<>.sci2.CLEARINT:0 TEST.EXPECTED:Comm.<>.sci2.CLEARINT:0x10000 TEST.END -- Subprogram: isCAN1TransmitInProgress -- Test Case: isCAN1TransmitInProgress_Ch1_8_Busy TEST.UNIT:Comm TEST.SUBPROGRAM:isCAN1TransmitInProgress TEST.NEW TEST.NAME:isCAN1TransmitInProgress_Ch1_8_Busy TEST.VALUE:Comm.<>.can1.TXRQx[0]:1 TEST.VALUE:Comm.<>.can1.TXRQx[1]:0 TEST.EXPECTED:Comm.isCAN1TransmitInProgress.return:1 TEST.END -- Test Case: isCAN1TransmitInProgress_Ch9_16_Busy TEST.UNIT:Comm TEST.SUBPROGRAM:isCAN1TransmitInProgress TEST.NEW TEST.NAME:isCAN1TransmitInProgress_Ch9_16_Busy TEST.VALUE:Comm.<>.can1.TXRQx[0]:0 TEST.VALUE:Comm.<>.can1.TXRQx[1]:1 TEST.EXPECTED:Comm.isCAN1TransmitInProgress.return:1 TEST.END -- Test Case: isCAN1TransmitInProgress_NotBusy TEST.UNIT:Comm TEST.SUBPROGRAM:isCAN1TransmitInProgress TEST.NEW TEST.NAME:isCAN1TransmitInProgress_NotBusy TEST.VALUE:Comm.<>.can1.TXRQx[0..1]:0 TEST.EXPECTED:Comm.isCAN1TransmitInProgress.return:0 TEST.END -- Subprogram: isSCI1DMATransmitInProgress -- Test Case: isSCI1DMATransmitInProgress_DMABusy TEST.UNIT:Comm TEST.SUBPROGRAM:isSCI1DMATransmitInProgress TEST.NEW TEST.NAME:isSCI1DMATransmitInProgress_DMABusy TEST.VALUE:Comm.<>.sci1.FLR:0x100 TEST.VALUE:Comm.<>.dma1.PEND:0x8 TEST.EXPECTED:Comm.isSCI1DMATransmitInProgress.return:1 TEST.END -- Test Case: isSCI1DMATransmitInProgress_NotBusy TEST.UNIT:Comm TEST.SUBPROGRAM:isSCI1DMATransmitInProgress TEST.NEW TEST.NAME:isSCI1DMATransmitInProgress_NotBusy TEST.VALUE:Comm.<>.sci1.FLR:0x100 TEST.VALUE:Comm.<>.dma1.PEND:0x0 TEST.EXPECTED:Comm.isSCI1DMATransmitInProgress.return:0 TEST.END -- Test Case: isSCI1DMATransmitInProgress_TransmitterBusy TEST.UNIT:Comm TEST.SUBPROGRAM:isSCI1DMATransmitInProgress TEST.NEW TEST.NAME:isSCI1DMATransmitInProgress_TransmitterBusy TEST.VALUE:Comm.<>.sci1.FLR:0 TEST.EXPECTED:Comm.isSCI1DMATransmitInProgress.return:1 TEST.END -- Subprogram: isSCI2DMATransmitInProgress -- Test Case: isSCI2DMATransmitInProgress_DMABusy TEST.UNIT:Comm TEST.SUBPROGRAM:isSCI2DMATransmitInProgress TEST.NEW TEST.NAME:isSCI2DMATransmitInProgress_DMABusy TEST.VALUE:Comm.<>.sci2.FLR:0x100 TEST.VALUE:Comm.<>.dma1.PEND:0x4 TEST.EXPECTED:Comm.isSCI2DMATransmitInProgress.return:1 TEST.END -- Test Case: isSCI2DMATransmitInProgress_NotBusy TEST.UNIT:Comm TEST.SUBPROGRAM:isSCI2DMATransmitInProgress TEST.NEW TEST.NAME:isSCI2DMATransmitInProgress_NotBusy TEST.VALUE:Comm.<>.sci2.FLR:0x100 TEST.VALUE:Comm.<>.dma1.PEND:0x0 TEST.EXPECTED:Comm.isSCI2DMATransmitInProgress.return:0 TEST.END -- Test Case: isSCI2DMATransmitInProgress_TransmitterBusy TEST.UNIT:Comm TEST.SUBPROGRAM:isSCI2DMATransmitInProgress TEST.NEW TEST.NAME:isSCI2DMATransmitInProgress_TransmitterBusy TEST.VALUE:Comm.<>.sci2.FLR:0 TEST.VALUE:Comm.<>.dma1.PEND:0 TEST.EXPECTED:Comm.isSCI2DMATransmitInProgress.return:1 TEST.END -- Subprogram: setSCI1DMAReceiveInterrupt -- Test Case: setSCI1DMAReceiveInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:setSCI1DMAReceiveInterrupt TEST.NEW TEST.NAME:setSCI1DMAReceiveInterrupt TEST.VALUE:Comm.<>.sci1.SETINT:0 TEST.EXPECTED:Comm.<>.sci1.SETINT:0x60000 TEST.END -- Subprogram: setSCI1DMATransmitInterrupt -- Test Case: setSCI1DMATransmitInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:setSCI1DMATransmitInterrupt TEST.NEW TEST.NAME:setSCI1DMATransmitInterrupt TEST.VALUE:Comm.<>.sci1.SETINT:0 TEST.EXPECTED:Comm.<>.sci1.SETINT:0x10000 TEST.END -- Subprogram: setSCI2DMAReceiveInterrupt -- Test Case: setSCI2DMAReceiveInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:setSCI2DMAReceiveInterrupt TEST.NEW TEST.NAME:setSCI2DMAReceiveInterrupt TEST.VALUE:Comm.<>.sci2.SETINT:0 TEST.EXPECTED:Comm.<>.sci2.SETINT:0x60000 TEST.END -- Subprogram: setSCI2DMATransmitInterrupt -- Test Case: setSCI2DMATransmitInterrupt TEST.UNIT:Comm TEST.SUBPROGRAM:setSCI2DMATransmitInterrupt TEST.NEW TEST.NAME:setSCI2DMATransmitInterrupt TEST.VALUE:Comm.<>.sci2.SETINT:0 TEST.EXPECTED:Comm.<>.sci2.SETINT:0x10000 TEST.END