Testcase Management Report
Configuration Data
| Environment Name | COMM |
| Date of Report Creation | 21 NOV 2019 |
| Time of Report Creation | 2:27:08 PM |
| Testcases |
17 / 17 PASS |
| Expecteds |
17 / 17 PASS |
| Statement Coverage |
16 / 16 (100%) |
| Branch Coverage |
45 / 45 (100%) |
| Pairs Coverage |
10 / 10 (100%) |
| Unit | Subprogram | Test Cases | Execution Date and Time | Pass/Fail |
| Comm | setSCI1DMAReceiveInterrupt | setSCI1DMAReceiveInterrupt | 21 NOV 2019 2:27:01 PM | PASS 1 / 1 |
| | setSCI1DMATransmitInterrupt | setSCI1DMATransmitInterrupt | 21 NOV 2019 2:27:01 PM | PASS 1 / 1 |
| | clearSCI1DMAReceiveInterrupt | clearSCI1DMAReceiveInterrupt | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | clearSCI1DMATransmitInterrupt | clearSCI1DMATransmitInterrupt | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | setSCI2DMAReceiveInterrupt | setSCI2DMAReceiveInterrupt | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | setSCI2DMATransmitInterrupt | setSCI2DMATransmitInterrupt | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | clearSCI2DMAReceiveInterrupt | clearSCI2DMAReceiveInterrupt | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | clearSCI2DMATransmitInterrupt | clearSCI2DMATransmitInterrupt | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | isSCI1DMATransmitInProgress | isSCI1DMATransmitInProgress_DMABusy | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | | isSCI1DMATransmitInProgress_NotBusy | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | | isSCI1DMATransmitInProgress_TransmitterBusy | 21 NOV 2019 2:27:02 PM | PASS 1 / 1 |
| | isSCI2DMATransmitInProgress | isSCI2DMATransmitInProgress_DMABusy | 21 NOV 2019 2:27:03 PM | PASS 1 / 1 |
| | | isSCI2DMATransmitInProgress_NotBusy | 21 NOV 2019 2:27:03 PM | PASS 1 / 1 |
| | | isSCI2DMATransmitInProgress_TransmitterBusy | 21 NOV 2019 2:27:03 PM | PASS 1 / 1 |
| | isCAN1TransmitInProgress | isCAN1TransmitInProgress_Ch1_8_Busy | 21 NOV 2019 2:27:03 PM | PASS 1 / 1 |
| | | isCAN1TransmitInProgress_Ch9_16_Busy | 21 NOV 2019 2:27:03 PM | PASS 1 / 1 |
| | | isCAN1TransmitInProgress_NotBusy | 21 NOV 2019 2:27:03 PM | PASS 1 / 1 |
| TOTALS | 11 | 17 | | PASS 17 / 17 |
Statement+MC/DC
| Unit | Subprogram | Complexity | Statements | Branches | Pairs |
| Comm | setSCI1DMAReceiveInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | setSCI1DMATransmitInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | clearSCI1DMAReceiveInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | clearSCI1DMATransmitInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | setSCI2DMAReceiveInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | setSCI2DMATransmitInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | clearSCI2DMAReceiveInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | clearSCI2DMATransmitInterrupt | 1 | 1 / 1 (100%) | 1 / 1 (100%) | |
| | isSCI1DMATransmitInProgress | 4 | 3 / 3 (100%) | 15 / 15 (100%) | 4 / 4 (100%) |
| | isSCI2DMATransmitInProgress | 4 | 3 / 3 (100%) | 15 / 15 (100%) | 4 / 4 (100%) |
| | isCAN1TransmitInProgress | 2 | 2 / 2 (100%) | 7 / 7 (100%) | 2 / 2 (100%) |
| TOTALS | 11 | 18 | 16 / 16 (100%) | 45 / 45 (100%) | 10 / 10 (100%) |
| GRAND TOTALS | 11 | 18 | 16 / 16 (100%) | 45 / 45 (100%) | 10 / 10 (100%) |