/**************************************************************************
*
* Copyright (c) 2021-2023 Diality Inc. - All Rights Reserved.
*
* THIS CODE MAY NOT BE COPIED OR REPRODUCED IN ANY FORM, IN PART OR IN
* WHOLE, WITHOUT THE EXPLICIT PERMISSION OF THE COPYRIGHT OWNER.
*
* @file    Voltages.h
*
* @author  (last)      Dara Navaei
* @date    (last)      07-Mar-2022
*
* @author  (original)  Sean Nash
* @date    (original)  15-Apr-2021
*
***************************************************************************/

#ifndef __VOLTAGES_H__
#define __VOLTAGES_H__

#include "HDCommon.h"

/**
 *  @defgroup Voltages Voltages
 *  @brief Voltages monitor module.  Monitors the various system voltages
 *  to ensure they are in expected range.
 *
 *  @addtogroup Voltages
 *  @{
 */

// ********** public definitions **********

#define MIN_24V_MEASURED_FOR_AC      5.0F                ///< Minimum voltage from 24V in order to say we have AC power.

/// Enumeration of voltages monitored by this module.
typedef enum Voltages
{
    MONITORED_LINE_1_2V = 0,                ///< Processor 1.2V
    MONITORED_LINE_FIRST_VOLTAGE = MONITORED_LINE_1_2V, ///< First voltage in list
    MONITORED_LINE_3_3V,                    ///< Logic voltage (3.3V)
    MONITORED_LINE_5V_LOGIC,                ///< Logic voltage (5V)
    MONITORED_LINE_5V_SENSORS,              ///< Sensors voltage (5V)
    MONITORED_LINE_24V,                     ///< Actuators voltage (24V)
    MONITORED_LINE_24V_REGEN,               ///< Actuators regen voltage (24V)
    MONITORED_LINE_FPGA_REF_V,              ///< FPGA ADC reference voltage (1V)
    MONITORED_LINE_PBA_REF_V,               ///< PBA ADC reference voltage (3V)
    MONITORED_LINE_FPGA_VCC_V,              ///< FPGA input voltage (3V)
    MONITORED_LINE_FPGA_AUX_V,              ///< FPGA aux. voltage (3V)
    MONITORED_LINE_FPGA_PVN_V,              ///< FPGA pvn voltage (1V)
    NUM_OF_MONITORED_LINES                  ///< Number of monitored voltages
} MONITORED_VOLTAGES_T;

/// Payload record structure for the voltages data message.
typedef struct
{
    F32 adc1_2VProc;                                    ///< Internal ADC channel for 1.2V to processor
    F32 adc3_3V;                                        ///< Internal ADC channel for 3.3V
    F32 adc5VLogic;                                     ///< Internal ADC channel for 5V to logic
    F32 adc5VSensors;                                   ///< Internal ADC channel for 5V to sensors
    F32 adc24V;                                         ///< Internal ADC channel for 24V to actuators
    F32 adc24VRegen;                                    ///< Internal ADC channel for 24V regen (diode drop) to actuators
    F32 adcFpgaAdcRef;                                  ///< Internal ADC channel for FPGA ADC reference voltage
    F32 adcPbaRef;                                      ///< Internal ADC channel for reference voltage to PBA ADC channel)
    F32 fpgaVcc;                                        ///< FPGA source voltage
    F32 fpgaVaux;                                       ///< FPGA aux. voltage
    F32 fpgaVpvn;                                       ///< FPGA pvn voltage
} VOLTAGES_DATA_PAYLOAD_T;

// ********** public function prototypes **********

void initVoltagesMonitor( void );
void execVoltagesMonitor( void );

F32 getMonitoredLineLevel( MONITORED_VOLTAGES_T signal );

BOOL testSetVoltagesDataPublishIntervalOverride( U32 value );
BOOL testResetVoltagesDataPublishIntervalOverride( void );
BOOL testSetLineLevelOverride( U32 signal, F32 value );
BOOL testResetLineLevelOverride( U32 signal );

/**@}*/

#endif