/*
 * Interrupts.c
 *
 *  Created on: Aug 1, 2024
 *      Author: fw
 */

#include "can.h"
#include "rti.h"
#include "sci.h"
#include "sys_dma.h"

#include "BLCommon.h"
#include "CommBuffers.h"
#include "FPGA.h"
#include "TaskGeneral.h"
#include "TaskPriority.h"
#include "TaskTimer.h"

static BOOL sci2FEOEError;                                      ///< FPGA serial frame or overrun flag;


void initInterrupts( void )
{
    sci2FEOEError = FALSE;
}


void rtiNotification( uint32 notification )
{
    switch ( notification )
    {
        case rtiNOTIFICATION_COMPARE0:
            taskTimer();
            break;

        case rtiNOTIFICATION_COMPARE1:
            taskPriority();
            break;

        case rtiNOTIFICATION_COMPARE3:
            taskGeneral();
            break;

        default:
            // Do nothing at the moment.
            // NOTE: rtiNOTIFICATION_COMPARE2 is not included right now
            break;
    }
}

void canMessageNotification( canBASE_t *node, uint32 messageBox )
{
    if ( node == canREG1 )
    {
        handleCANMsgInterrupt( (SW_UPDATE_CAN_MAIL_BOX_T)messageBox );
    }
}

void sciNotification( sciBASE_t *sci, uint32 flags )
{
#ifndef _VECTORCAST_
    // Cannot set the pointers to be equal in VectorCAST. Can define pointers but the user does not have any control on the address of it
    if ( sci == scilinREG )
#endif
    {
        if ( ( flags & SCI_FE_INT ) != 0 )
        {
            sci2FEOEError = TRUE;
            scilinREG->FLR |= SCI_FE_INT;
        }

        if ( ( flags & SCI_OE_INT ) != 0 )
        {
            sci2FEOEError = TRUE;
            scilinREG->FLR |= SCI_OE_INT;
        }
    }
}

void dmaGroupANotification( dmaInterrupt_t inttype, uint32 channel )
{
    if ( inttype == BTC )  // Block transfer completed interrupt
    {
        switch ( channel )
        {
            case DMA_CH0:  // FPGA receive channel
                clearSCI2DMAReceiveInterrupt();
                signalFPGAReceiptCompleted();
                break;

            case DMA_CH2:  // FPGA transmit channel
                //clearSCI2DMATransmitInterrupt();
                //signalFPGATransmitCompleted();
                break;

            default:
                // Do nothing
                break;
        }
    }
}