Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -r24b4c7f4560296765373099ee83597baddc2cf94 -r35f83d1a4092527372605fcff7df1f7942e32fc7
--- firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 24b4c7f4560296765373099ee83597baddc2cf94)
+++ firmware/App/Services/FPGA.c	(.../FPGA.c)	(revision 35f83d1a4092527372605fcff7df1f7942e32fc7)
@@ -161,6 +161,7 @@
     U16 fpgaCheckIDStatus;                                              ///< FPGA check ID status.
     U16 fpgaEraseStatus;                                                ///< FPGA erase status.
     U16 fpgaProgramImageStatus;                                         ///< FPGA program image status.
+    U16 fpgaVerifyImageStatus;                                          ///< FPGA verify image status.
     U16 fpgaReadyForDataStatus;                                         ///< FPGA ready for data status.
     FPGA_UPDATE_STAGE_T fpgaUpdateStage;                                ///< FPGA update stage.
     U32 fpgaUpdateCmdStartTimeMS;                                       ///< FPGA update related command time in milliseconds.
@@ -208,6 +209,7 @@
 static const U32 FPGA_FLASH_INIT_STATUS               = ( 1 << 8 );     ///< FPGA flash initialize status bit value.
 static const U32 FPGA_FLASH_ERASE_STATUS              = ( 1 << 11 );    ///< FPGA flash erase status bit value.
 static const U32 FPGA_FLASH_PROG_IMAGE_STATUS         = ( 1 << 12 );    ///< FPGA flash program image ok status bit value.
+static const U32 FPGA_FLASH_VERIFY_IMAGE_STATUS       = ( 1 << 13 );    ///< FPGA verify program image ok status bit value.
 static const U32 FPGA_FLASH_READY_FOR_UPDATE_STATUS   = ( 1 << 15 );    ///< FPGA flash ready for update status bit value.
 
 /// FPGA jobs specifications.
@@ -325,7 +327,7 @@
             break;
     }
 
-    //publishDataTemp();
+    publishDataTemp();
 }
 
 /*********************************************************************//**
@@ -598,6 +600,7 @@
     fpgaFlashStatus.fpgaInitStatus              = fpgaReadRegsStatus.flashStatus & FPGA_FLASH_INIT_STATUS;
     fpgaFlashStatus.fpgaEraseStatus             = fpgaReadRegsStatus.flashStatus & FPGA_FLASH_ERASE_STATUS;
     fpgaFlashStatus.fpgaProgramImageStatus      = fpgaReadRegsStatus.flashStatus & FPGA_FLASH_PROG_IMAGE_STATUS;
+    fpgaFlashStatus.fpgaVerifyImageStatus       = fpgaReadRegsStatus.flashStatus & FPGA_FLASH_VERIFY_IMAGE_STATUS;
     fpgaFlashStatus.fpgaReadyForDataStatus      = fpgaReadRegsStatus.flashStatus & FPGA_FLASH_READY_FOR_UPDATE_STATUS;
 }
 
@@ -646,7 +649,8 @@
  *************************************************************************/
 static void processFPGAPrepareForSelfConfigureStatus( void )
 {
-    if ( TRUE == didTimeout( fpgaFlashStatus.fpgaUpdateCmdStartTimeMS, FPGA_PRE_SELF_CONFIG_TIMEOUT_MS ) )
+    // Check the program OK and verify OK bits once the program has finished and prior to self configuring command
+    if ( ( FPGA_FLASH_PROG_IMAGE_STATUS == fpgaFlashStatus.fpgaProgramImageStatus ) && ( FPGA_FLASH_VERIFY_IMAGE_STATUS == fpgaFlashStatus.fpgaVerifyImageStatus ) )
     {
         if ( FALSE == isQueueFull() )
         {
@@ -655,6 +659,12 @@
             enqueue( FPGA_SELF_CONFIGURE );
         }
     }
+
+    if ( TRUE == didTimeout( fpgaFlashStatus.fpgaUpdateCmdStartTimeMS, FPGA_PRE_SELF_CONFIG_TIMEOUT_MS ) )
+    {
+        // Timed out to check the status bits, send a NACK
+        sendFPGAAckNackStatus( NACK, FALSE );
+    }
 }
 
 /*********************************************************************//**
@@ -670,7 +680,7 @@
     ACK_NACK_STATUS_T ackStatus = NACK;
     BOOL status                 = FALSE;
 
-    // TODO once FPGA is updated check bits 12 and 13.
+    // After self configuring the FPGA, the FPGA is unresponsive for a short while but then the status bits should not be 0 once the FPGA is restarted
     if ( fpgaFlashStatus.fpgaInitStatus != 0 )
     {
         fpgaFlashStatus.fpgaUpdateStage = FPGA_UPDATE_STAGE_UPDATE_COMPLETE;