Index: firmware/App/Services/FPGA.c =================================================================== diff -u -r2823873d5790228595fb991e52e78e2fd0d5987c -rb887b4a2796de3b26be07619809f8f4146955867 --- firmware/App/Services/FPGA.c (.../FPGA.c) (revision 2823873d5790228595fb991e52e78e2fd0d5987c) +++ firmware/App/Services/FPGA.c (.../FPGA.c) (revision b887b4a2796de3b26be07619809f8f4146955867) @@ -197,10 +197,6 @@ static U08 fpgaDataToWriteBuffer[ SW_UPDATE_FLASH_BUFFER_SIZE ]; ///< FPGA data to write to FPGA flash buffer. static U32 fpgaDataLenToWrite; ///< FPGA data length to write to FPGA. -static U08 tempPrevJob; -static U16 tempPrevFlash; -static U16 tempPrevFIFO; - static const U08 FPGA_RESET_FLASH_CMD = 0x01; ///< FPGA reset flash command. static const U08 FPGA_ERASE_FIFO_CMD = 0x08; ///< FPGA erase FIFO command. static const U08 FPGA_ENABLE_FLASH_CMD = 0x00; ///< FPGA enable flash command. @@ -327,7 +323,7 @@ break; } - publishDataTemp(); + //publishDataTemp(); } /*********************************************************************//** @@ -360,23 +356,38 @@ *************************************************************************/ BOOL isFPGAIDValid( void ) { - // TODO do we still need to check the FPGA ID? + BOOL status = FALSE; //TRUE; + + // TODO the FPGA ID is not checked for now so it is assumed that FPGA is valid //BOOL status = ( STACK_FPGA_ID[ BL_STACK_ID ] == fpgaHeader.fpgaId ? TRUE : FALSE ); - BOOL status = FALSE; + return status; +} +/*********************************************************************//** + * @brief + * The isFPGASelfConfigureInProgress function returns the status of FPGA self + * configure. TRUE if the self configure is in progress otherwise, FALSE. + * @details \b Inputs: fpgaFlashStatus + * @details \b Outputs: none + * @return TRUE if flash is in progress otherwise, FALSE + *************************************************************************/ +BOOL isFPGASelfConfigureInProgress( void ) +{ + BOOL status = ( FPGA_UPDATE_STAGE_SELF_CONFIGURE == fpgaFlashStatus.fpgaUpdateStage ? TRUE : FALSE ); + return status; } /*********************************************************************//** * @brief - * The isFPGAFlashComplete function returns the status of FPGA flash. So + * The isFPGAFlashSuccessful function returns the status of FPGA flash. So * TRUE if the flash is complete, otherwise, FALSE. * @details \b Inputs: fpgaFlashStatus * @details \b Outputs: none - * @return TRUE if flash is complete otherwise, FALSE + * @return TRUE if flash is successful otherwise, FALSE *************************************************************************/ -BOOL isFPGAFlashComplete( void ) +BOOL isFPGAFlashSuccessful( void ) { BOOL status = ( FPGA_UPDATE_STAGE_UPDATE_COMPLETE == fpgaFlashStatus.fpgaUpdateStage ? TRUE : FALSE ); @@ -430,7 +441,6 @@ status = TRUE; memset( &fpgaDataToWriteBuffer, 0x0, SW_UPDATE_FLASH_BUFFER_SIZE ); memcpy( &fpgaDataToWriteBuffer, data, len ); - enqueue( FPGA_FLASH_WRITE_DATA ); } @@ -897,25 +907,16 @@ static void publishDataTemp( void ) { - // TODO test code remove - //if ( ( tempPrevJob != fpgaJobsQStatus.fpgaCurrentJob ) || ( tempPrevFlash != fpgaReadRegsStatus.flashStatus ) || ( tempPrevFIFO != fpgaFlashStatus.fpgaRemainingFIFOCountBytes ) ) - { - U08 data[8]; - data[0] = GET_MSB_OF_WORD( getCurrentUpdateMessageID() ); - data[1] = GET_LSB_OF_WORD( getCurrentUpdateMessageID() ); - data[2] = GET_MSB_OF_WORD( fpgaReadRegsStatus.fifoCount ); - data[3] = GET_LSB_OF_WORD( fpgaReadRegsStatus.fifoCount ); - data[4] = GET_MSB_OF_WORD( fpgaReadRegsStatus.flashStatus ); - data[5] = GET_LSB_OF_WORD( fpgaReadRegsStatus.flashStatus ); - data[6] = fpgaJobsQStatus.fpgaCurrentJob; - data[7] = (U08)fpgaState; - broadcastDataTestRemove(data); - - tempPrevJob = fpgaJobsQStatus.fpgaCurrentJob; - tempPrevFlash = fpgaReadRegsStatus.flashStatus; - tempPrevFIFO = fpgaFlashStatus.fpgaRemainingFIFOCountBytes; - } - // TODO test code remove + U08 data[8]; + data[0] = GET_MSB_OF_WORD( getCurrentUpdateMessageID() ); + data[1] = GET_LSB_OF_WORD( getCurrentUpdateMessageID() ); + data[2] = GET_MSB_OF_WORD( fpgaReadRegsStatus.fifoCount ); + data[3] = GET_LSB_OF_WORD( fpgaReadRegsStatus.fifoCount ); + data[4] = GET_MSB_OF_WORD( fpgaReadRegsStatus.flashStatus ); + data[5] = GET_LSB_OF_WORD( fpgaReadRegsStatus.flashStatus ); + data[6] = fpgaJobsQStatus.fpgaCurrentJob; + data[7] = (U08)fpgaState; + broadcastDataTestRemove(data); } /*********************************************************************//** @@ -1010,24 +1011,6 @@ break; } - - //if ( FPGA_FLASH_WRITE_DATA == fpgaJobsQStatus.fpgaCurrentJob ) - //{ - // // Set the write length from the buffer length provided - // jobSize = (U16)fpgaDataLenToWrite; - //} - // - //if ( FPGA_SELF_CONFIGURE == fpgaJobsQStatus.fpgaCurrentJob ) - //{ - // // TODO remove? - // memset( &fpgaReadResponseBuffer, 0x0, FPGA_READ_RSP_BUFFER_LEN ); - // memcpy( &fpgaReadRegsStatus, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], JOBS_SPECS[ FPGA_READ_MULTI_BOOT_STATUS ].fpgaJobSize ); - // processFPGAFlashRegistersRead(); - // - // // Once self configure is sent the FPGA will be unresponsive so there will be no ack back - // state = FPGA_IDLE_STATE; - //} - firstCRCIndex = FPGA_WRITE_CMD_HDR_LEN + jobSize; secondCRCIndex = FPGA_WRITE_CMD_HDR_LEN + jobSize + 1;