Index: firmware/App/Services/Interrupts.c =================================================================== diff -u -r9af6fc3e5afc442a877bd5e23ecfa6872a3ad5a4 -rf100557efc2f7916054a63bbafb187d8017914d0 --- firmware/App/Services/Interrupts.c (.../Interrupts.c) (revision 9af6fc3e5afc442a877bd5e23ecfa6872a3ad5a4) +++ firmware/App/Services/Interrupts.c (.../Interrupts.c) (revision f100557efc2f7916054a63bbafb187d8017914d0) @@ -12,14 +12,17 @@ #include "BLCommon.h" #include "CommBuffers.h" +#include "FPGA.h" #include "TaskGeneral.h" #include "TaskPriority.h" #include "TaskTimer.h" +static BOOL sci2FEOEError; ///< FPGA serial frame or overrun flag; + void initInterrupts( void ) { - // TODO fill up + sci2FEOEError = FALSE; } @@ -53,3 +56,49 @@ handleCANMsgInterrupt( (SW_UPDATE_CAN_MAIL_BOX_T)messageBox ); } } + +void sciNotification( sciBASE_t *sci, uint32 flags ) +{ +#ifndef _VECTORCAST_ + // Cannot set the pointers to be equal in VectorCAST. Can define pointers but the user does not have any control on the address of it + if ( sci == scilinREG ) +#endif + { + if ( ( flags & SCI_FE_INT ) != 0 ) + { + sci2FEOEError = TRUE; + scilinREG->FLR |= SCI_FE_INT; + } + + if ( ( flags & SCI_OE_INT ) != 0 ) + { + sci2FEOEError = TRUE; + scilinREG->FLR |= SCI_OE_INT; + } + } +} + +void dmaGroupANotification( dmaInterrupt_t inttype, uint32 channel ) +{ + if ( inttype == BTC ) // Block transfer completed interrupt + { + switch ( channel ) + { + case DMA_CH0: // FPGA receive channel + clearSCI2DMAReceiveInterrupt(); + signalFPGAReceiptCompleted(); + break; + + case DMA_CH2: // FPGA transmit channel + //clearSCI2DMATransmitInterrupt(); + //signalFPGATransmitCompleted(); + break; + + default: + // Do nothing + break; + } + } +} + +