Index: firmware/include/sci.h
===================================================================
diff -u -r792764062d7b7826af10e030277f18379af4fcd1 -rabb9687e52d9db5df1abe7626ba04a6d431ba823
--- firmware/include/sci.h	(.../sci.h)	(revision 792764062d7b7826af10e030277f18379af4fcd1)
+++ firmware/include/sci.h	(.../sci.h)	(revision abb9687e52d9db5df1abe7626ba04a6d431ba823)
@@ -115,7 +115,7 @@
 /* Configuration registers initial value for SCI*/
 #define SCI_GCR0_CONFIGVALUE       0x00000001U   
 #define SCI_GCR1_CONFIGVALUE       ((uint32)((uint32)1U << 5U) \
-                                   |(uint32)((uint32)(2U-1U) << 4U) \
+                                   |(uint32)((uint32)(1U-1U) << 4U) \
                                    |(uint32)((uint32)0U << 3U) \
                                    |(uint32)((uint32)0U << 2U) \
                                    |(uint32)((uint32)1U << 1U) \
@@ -130,24 +130,58 @@
                                    |(uint32)((uint32)0U << 1U) \
                                    |(uint32)((uint32)0U << 0U))
                                    
-#define SCI_SETINT_CONFIGVALUE     ((uint32)((uint32)0U << 26U) \
-                                   |(uint32)((uint32)0U << 25U) \
+#define SCI_SETINT_CONFIGVALUE     ((uint32)((uint32)1U << 26U) \
+                                   |(uint32)((uint32)1U << 25U) \
                                    |(uint32)((uint32)0U << 24U) \
                                    |(uint32)((uint32)0U << 9U) \
                                    |(uint32)((uint32)0U << 1U) \
                                    |(uint32)((uint32)0U << 0U))
                                    
 #define SCI_FORMAT_CONFIGVALUE     (8U - 1U)
-#define SCI_BRS_CONFIGVALUE        (715U)
+#define SCI_BRS_CONFIGVALUE        (55U)
 #define SCI_PIO0_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)1U << 1U))
-#define SCI_PIO1_CONFIGVALUE       ((uint32)((uint32)0U << 2U ) | (uint32)((uint32)0U << 1U))
-#define SCI_PIO6_CONFIGVALUE       ((uint32)((uint32)0U << 2U ) | (uint32)((uint32)0U << 1U))
+#define SCI_PIO1_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)0U << 1U))
+#define SCI_PIO6_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)0U << 1U))
 #define SCI_PIO7_CONFIGVALUE       ((uint32)((uint32)0U << 2U ) | (uint32)((uint32)0U << 1U))
 #define SCI_PIO8_CONFIGVALUE       ((uint32)((uint32)1U << 2U ) | (uint32)((uint32)1U << 1U))
  
 
 
+/* Configuration registers initial value for SCI*/
+#define SCILIN_GCR0_CONFIGVALUE       0x00000001U   
+#define SCILIN_GCR1_CONFIGVALUE       ((uint32)((uint32)1U << 5U) \
+                                      |(uint32)((uint32)(1U-1U) << 4U) \
+                                      |(uint32)((uint32)0U << 3U) \
+                                      |(uint32)((uint32)0U << 2U) \
+                                      |(uint32)((uint32)1U << 1U) \
+                                      |(uint32)((uint32)0U << 2U) \
+                                      |(uint32)(0x03000080U))
+									  
+#define SCILIN_SETINTLVL_CONFIGVALUE  ((uint32)((uint32)0U << 26U) \
+                                      |(uint32)((uint32)0U << 25U) \
+                                      |(uint32)((uint32)0U << 24U) \
+                                      |(uint32)((uint32)0U << 9U) \
+                                      |(uint32)((uint32)0U << 8U) \
+                                      |(uint32)((uint32)0U << 1U) \
+                                      |(uint32)((uint32)0U))
 
+#define SCILIN_SETINT_CONFIGVALUE     ((uint32)((uint32)0U << 26U) \
+                                      |(uint32)((uint32)0U << 25U) \
+                                      |(uint32)((uint32)0U << 24U) \
+                                      |(uint32)((uint32)0U << 9U) \
+                                      |(uint32)((uint32)0U << 1U) \
+                                      |(uint32)((uint32)0U << 0U))
+
+#define SCILIN_FORMAT_CONFIGVALUE     (8U - 1U)
+#define SCILIN_BRS_CONFIGVALUE        (6U)
+#define SCILIN_PIO0_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 1U))
+#define SCILIN_PIO1_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)0U << 1U))
+#define SCILIN_PIO6_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)0U << 1U))
+#define SCILIN_PIO7_CONFIGVALUE       ((uint32)((uint32)0U << 2U) | (uint32)((uint32)0U << 1U))
+#define SCILIN_PIO8_CONFIGVALUE       ((uint32)((uint32)1U << 2U) | (uint32)((uint32)1U << 1U))
+ 
+
+
 /** 
  *  @defgroup SCI SCI
  *  @brief Serial Communication Interface Module.
@@ -182,6 +216,7 @@
 void sciEnterResetState(sciBASE_t *sci);
 void sciExitResetState(sciBASE_t *sci);
 void sciGetConfigValue(sci_config_reg_t *config_reg, config_value_type_t type);
+void scilinGetConfigValue(sci_config_reg_t *config_reg, config_value_type_t type);
 /** @fn void sciNotification(sciBASE_t *sci, uint32 flags)
 *   @brief Interrupt callback
 *   @param[in] sci   - sci module base address