Index: firmware/source/adc.c =================================================================== diff -u -r792764062d7b7826af10e030277f18379af4fcd1 -rabb9687e52d9db5df1abe7626ba04a6d431ba823 --- firmware/source/adc.c (.../adc.c) (revision 792764062d7b7826af10e030277f18379af4fcd1) +++ firmware/source/adc.c (.../adc.c) (revision abb9687e52d9db5df1abe7626ba04a6d431ba823) @@ -83,10 +83,10 @@ adcREG1->OPMODECR |= 0x80000000U; /** - Setup prescaler */ - adcREG1->CLOCKCR = 10U; + adcREG1->CLOCKCR = 25U; /** - Setup memory boundaries */ - adcREG1->BNDCR = (uint32)((uint32)8U << 16U) | (8U + 8U); + adcREG1->BNDCR = (uint32)((uint32)0U << 16U) | (0U + 10U); adcREG1->BNDEND = (adcREG1->BNDEND & 0xFFFF0000U) | (2U); /** - Setup event group conversion mode @@ -106,7 +106,7 @@ | (uint32)ADC1_EVENT; /** - Setup event group sample window */ - adcREG1->EVSAMP = 1U; + adcREG1->EVSAMP = 0U; /** - Setup event group sample discharge * - Setup discharge prescaler @@ -121,8 +121,8 @@ * - Enable/Disable continuous conversion */ adcREG1->GxMODECR[1U] = (uint32)ADC_12_BIT + | (uint32)0x00000020U | (uint32)0x00000000U - | (uint32)0x00000000U | (uint32)0x00000000U; /** - Setup group 1 hardware trigger @@ -133,7 +133,7 @@ | (uint32)ADC1_EVENT; /** - Setup group 1 sample window */ - adcREG1->G1SAMP = 1U; + adcREG1->G1SAMP = 0U; /** - Setup group 1 sample discharge * - Setup discharge prescaler @@ -160,7 +160,7 @@ | (uint32)ADC1_EVENT; /** - Setup group 2 sample window */ - adcREG1->G2SAMP = 1U; + adcREG1->G2SAMP = 0U; /** - Setup group 2 sample discharge * - Setup discharge prescaler @@ -197,135 +197,6 @@ adcREG1->PARCR = 0x00000005U; - - /** @b Initialize @b ADC2: */ - - /** - Reset ADC module */ - adcREG2->RSTCR = 1U; - adcREG2->RSTCR = 0U; - - /** - Enable 12-BIT ADC */ - adcREG2->OPMODECR |= 0x80000000U; - - /** - Setup prescaler */ - adcREG2->CLOCKCR = 10U; - - /** - Setup memory boundaries */ - adcREG2->BNDCR = (uint32)((uint32)8U << 16U) | (8U + 8U); - adcREG2->BNDEND = (adcREG2->BNDEND & 0xFFFF0000U) | (2U); - - /** - Setup event group conversion mode - * - Setup data format - * - Enable/Disable channel id in conversion result - * - Enable/Disable continuous conversion - */ - adcREG2->GxMODECR[0U] = (uint32)ADC_12_BIT - | (uint32)0x00000000U - | (uint32)0x00000000U; - - /** - Setup event group hardware trigger - * - Setup hardware trigger edge - * - Setup hardware trigger source - */ - adcREG2->EVSRC = (uint32)0x00000000U - | (uint32)ADC2_EVENT; - - /** - Setup event group sample window */ - adcREG2->EVSAMP = 1U; - - /** - Setup event group sample discharge - * - Setup discharge prescaler - * - Enable/Disable discharge - */ - adcREG2->EVSAMPDISEN = (uint32)((uint32)0U << 8U) - | (uint32)0x00000000U; - - /** - Setup group 1 conversion mode - * - Setup data format - * - Enable/Disable channel id in conversion result - * - Enable/Disable continuous conversion - */ - adcREG2->GxMODECR[1U] = (uint32)ADC_12_BIT - | (uint32)0x00000000U - | (uint32)0x00000000U - | (uint32)0x00000000U; - - /** - Setup group 1 hardware trigger - * - Setup hardware trigger edge - * - Setup hardware trigger source - */ - adcREG2->G1SRC = (uint32)0x00000000U - | (uint32)ADC2_EVENT; - - - /** - Setup group 1 sample window */ - adcREG2->G1SAMP = 1U; - - /** - Setup group 1 sample discharge - * - Setup discharge prescaler - * - Enable/Disable discharge - */ - adcREG2->G1SAMPDISEN = (uint32)((uint32)0U << 8U) - | (uint32)0x00000000U; - - /** - Setup group 2 conversion mode - * - Setup data format - * - Enable/Disable channel id in conversion result - * - Enable/Disable continuous conversion - */ - adcREG2->GxMODECR[2U] = (uint32)ADC_12_BIT - | (uint32)0x00000000U - | (uint32)0x00000000U - | (uint32)0x00000000U; - - /** - Setup group 2 hardware trigger - * - Setup hardware trigger edge - * - Setup hardware trigger source - */ - adcREG2->G2SRC = (uint32)0x00000000U - | (uint32)ADC2_EVENT; - - /** - Setup group 2 sample window */ - adcREG2->G2SAMP = 1U; - - /** - Setup group 2 sample discharge - * - Setup discharge prescaler - * - Enable/Disable discharge - */ - adcREG2->G2SAMPDISEN = (uint32)((uint32)0U << 8U) - | (uint32)0x00000000U; - - - /** - ADC2 EVT pin output value */ - adcREG2->EVTOUT = 0U; - - /** - ADC2 EVT pin direction */ - adcREG2->EVTDIR = 0U; - - /** - ADC2 EVT pin open drain enable */ - adcREG2->EVTPDR = 0U; - - /** - ADC2 EVT pin pullup / pulldown selection */ - adcREG2->EVTPSEL = 1U; - - /** - ADC2 EVT pin pullup / pulldown enable*/ - adcREG2->EVTDIS = 0U; - - /** - Enable ADC module */ - adcREG2->OPMODECR |= 0x80140001U; - - /** - Wait for buffer initialization complete */ - /*SAFETYMCUSW 28 D MR:NA "Hardware status bit read check" */ - while (((adcREG2->BNDEND & 0xFFFF0000U) >> 16U) != 0U) - { - } /* Wait */ - - /** - Setup parity */ - adcREG2->PARCR = 0x00000005U; - - /** @note This function has to be called before the driver can be used.\n - * This function has to be executed in privileged mode.\n - */ /* USER CODE BEGIN (4) */ /* USER CODE END */ } @@ -361,10 +232,30 @@ 0x00000000U | 0x00000000U | 0x00000000U, + 0x00000001U | + 0x00000002U | + 0x00000004U | + 0x00000008U | + 0x00000010U | + 0x00000020U | + 0x00000040U | + 0x00000080U | + 0x00000100U | 0x00000000U | + 0x00000400U | + 0x00000800U | + 0x00001000U | + 0x00002000U | + 0x00004000U | 0x00000000U | + 0x00010000U | + 0x00020000U | + 0x00040000U | + 0x00080000U | 0x00000000U | 0x00000000U | + 0x00400000U | + 0x00800000U, 0x00000000U | 0x00000000U | 0x00000000U | @@ -384,30 +275,10 @@ 0x00000000U | 0x00000000U | 0x00000000U | - 0x00000000U, 0x00000000U | 0x00000000U | 0x00000000U | 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | 0x00000000U}, {0x00000000U | 0x00000000U | @@ -462,11 +333,11 @@ /** - s_adcFiFoSize is used as constant table for channel selection */ static const uint32 s_adcFiFoSize[2U][3U] = { + {0U, + 20U, + 32U}, {16U, 16U, - 16U}, - {16U, - 16U, 16U} }; @@ -1107,68 +978,6 @@ } } -/** @fn void adc2GetConfigValue(adc_config_reg_t *config_reg, config_value_type_t type) -* @brief Get the initial or current values of the configuration registers -* -* @param[in] *config_reg: pointer to the struct to which the initial or current -* value of the configuration registers need to be stored -* @param[in] type: whether initial or current value of the configuration registers need to be stored -* - InitialValue: initial value of the configuration registers will be stored -* in the struct pointed by config_reg -* - CurrentValue: initial value of the configuration registers will be stored -* in the struct pointed by config_reg -* -* This function will copy the initial or current value (depending on the parameter 'type') -* of the configuration registers to the struct pointed by config_reg -* -*/ -/* SourceId : ADC_SourceId_013 */ -/* DesignId : ADC_DesignId_012 */ -/* Requirements : HL_SR203 */ -void adc2GetConfigValue(adc_config_reg_t *config_reg, config_value_type_t type) -{ - if (type == InitialValue) - { - config_reg->CONFIG_OPMODECR = ADC2_OPMODECR_CONFIGVALUE; - config_reg->CONFIG_CLOCKCR = ADC2_CLOCKCR_CONFIGVALUE; - config_reg->CONFIG_GxMODECR[0U] = ADC2_G0MODECR_CONFIGVALUE; - config_reg->CONFIG_GxMODECR[1U] = ADC2_G1MODECR_CONFIGVALUE; - config_reg->CONFIG_GxMODECR[2U] = ADC2_G2MODECR_CONFIGVALUE; - config_reg->CONFIG_G0SRC = ADC2_G0SRC_CONFIGVALUE; - config_reg->CONFIG_G1SRC = ADC2_G1SRC_CONFIGVALUE; - config_reg->CONFIG_G2SRC = ADC2_G2SRC_CONFIGVALUE; - config_reg->CONFIG_BNDCR = ADC2_BNDCR_CONFIGVALUE; - config_reg->CONFIG_BNDEND = ADC2_BNDEND_CONFIGVALUE; - config_reg->CONFIG_G0SAMP = ADC2_G0SAMP_CONFIGVALUE; - config_reg->CONFIG_G1SAMP = ADC2_G1SAMP_CONFIGVALUE; - config_reg->CONFIG_G2SAMP = ADC2_G2SAMP_CONFIGVALUE; - config_reg->CONFIG_G0SAMPDISEN = ADC2_G0SAMPDISEN_CONFIGVALUE; - config_reg->CONFIG_G1SAMPDISEN = ADC2_G1SAMPDISEN_CONFIGVALUE; - config_reg->CONFIG_G2SAMPDISEN = ADC2_G2SAMPDISEN_CONFIGVALUE; - config_reg->CONFIG_PARCR = ADC2_PARCR_CONFIGVALUE; - } - else - { - /*SAFETYMCUSW 134 S MR:12.2 "LDRA Tool issue" */ - config_reg->CONFIG_OPMODECR = adcREG2->OPMODECR; - config_reg->CONFIG_CLOCKCR = adcREG2->CLOCKCR; - config_reg->CONFIG_GxMODECR[0U] = adcREG2->GxMODECR[0U]; - config_reg->CONFIG_GxMODECR[1U] = adcREG2->GxMODECR[1U]; - config_reg->CONFIG_GxMODECR[2U] = adcREG2->GxMODECR[2U]; - config_reg->CONFIG_G0SRC = adcREG2->EVSRC; - config_reg->CONFIG_G1SRC = adcREG2->G1SRC; - config_reg->CONFIG_G2SRC = adcREG2->G2SRC; - config_reg->CONFIG_BNDCR = adcREG2->BNDCR; - config_reg->CONFIG_BNDEND = adcREG2->BNDEND; - config_reg->CONFIG_G0SAMP = adcREG2->EVSAMP; - config_reg->CONFIG_G1SAMP = adcREG2->G1SAMP; - config_reg->CONFIG_G2SAMP = adcREG2->G2SAMP; - config_reg->CONFIG_G0SAMPDISEN = adcREG2->EVSAMPDISEN; - config_reg->CONFIG_G1SAMPDISEN = adcREG2->G1SAMPDISEN; - config_reg->CONFIG_G2SAMPDISEN = adcREG2->G2SAMPDISEN; - config_reg->CONFIG_PARCR = adcREG2->PARCR; - } -} /* USER CODE BEGIN (35) */ /* USER CODE END */ @@ -1178,5 +987,3 @@ - -