Index: firmware/source/can.c
===================================================================
diff -u -r5645305f9349c5c64be5560982bdf1abd5edb0fb -rab214e8ea52d8433b7cee58f5aaff49fc759310d
--- firmware/source/can.c	(.../can.c)	(revision 5645305f9349c5c64be5560982bdf1abd5edb0fb)
+++ firmware/source/can.c	(.../can.c)	(revision ab214e8ea52d8433b7cee58f5aaff49fc759310d)
@@ -120,6 +120,7 @@
                          | (uint32)0x00000010U
                          | (uint32)0x00000020U
                          | (uint32)0x00000040U
+                         | (uint32)0x00000080U
                          | (uint32)0x00000000U
                          | (uint32)0x00000000U
                          | (uint32)0x00000000U
@@ -143,7 +144,6 @@
                          | (uint32)0x00000000U
                          | (uint32)0x00000000U
                          | (uint32)0x00000000U
-                         | (uint32)0x00000000U
                          | (uint32)0x00000000U;
 
     canREG1->INTMUXx[1U] = (uint32)0x00000000U
@@ -297,6 +297,25 @@
     canREG1->IF2CMD  = (uint8) 0xF8U;
     canREG1->IF2NO   = 6U;
 
+    /** - Initialize message 7 
+    *     - Wait until IF1 is ready for use 
+    *     - Set message mask
+    *     - Set message control word
+    *     - Set message arbitration
+    *     - Set IF1 control byte
+    *     - Set IF1 message number
+    */
+    /*SAFETYMCUSW 28 D MR:NA <APPROVED> "Potentially infinite loop found - Hardware Status check for execution sequence" */
+    while ((canREG1->IF1STAT & 0x80U) ==0x80U)
+    { 
+    } /* Wait */
+
+    canREG1->IF1MSK  = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF1ARB  = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x607U & (uint32)0x000007FFU) << (uint32)18U);
+    canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U;
+    canREG1->IF1CMD  = (uint8) 0xF8U;
+    canREG1->IF1NO   = 7U;
+
     /** - Setup IF1 for data transmission 
     *     - Wait until IF1 is ready for use 
     *     - Set IF1 control byte