Index: firmware/source/i2c.c =================================================================== diff -u -r792764062d7b7826af10e030277f18379af4fcd1 -rabb9687e52d9db5df1abe7626ba04a6d431ba823 --- firmware/source/i2c.c (.../i2c.c) (revision 792764062d7b7826af10e030277f18379af4fcd1) +++ firmware/source/i2c.c (.../i2c.c) (revision abb9687e52d9db5df1abe7626ba04a6d431ba823) @@ -89,7 +89,7 @@ | (uint32)((uint32)1U <<10U) /* Master/Slave mode */ | (uint32)((uint32)I2C_TRANSMITTER) /* Transmitter/receiver */ | (uint32)((uint32)I2C_7BIT_AMODE) /* xpanded address */ - | (uint32)((uint32)0U << 7U) /* repeat mode */ + | (uint32)((uint32)1U << 7U) /* repeat mode */ | (uint32)((uint32)0U << 6U) /* digital loop back */ | (uint32)((uint32)0U << 4U) /* start byte - master only */ | (uint32)((uint32)0U << 3U) /* free data format */ @@ -109,11 +109,11 @@ i2cREG1->IMR = 0x00U; /** - set prescale */ - i2cREG1->PSC = 13U; + i2cREG1->PSC = 12U; /** - set clock rate */ - i2cREG1->CKH = 34U; - i2cREG1->CKL = 34U; + i2cREG1->CKH = 35U; + i2cREG1->CKL = 35U; /** - set i2c pins functional mode */ i2cREG1->PFNC = (0U); @@ -127,8 +127,8 @@ | (uint32)(0U); /* scl pin */ /** - set i2c pins open drain enable */ - i2cREG1->PDR = (uint32)((uint32)0U << 1U) /* sda pin */ - | (uint32)(0U); /* scl pin */ + i2cREG1->PDR = (uint32)((uint32)1U << 1U) /* sda pin */ + | (uint32)(1U); /* scl pin */ /** - set i2c pins pullup/pulldown enable */ i2cREG1->PDIS = (uint32)((uint32)0U << 1U) /* sda pin */ @@ -202,7 +202,7 @@ uint32 prescale; uint32 d; uint32 ck; - float64 vclk = 110.000F * 1000000.0F; + float64 vclk = 104.000F * 1000000.0F; float64 divider= 0.0F; uint32 temp = 0U;