Index: firmware/source/sys_link.cmd
===================================================================
diff -u -r850f8042a02fd17ee53b8db24bc2e3d17bbb9c7f -r24b4c7f4560296765373099ee83597baddc2cf94
--- firmware/source/sys_link.cmd	(.../sys_link.cmd)	(revision 850f8042a02fd17ee53b8db24bc2e3d17bbb9c7f)
+++ firmware/source/sys_link.cmd	(.../sys_link.cmd)	(revision 24b4c7f4560296765373099ee83597baddc2cf94)
@@ -47,6 +47,7 @@
 --retain="*(.intvecs)"
 
 /* USER CODE BEGIN (1) */
+#if 0
 /* USER CODE END */
 
 /*----------------------------------------------------------------------------*/
@@ -60,6 +61,15 @@
     RAM     (RW) : origin=0x08005800 length=0x0002a800
 
 /* USER CODE BEGIN (2) */
+#endif
+MEMORY
+{
+    VECTORS (X)  : origin=0x00000000 length=0x00000020
+    CRCMEM  (RX) : origin=0x00000020 length=0x000001E0
+    FLASH0  (RX) : origin=0x00000200 length=0x0013FE00
+    STACKS  (RW) : origin=0x08000000 length=0x00005800
+    RAM     (RW) : origin=0x08005800 length=0x0002a800
+
 /* USER CODE END */
 }
 
@@ -72,6 +82,10 @@
                    parity_mask  = 0x0c       /* Set which ECC bits are Even and Odd parity */
                    mirroring    = F021       /* RM57Lx and TMS570LCx are build in F021 */
 }
+#if 0
+/* NOTE: the default section has been disabled to run crc check of the image
+   in the user defined section below.
+*/
 /* USER CODE END */
 
 /*----------------------------------------------------------------------------*/
@@ -90,6 +104,27 @@
     
 
 /* USER CODE BEGIN (4) */
+#endif
+/* Override Sections with CRCs here */
+SECTIONS
+{
+    .intvecs : {} > VECTORS, crc_table( _crc_table, algorithm=CRC32_C )
+    .text    : {} > FLASH0, crc_table( _crc_table, algorithm=CRC32_C )
+    .const   : {} > FLASH0, crc_table( _crc_table, algorithm=CRC32_C )
+    .cinit   : {} > FLASH0, crc_table( _crc_table, algorithm=CRC32_C )
+    .pinit   : {} > FLASH0
+    .bss     : {} > RAM
+    .data    : {} > RAM
+    .sysmem  : {} > RAM
+
+   flashAPI:
+   {
+     NVDataMgmt.obj (.text)
+     --library= F021_API_CortexR4_LE_L2FMC_V3D16_NDS.lib (.text)
+   } palign=8 load = FLASH0, run = RAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize)
+
+    .TI.crctab : {} > CRCMEM
+
 /* USER CODE END */
 }