Index: firmware/App/Common.h =================================================================== diff -u -rb887b4a2796de3b26be07619809f8f4146955867 -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/App/Common.h (.../Common.h) (revision b887b4a2796de3b26be07619809f8f4146955867) +++ firmware/App/Common.h (.../Common.h) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -20,7 +20,8 @@ #define CAN_MESSAGE_FRAME_SIZE_BYTES 8 ///< CAN message frame size in bytes. #define CAN_MESSAGE_FRAME_NIBBLE_BYTES 4 ///< CAN message frame nibble in bytes. #define FIRMWARE_START_ADDRESS 0x00010000 ///< Firmware start address. -#define FIRMWARE_CRC_TABLE_ADDRESS 0x10020 ///< The starting address of CRC table for firmware image. +#define FIRMWARE_CRC_TABLE_ADDRESS ( FIRMWARE_START_ADDRESS + 0x20 ) ///< The starting address of firmware CRC table. +#define BOOTLOADER_CRC_TABLE_ADDRESS 0x00020 ///< The starting address of bootloader CRC table. #define SW_UPDATE_FLASH_BUFFER_SIZE 512 ///< Software update flash buffer bytes. #define MASK_OFF_MSB 0x00FF ///< Bits to mask off the most significant byte of a 2-byte word. #define MASK_OFF_LSB 0xFF00 ///< Bits to mask off the least significant byte of a 2-byte word. Index: firmware/App/Modes/ModeStandby.c =================================================================== diff -u -rb887b4a2796de3b26be07619809f8f4146955867 -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/App/Modes/ModeStandby.c (.../ModeStandby.c) (revision b887b4a2796de3b26be07619809f8f4146955867) +++ firmware/App/Modes/ModeStandby.c (.../ModeStandby.c) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -167,13 +167,12 @@ BOOL isFPGAImageValid = FALSE; SW_UPDATE_CMD_T cmd = getSWUpdateCommandState(); - // TODO why a bad code passes the CRC? if ( TRUE == isFWCRCTableValid() ) { - isFirmwareImageValid = runFWIntegrityTest(); + isFirmwareImageValid = runFWIntegrityTest( (U32)FIRMWARE_CRC_TABLE_ADDRESS ); } - if ( TRUE == isFPGAIDValid() ) + //if ( TRUE == isFPGAIDValid() ) { isFPGAImageValid = TRUE; } @@ -234,7 +233,7 @@ break; case UPDATE_FIRMWARE: - status = runFWIntegrityTest(); + status = runFWIntegrityTest( (U32)FIRMWARE_CRC_TABLE_ADDRESS ); ackStatus = ( TRUE == status ? ACK : NACK ); break; Index: firmware/App/Services/Download.c =================================================================== diff -u -rb887b4a2796de3b26be07619809f8f4146955867 -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/App/Services/Download.c (.../Download.c) (revision b887b4a2796de3b26be07619809f8f4146955867) +++ firmware/App/Services/Download.c (.../Download.c) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -59,12 +59,9 @@ static SW_UPDATE_RCV_STATUS_T SWUpdateRCVStatus; ///< Software update receive status. static SW_UPDATE_CMD_STATUS_T SWUpdateCmdStatus; ///< Software update command status. -static U32 fpgaPayloadLengthBytes; ///< FPGA payload length in bytes. static SW_UPDATE_SPECS_T SWUpdateSpecs; ///< Software update specifications. static U32 SWUpdateLastBroadcastTimeMS; ///< Software update last broadcast time stamp in milliseconds. -static U32 REMOVETHEVAR = 0; // TODO remove - // ********** private function prototypes ********** static void handleIncomingCmdMessage( SW_UPDATE_CAN_MAIL_BOX_T mailBox ); @@ -442,11 +439,8 @@ ACK_NACK_STATUS_T ackStatus = NACK; BOOL status = FALSE; - fpgaPayloadLengthBytes = SWUpdateRCVStatus.updatePayloadLen; - REMOVETHEVAR += fpgaPayloadLengthBytes; + status = signalFPGAToWriteToFlash( SWUpdateRCVStatus.SWUpdateBuffer, SWUpdateRCVStatus.updatePayloadLen ); - status = signalFPGAToWriteToFlash( SWUpdateRCVStatus.SWUpdateBuffer, fpgaPayloadLengthBytes ); - if ( TRUE == status ) { // The update payload has been enqueued successfully, clear the raw buffer but keep the receive buffer since the enqueue Index: firmware/App/Services/FPGA.c =================================================================== diff -u -rb887b4a2796de3b26be07619809f8f4146955867 -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/App/Services/FPGA.c (.../FPGA.c) (revision b887b4a2796de3b26be07619809f8f4146955867) +++ firmware/App/Services/FPGA.c (.../FPGA.c) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -118,6 +118,7 @@ NUM_OF_FPGA_STATES ///< Number of FPGA states. } FPGA_STATE_T; +#pragma pack(push,1) /// FPGA queue job specification structure typedef struct { @@ -174,6 +175,7 @@ U08 fpgaRevMajor; ///< Reg 2. FPGA revision (major) being reported. U08 fpgaRevLab; ///< Reg 3. FPGA revision (lab) being reported. } FPGA_HEADER_T; // Read only on FPGA +#pragma pack(pop) // ********** private data ********** Index: firmware/App/Services/NVDataMgmt.c =================================================================== diff -u -rf6fd9dfd1a30412e237ff45ebee44854f0e2d4b2 -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/App/Services/NVDataMgmt.c (.../NVDataMgmt.c) (revision f6fd9dfd1a30412e237ff45ebee44854f0e2d4b2) +++ firmware/App/Services/NVDataMgmt.c (.../NVDataMgmt.c) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -193,12 +193,12 @@ { Fapi_issueAsyncCommandWithAddress( Fapi_EraseSector, (U32*)bank0Sectors[ i ].startAddress ); while( FAPI_CHECK_FSM_READY_BUSY == Fapi_Status_FsmBusy ); - while(FAPI_GET_FSM_STATUS != Fapi_Status_Success); + while( FAPI_GET_FSM_STATUS != Fapi_Status_Success ); status |= TRUE; } } - // TODO check the erased sectors + // TODO check the erased sectors? return status; } Index: firmware/App/Services/Utilities.c =================================================================== diff -u -r0c085209bea23f66011059a7c19796c1e4b246fa -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/App/Services/Utilities.c (.../Utilities.c) (revision 0c085209bea23f66011059a7c19796c1e4b246fa) +++ firmware/App/Services/Utilities.c (.../Utilities.c) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -15,6 +15,7 @@ #define INITIAL_CRC16_VAL 0xFFFF ///< Seed for 16-bit CRC function. #define SHIFT_24_BITS 24 ///< Number of bits to shift in order to shift 3 bytes. +#define MAX_CRC_CALC_DATA_SIZE 0x8000 ///< The maximum size of data for each CRC calculation. // ********** private data ********** @@ -101,14 +102,14 @@ * @details \b Outputs: none * @return TRUE if integrity test passed otherwise, FALSE *************************************************************************/ -BOOL runFWIntegrityTest( void ) +BOOL runFWIntegrityTest( U32 crcTableAddress ) { U32 remainingSize = 0; U32 currentRecord = 0; ///< Current CRC table record to check. U32 currentProcessedSize = 0; ///< Current data size processed for CRC calculation. U32 crcCalculated = 0; ///< The calculated CRC value. - CRC_TABLE const * const crcTablePtr = (CRC_TABLE *)FIRMWARE_CRC_TABLE_ADDRESS; + CRC_TABLE const * const crcTablePtr = (CRC_TABLE *)crcTableAddress; CRC_RECORD const * currentRecordPtr = &crcTablePtr->recs[ currentRecord ]; BOOL integrityStatus = TRUE; @@ -122,14 +123,14 @@ if ( remainingSize > MAX_CRC_CALC_DATA_SIZE ) { - crcCalculated = crc32( crcCalculated, (U08 *)( currentRecordPtr->addr + currentProcessedSize ), MAX_CRC_CALC_DATA_SIZE ); + crcCalculated = crc32( crcCalculated, (U08 *)( currentRecordPtr->addr + currentProcessedSize ), MAX_CRC_CALC_DATA_SIZE ); currentProcessedSize += MAX_CRC_CALC_DATA_SIZE; } else { - crcCalculated = crc32( crcCalculated, (U08 *)( currentRecordPtr->addr + currentProcessedSize ), remainingSize ); - integrityStatus &= ( ( (U32)currentRecordPtr->crc_value == crcCalculated ) ? TRUE : FALSE ); - crcCalculated = 0; + crcCalculated = crc32( crcCalculated, (U08 *)( currentRecordPtr->addr + currentProcessedSize ), remainingSize ); + integrityStatus &= ( ( (U32)currentRecordPtr->crc_value == crcCalculated ) ? TRUE : FALSE ); + crcCalculated = 0; currentProcessedSize = 0; currentRecord++; } Index: firmware/App/Services/Utilities.h =================================================================== diff -u -r0c085209bea23f66011059a7c19796c1e4b246fa -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/App/Services/Utilities.h (.../Utilities.h) (revision 0c085209bea23f66011059a7c19796c1e4b246fa) +++ firmware/App/Services/Utilities.h (.../Utilities.h) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -14,11 +14,9 @@ // ********** public definitions ********** -#define MAX_CRC_CALC_DATA_SIZE 0x8000 ///< The maximum size of data for each CRC calculation. - // ********** public function prototypes ********** -BOOL runFWIntegrityTest( void ); +BOOL runFWIntegrityTest( U32 crcTableAddress ); U32 crc32( U32 initialValue, U08 *address, U32 len ); Index: firmware/source/sys_link.cmd =================================================================== diff -u -r2823873d5790228595fb991e52e78e2fd0d5987c -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/source/sys_link.cmd (.../sys_link.cmd) (revision 2823873d5790228595fb991e52e78e2fd0d5987c) +++ firmware/source/sys_link.cmd (.../sys_link.cmd) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -47,6 +47,7 @@ --retain="*(.intvecs)" /* USER CODE BEGIN (1) */ +#if 0 /* USER CODE END */ /*----------------------------------------------------------------------------*/ @@ -60,6 +61,15 @@ RAM (RW) : origin=0x08005800 length=0x0002a800 /* USER CODE BEGIN (2) */ +#endif +MEMORY +{ + VECTORS (X) : origin=0x00000000 length=0x00000020 + CRCMEM (RX) : origin=0x00000020 length=0x000001E0 + FLASH0 (RX) : origin=0x00000200 length=0x0013FE00 + STACKS (RW) : origin=0x08000000 length=0x00005800 + RAM (RW) : origin=0x08005800 length=0x0002a800 + /* USER CODE END */ } @@ -107,13 +117,14 @@ .data : {} > RAM .sysmem : {} > RAM - //.TI.crctab : {} > CRCMEM // TODo uncomment - flashAPI: { NVDataMgmt.obj (.text) --library= F021_API_CortexR4_LE_L2FMC_V3D16_NDS.lib (.text) } palign=8 load = FLASH0, run = RAM, LOAD_START(apiLoadStart), RUN_START(apiRunStart), SIZE(apiLoadSize) + + .TI.crctab : {} > CRCMEM + /* USER CODE END */ } Index: firmware/source/sys_main.c =================================================================== diff -u -r2823873d5790228595fb991e52e78e2fd0d5987c -r24b4c7f4560296765373099ee83597baddc2cf94 --- firmware/source/sys_main.c (.../sys_main.c) (revision 2823873d5790228595fb991e52e78e2fd0d5987c) +++ firmware/source/sys_main.c (.../sys_main.c) (revision 24b4c7f4560296765373099ee83597baddc2cf94) @@ -117,6 +117,7 @@ *************************************************************************/ static void copyFlashAPI2RAM( void ) { + // For memcpy: https://dev.ti.com/tirex/explore/node?isTheia=false&node=A__ACETON0B5e6CHwUmKRRZkQ__C2000WARE__1kRFgrO__5.03.00.00 memcpy( &apiRunStart, &apiLoadStart, (U32)&apiLoadSize ); } @@ -168,6 +169,7 @@ rtiInit(); rtiEnableNotification( rtiNOTIFICATION_COMPARE0 | rtiNOTIFICATION_COMPARE1 | rtiNOTIFICATION_COMPARE3 ); rtiStartCounter( rtiCOUNTER_BLOCK0 ); + // NOTE: FIQ is not used in the bootloader. All the the tasks including the TaskTimer is on the IRQ. IRQ is disabled while flashing the firmwrae. // The general and priority tasks require IRQ enabled _enable_IRQ(); }