Index: firmware/.cproject
===================================================================
diff -u -rabb9687e52d9db5df1abe7626ba04a6d431ba823 -r567a9736641b877ac0028db7481daad2dc65305f
--- firmware/.cproject (.../.cproject) (revision abb9687e52d9db5df1abe7626ba04a6d431ba823)
+++ firmware/.cproject (.../.cproject) (revision 567a9736641b877ac0028db7481daad2dc65305f)
@@ -52,6 +52,8 @@
@@ -100,53 +102,73 @@
-
-
Index: firmware/.settings/org.eclipse.core.resources.prefs
===================================================================
diff -u -ra5cbf07811efee3c038a550f251d3daefff2bf63 -r567a9736641b877ac0028db7481daad2dc65305f
--- firmware/.settings/org.eclipse.core.resources.prefs (.../org.eclipse.core.resources.prefs) (revision a5cbf07811efee3c038a550f251d3daefff2bf63)
+++ firmware/.settings/org.eclipse.core.resources.prefs (.../org.eclipse.core.resources.prefs) (revision 567a9736641b877ac0028db7481daad2dc65305f)
@@ -8,7 +8,6 @@
encoding//Debug/App/Tasks/subdir_rules.mk=UTF-8
encoding//Debug/App/Tasks/subdir_vars.mk=UTF-8
encoding//Debug/makefile=UTF-8
-encoding//Debug/objects.mk=UTF-8
encoding//Debug/source/subdir_rules.mk=UTF-8
encoding//Debug/source/subdir_vars.mk=UTF-8
encoding//Debug/sources.mk=UTF-8
Index: firmware/App/Services/Download.c
===================================================================
diff -u -ra5cbf07811efee3c038a550f251d3daefff2bf63 -r567a9736641b877ac0028db7481daad2dc65305f
--- firmware/App/Services/Download.c (.../Download.c) (revision a5cbf07811efee3c038a550f251d3daefff2bf63)
+++ firmware/App/Services/Download.c (.../Download.c) (revision 567a9736641b877ac0028db7481daad2dc65305f)
@@ -178,17 +178,10 @@
break;
}
}
- else
- {
- prepareResponseMessage( SWUpdateRCVStatus.msgID, ackNackStatus, &resp );
- status = sendAckNackStatusFromFirmware( (U08*)&resp ); // TODO do we have to retry if send failed?
- clearCommBuffer( mailBox ); // TODo does this need to be here? How about resync?
- //clearSWUpdateBuffer(); // TODO uncomment
- }
//prepareResponseMessage( SWUpdateRCVStatus.msgID, ackNackStatus, &resp );
//status = sendAckNackStatusFromFirmware( (U08*)&resp ); // TODO do we have to retry if send failed?
- //clearCommBuffer( mailBox ); // TODo does this need to be here? How about resync?
+ clearCommBuffer( mailBox ); // TODo does this need to be here? How about resync?
//clearSWUpdateBuffer(); // TODO uncomment
}
}
@@ -238,14 +231,14 @@
{
if ( SWUpdateRCVStatus.cyberIndex != SW_UPDATE_FINAL_MSG_INDEX )
{
- U08 removeThis;
+ U16 removeThis;
U08 index = 0;
U32 counter;
U08 test[8];
sizeToWrite = SW_UPDATE_FLASH_BUFFER_SIZE;
BOOL done = FALSE;
- /*for ( removeThis = 0; removeThis < SW_UPDATE_FLASH_BUFFER_SIZE; removeThis++ )
+ for ( removeThis = 0; removeThis < SW_UPDATE_FLASH_BUFFER_SIZE; ++removeThis )
{
test[ index ] = SWUpdateRCVStatus.SWUpdateBuffer[removeThis];
if ( index == 7 )
@@ -261,7 +254,7 @@
// TODO this is temporary until the ROTTING is removed from the APP
// SWUpdateRCVStatus.SWUpdateBuffer[ removeThis ] = 0xFF & ( SWUpdateRCVStatus.SWUpdateBuffer[removeThis] - 27 );
- }*/
+ }
// 3192290
// 1596144
if ( ( 1596144 - REMOVETHEVAR < SW_UPDATE_FLASH_BUFFER_SIZE ) && ( REMOVETHEVAR != 0 ) )
@@ -283,10 +276,6 @@
}
}
}
- //else
- {
- BOOL d = FALSE;
- }
return ackStatus;
}
Index: firmware/App/Services/FPGA.c
===================================================================
diff -u -ra5cbf07811efee3c038a550f251d3daefff2bf63 -r567a9736641b877ac0028db7481daad2dc65305f
--- firmware/App/Services/FPGA.c (.../FPGA.c) (revision a5cbf07811efee3c038a550f251d3daefff2bf63)
+++ firmware/App/Services/FPGA.c (.../FPGA.c) (revision 567a9736641b877ac0028db7481daad2dc65305f)
@@ -116,7 +116,7 @@
typedef struct
{
- BOOL isFlashErased;
+ BOOL hasUpdateRegsBeenRqstd;
U16 fifoRemainingCount;
FPGA_FLASH_STATE_T fpgaFlashState;
U32 startTime;
@@ -156,7 +156,7 @@
static U32 TESTREMOVE = 0; // TODO remove
static U32 countRemove = 0; // TODO remove
static U32 nonzeroCounter = 0; // TODO remove
-static U16 nonZeroCount[100]; // TODO remove
+static U16 nonZeroCount[10000]; // TODO remove
static const U08 STACK_FPGA_ID[ NUM_OF_FW_STACKS ] = { 0x5A, 0x61, 0xFF }; // TODO update with the real FPGA IDs
static const U16 DISABLE_UPDATE_REG_CMD = 5; // TODO what is this value? 0?
@@ -179,8 +179,8 @@
static void initDMA( void );
static void consumeUnexpectedData( void );
-static BOOL processFPGAReceivedData( void );
-static void processFPGAFlashStatus( void );
+static void requestFlashRegistersStatus( void );
+static void processFPGAFlashRegistersRead( void );
static void setupDMAForReadResp( U32 bytes2Receive );
static void setupDMAForReadCmd( U32 bytes2Transmit );
@@ -194,6 +194,7 @@
static void resetFPGACommFlags( void );
static void enqueue( FPGA_JOBS_T job );
static void dequeue( void );
+static U08 peekFromQueue( void );
static BOOL isQueueFull( void );
static FPGA_STATE_T handleFPGAIdleState( void );
@@ -253,15 +254,19 @@
void signalFPGAReceiptCompleted( void )
{
- // TODO What is the purpose of fpgaReceiptCounter++ in firmware?
-
if ( FPGA_COMM_WRITE_IN_PROGRESS == fpgaJobsQStatus.fpgaCommWrite )
{
fpgaJobsQStatus.fpgaCommWrite = FPGA_COMM_WRITE_RESP_RECEIVED;
+ requestFlashRegistersStatus();
}
else if ( FPGA_COMM_READ_IN_PROGRESS == fpgaJobsQStatus.fpgaCommRead )
{
fpgaJobsQStatus.fpgaCommRead = FPGA_COMM_READ_RESP_RECEIVED;
+
+ if ( TRUE == fpgaFlashStatus.hasUpdateRegsBeenRqstd )
+ {
+ processFPGAFlashRegistersRead();
+ }
}
}
@@ -291,7 +296,6 @@
return fpgaFlashStatus.fpgaFlashState;
}
-
void signalFPGAToPrepareForUpdate( void )
{
if ( FALSE == isQueueFull() )
@@ -429,66 +433,79 @@
}
}
-static BOOL processFPGAReceivedData( void )
+static void requestFlashRegistersStatus( void )
{
- BOOL status = TRUE;
+ U16 jobAddress = JOBS_SPECS[ FPGA_READ_MULTI_BOOT_STATUS ].fpgaJobAddress;
+ U08 jobSize = JOBS_SPECS[ FPGA_READ_MULTI_BOOT_STATUS ].fpgaJobSize;
+ U16 crc = 0;
- // Capture the read values
- switch( fpgaJobsQStatus.fpgaCurrentJob )
- {
- case FPGA_READ_HEADER:
- memcpy( &fpgaHeader, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], sizeof( FPGA_HEADER_T ) );
- break;
+ // Construct read command to read 3 registers starting at address 0
+ fpgaReadCmdBuffer[ 0 ] = FPGA_READ_CMD_CODE;
+ fpgaReadCmdBuffer[ 1 ] = GET_LSB_OF_WORD( jobAddress );
+ fpgaReadCmdBuffer[ 2 ] = GET_MSB_OF_WORD( jobAddress );
+ fpgaReadCmdBuffer[ 3 ] = jobSize;
+ crc = crc16( fpgaReadCmdBuffer, FPGA_READ_CMD_HDR_LEN );
+ fpgaReadCmdBuffer[ 4 ] = GET_MSB_OF_WORD( crc );
+ fpgaReadCmdBuffer[ 5 ] = GET_LSB_OF_WORD( crc );
- case FPGA_READ_UPDATE_REG:
- fpgaUpdateRegisterStatus = fpgaReadResponseBuffer[ FPGA_UPDATE_REQUEST_INDEX ];
- break;
+ // Prep DMA for sending the read cmd and receiving the response
+ fpgaJobsQStatus.fpgaCommRead = FPGA_COMM_READ_IN_PROGRESS;
+ fpgaFlashStatus.hasUpdateRegsBeenRqstd = TRUE;
- case FPGA_READ_MULTI_BOOT_STATUS:
- processFPGAFlashStatus();
- break;
-
- default:
- // Do nothing
- break;
- }
-
- return status;
+ setupDMAForReadResp( FPGA_READ_RSP_HDR_LEN + jobSize + sizeof( U16 ) );
+ setupDMAForReadCmd( FPGA_READ_CMD_HDR_LEN + sizeof( U16 ) );
+ startDMAReceiptOfReadResp();
+ startDMAReadCmd();
}
-static void processFPGAFlashStatus( void )
+static void processFPGAFlashRegistersRead( void )
{
- U16 flashStatus = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX ], fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX - 1 ] );
- U16 fifoStatus = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX + sizeof( U16 ) ],
- fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX + sizeof( U16 ) - 1 ] );
+ if ( FPGA_READ_CMD_ACK == fpgaReadResponseBuffer[ 0 ] )
+ {
+ U32 rspSize = FPGA_READ_RSP_HDR_LEN + JOBS_SPECS[ fpgaJobsQStatus.fpgaCurrentJob ].fpgaJobSize;
+ U32 crcPos = rspSize;
+ U16 crc = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ crcPos ], fpgaReadResponseBuffer[ crcPos + 1 ] );
- fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_NOT_READY;
- fpgaFlashStatus.isFlashErased = FALSE;
- fpgaFlashStatus.fifoRemainingCount = FPGA_FIFO_SIZE_BYTES - ( FPGA_FIFO_COUNT_MASK & fifoStatus );
+ // Does the FPGA response CRC check out?
+ if ( crc == crc16( fpgaReadResponseBuffer, rspSize ) )
+ {
+ U16 flashStatus = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX ], fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX - 1 ] );
+ U16 fifoStatus = MAKE_WORD_OF_BYTES( fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX + sizeof( U16 ) ],
+ fpgaReadResponseBuffer[ FPGA_FLASH_STATUS_INDEX + sizeof( U16 ) - 1 ] );
- if ( ( flashStatus & FPGA_ERASE_FIFO_CMD_OK ) == FPGA_ERASE_FIFO_CMD_OK )
- {
- fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_READY;
- fpgaFlashStatus.isFlashErased = TRUE;
- }
+ fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_NOT_READY;
+ fpgaFlashStatus.fifoRemainingCount = FPGA_FIFO_SIZE_BYTES - ( FPGA_FIFO_COUNT_MASK & fifoStatus );
+ fpgaFlashStatus.hasUpdateRegsBeenRqstd = FALSE;
- if ( ( flashStatus & FPGA_FLASH_STATUS_OK ) == FPGA_FLASH_STATUS_OK )
- {
- fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_READY;
- }
+ if ( ( flashStatus & FPGA_ERASE_FIFO_CMD_OK ) == FPGA_ERASE_FIFO_CMD_OK )
+ {
+ fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_READY;
+ }
- if ( fpgaFlashStatus.fifoRemainingCount >= SW_UPDATE_FLASH_BUFFER_SIZE )
- {
- fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_READY;
- }
- else
- {
- fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_FIFO_FULL;
- }
+ if ( ( flashStatus & FPGA_FLASH_STATUS_OK ) == FPGA_FLASH_STATUS_OK )
+ {
+ fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_READY;
+ }
- if ( fpgaFlashStatus.fifoRemainingCount < FPGA_FIFO_SIZE_BYTES ) // TODO remove
- {
- BOOL dara = FALSE;
+ if ( fpgaFlashStatus.fifoRemainingCount >= SW_UPDATE_FLASH_BUFFER_SIZE )
+ {
+ fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_READY;
+ }
+ else
+ {
+ fpgaFlashStatus.fpgaFlashState = FPGA_UPDATE_FIFO_FULL;
+ }
+
+ nonZeroCount[nonzeroCounter] = fpgaFlashStatus.fifoRemainingCount;
+ nonzeroCounter = INC_WRAP( nonzeroCounter, 0, 10000 - 1 );
+
+ // TODO remove
+ if ( fpgaFlashStatus.fifoRemainingCount < FPGA_FIFO_SIZE_BYTES )
+ {
+ BOOL dara = FALSE;
+ }
+ // TODO remove
+ }
}
}
@@ -629,6 +646,16 @@
_enable_IRQ();
}
+static U08 peekFromQueue( void )
+{
+ _disable_IRQ();
+ U08 frontIndex = fpgaJobsQStatus.fpgaJobFrontIndex;
+ U08 frontIndexUpdate = INC_WRAP( frontIndex, 0, QUEUE_MAX_SIZE - 1 );
+ _enable_IRQ();
+
+ return frontIndexUpdate;
+}
+
static BOOL isQueueFull( void )
{
BOOL isFull = FALSE;
@@ -645,15 +672,25 @@
{
FPGA_STATE_T state = FPGA_IDLE_STATE;
- if ( 0 == fpgaJobsQStatus.fpgaJobsQueueCount )
+ requestFlashRegistersStatus();
+
+ if ( fpgaJobsQStatus.fpgaJobsQueueCount > 0 )
{
- enqueue( FPGA_READ_MULTI_BOOT_STATUS );
- }
+ BOOL isDequeueAllowed = TRUE;
- dequeue();
+ if ( ( FPGA_FLASH_WRITE_DATA == peekFromQueue() ) && ( fpgaFlashStatus.fifoRemainingCount < SW_UPDATE_FLASH_BUFFER_SIZE ) )
+ {
+ isDequeueAllowed = FALSE;
+ }
- state = ( FALSE == JOBS_SPECS[ fpgaJobsQStatus.fpgaCurrentJob ].fpgaIsJobWrite ? FPGA_READ_FROM_FPGA_STATE : FPGA_WRITE_TO_FPGA_STATE );
+ if ( TRUE == isDequeueAllowed )
+ {
+ dequeue();
+ state = ( FALSE == JOBS_SPECS[ fpgaJobsQStatus.fpgaCurrentJob ].fpgaIsJobWrite ? FPGA_READ_FROM_FPGA_STATE : FPGA_WRITE_TO_FPGA_STATE );
+ }
+ }
+
// TODo remove
if ( ( FPGA_FLASH_WRITE_DATA == fpgaJobsQStatus.fpgaCurrentJob ) && ( fpgaFlashStatus.fifoRemainingCount < SW_UPDATE_FLASH_BUFFER_SIZE ) )
{
@@ -755,6 +792,8 @@
memset( fpgaWriteCmdBuffer, 0x0, FPGA_WRITE_CMD_BUFFER_LEN ); // TODO a better place for this
}
+ requestFlashRegistersStatus();
+
return state;
}
@@ -801,8 +840,21 @@
// Does the FPGA response CRC check out?
if ( crc == crc16( fpgaReadResponseBuffer, rspSize ) )
{
- BOOL status = processFPGAReceivedData();
+ switch( fpgaJobsQStatus.fpgaCurrentJob )
+ {
+ case FPGA_READ_HEADER:
+ memcpy( &fpgaHeader, &fpgaReadResponseBuffer[ FPGA_READ_RSP_HDR_LEN ], sizeof( FPGA_HEADER_T ) );
+ break;
+ case FPGA_READ_UPDATE_REG:
+ fpgaUpdateRegisterStatus = fpgaReadResponseBuffer[ FPGA_UPDATE_REQUEST_INDEX ];
+ break;
+
+ default:
+ // Do nothing
+ break;
+ }
+
memset( fpgaReadResponseBuffer, 0x0, FPGA_READ_RSP_BUFFER_LEN );
state = FPGA_IDLE_STATE;