Index: AlarmDefs.h
===================================================================
diff -u -r1c89aebf8dc382b17637f6a81da3b7c50a881780 -raa54ca2ddb3eb7e86ff0e07efcb7fbfedd64f276
--- AlarmDefs.h	(.../AlarmDefs.h)	(revision 1c89aebf8dc382b17637f6a81da3b7c50a881780)
+++ AlarmDefs.h	(.../AlarmDefs.h)	(revision aa54ca2ddb3eb7e86ff0e07efcb7fbfedd64f276)
@@ -338,6 +338,7 @@
     ALARM_ID_DG_SERIVCE_TIME_INTERVAL_HAS_ELAPSED = 300,                    ///< DG service time interval has elapsed
     ALARM_ID_DG_PRIMARY_HEATER_POWER_VOLTAGE_OUT_OF_RANGE = 301,            ///< DG primary heater power voltage out of range
     ALARM_ID_DG_CPU_RAM_ERROR = 302,                                        ///< DG processor RAM error
+    ALARM_ID_HD_CPU_RAM_ERROR = 303,                                        ///< HD processor RAM error
     NUM_OF_ALARM_IDS                                                        ///< Total number of alarms
 };
 typedef enum Alarm_List ALARM_ID_T;                                 ///< Type for alarm list enumeration
@@ -770,7 +771,8 @@
     { ALARM_PRIORITY_MEDIUM, 899,  FALSE, FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_DG_DISINFECT_HAS_BEEN_EXPIRED,                    0,              ALARM_ID_NO_ALARM },
     { ALARM_PRIORITY_MEDIUM, 899,  FALSE, FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_DG_SERIVCE_TIME_INTERVAL_HAS_ELAPSED,             0,              ALARM_ID_NO_ALARM },
     { ALARM_PRIORITY_HIGH,     3,  FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, FALSE, TRUE , FALSE, FALSE, ALARM_ID_DG_PRIMARY_HEATER_POWER_VOLTAGE_OUT_OF_RANGE,     0,              ALARM_ID_NO_ALARM },
-    { ALARM_PRIORITY_HIGH,   999,  TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, TRUE , FALSE, FALSE, ALARM_ID_DG_CPU_RAM_ERROR,                                 0,              ALARM_ID_NO_ALARM }
+    { ALARM_PRIORITY_HIGH,     3,  FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, FALSE, TRUE , FALSE, FALSE, ALARM_ID_DG_CPU_RAM_ERROR,                                 0,              ALARM_ID_NO_ALARM },
+    { ALARM_PRIORITY_HIGH,     3,  TRUE , FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_HD_CPU_RAM_ERROR,                                 0,              ALARM_ID_NO_ALARM }
 };  //   Priority            Rank  Fault DFault Stops  ClrIm  NoClr  NoRes  NoRin  NoEnd  NoBRcr NoDRcr ClrOnly TxLog  ID                                                        Escalate In     Escalate To
 
 /// Table of alarms and their rank.
@@ -982,6 +984,8 @@
     {   3, ALARM_ID_DG_TRO_SENSORS_FPGA_FAULT },
     {   3, ALARM_ID_DG_BARO_SENSOR_FPGA_FAULT },
     {   3, ALARM_ID_DG_PRIMARY_HEATER_POWER_VOLTAGE_OUT_OF_RANGE },
+    {   3, ALARM_ID_DG_CPU_RAM_ERROR },
+    {   3, ALARM_ID_HD_CPU_RAM_ERROR },
     {   4, ALARM_ID_END_OF_TREATMENT_HIGH },
     {   5, ALARM_ID_TREATMENT_STOPPED_NO_RINSEBACK },
     {   6, ALARM_ID_HD_BLOOD_LEAK_DETECTED },
@@ -1077,7 +1081,6 @@
     { 999, ALARM_ID_HD_DISINFECT_FLUSH },
     { 999, ALARM_ID_HD_DISINFECT_HEAT },
     { 999, ALARM_ID_HD_DISINFECT_CHEM },
-    { 999, ALARM_ID_DG_CPU_RAM_ERROR },
     { 999, ALARM_ID_NO_ALARM },
 };
 
Index: HDDefs.h
===================================================================
diff -u -rcac8ff3e882749ecbe9a4ecc392a0d73a6b1a60a -raa54ca2ddb3eb7e86ff0e07efcb7fbfedd64f276
--- HDDefs.h	(.../HDDefs.h)	(revision cac8ff3e882749ecbe9a4ecc392a0d73a6b1a60a)
+++ HDDefs.h	(.../HDDefs.h)	(revision aa54ca2ddb3eb7e86ff0e07efcb7fbfedd64f276)
@@ -731,9 +731,9 @@
     HD_EVENT_STARTUP = 0,                                               ///< HD startup event
     HD_EVENT_OP_MODE_CHANGE,                                            ///< HD Op mode change event
     HD_EVENT_SUB_MODE_CHANGE,                                           ///< HD Op sub-mode change event
-    HD_EVENT_DRY_SELF_TEST_CARTRIDGE_RESULT,
-    HD_EVENT_DRY_SELF_TEST_PRESSURE_RESULT,
-    HD_EVENT_WET_SELF_TEST_DISPLACEMENT_RESULT,
+    HD_EVENT_DRY_SELF_TEST_CARTRIDGE_RESULT,                            ///< HD Pre-treatment dry self-test cartridge result
+    HD_EVENT_DRY_SELF_TEST_PRESSURE_RESULT,                             ///< HD Pre-treatment dry self-test pressure result
+    HD_EVENT_WET_SELF_TEST_DISPLACEMENT_RESULT,                         ///< HD Pre-treatment wet self-test displacement result
     HD_EVENT_CPU_RAM_ERROR_STATUS,                                      ///< HD single-bit Ram error event
     NUM_OF_EVENT_IDS                                                    ///< Total number of HD events
 };