Index: AlarmDefs.h =================================================================== diff -u -rcdd50118f970cff8f1e995ca5abacdb399f506b1 -rc6f10dab0825623948cbc8139bc8b9fe4a4024c8 --- AlarmDefs.h (.../AlarmDefs.h) (revision cdd50118f970cff8f1e995ca5abacdb399f506b1) +++ AlarmDefs.h (.../AlarmDefs.h) (revision c6f10dab0825623948cbc8139bc8b9fe4a4024c8) @@ -290,6 +290,8 @@ ALARM_ID_HD_INVALID_SERVICE_RECORD = 252, ///< HD invalid service record ALARM_ID_DG_INVALID_SYSTEM_RECORD = 253, ///< DG invalid sytem record ALARM_ID_DG_INVALID_SERVICE_RECORD = 254, ///< DG invalid service record + ALARM_ID_HD_UI_COMPATIBILITY_ERROR = 255, ///< HD and UI software builds are not compatible + ALARM_ID_HD_DG_COMPATIBILITY_ERROR = 256, ///< HD and DG software builds are not compatible NUM_OF_ALARM_IDS ///< Total number of alarms }; typedef enum Alarm_List ALARM_ID_T; ///< Type for alarm list enumeration @@ -663,6 +665,8 @@ { ALARM_PRIORITY_HIGH, 1, FALSE, FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_HD_INVALID_SERVICE_RECORD, 0, ALARM_ID_NO_ALARM }, { ALARM_PRIORITY_HIGH, 1, FALSE, FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_DG_INVALID_SYSTEM_RECORD, 0, ALARM_ID_NO_ALARM }, { ALARM_PRIORITY_HIGH, 1, FALSE, FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_DG_INVALID_SERVICE_RECORD, 0, ALARM_ID_NO_ALARM }, + { ALARM_PRIORITY_HIGH, 3, TRUE , FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_HD_UI_COMPATIBILITY_ERROR, 0, ALARM_ID_NO_ALARM }, + { ALARM_PRIORITY_HIGH, 3, TRUE , FALSE, TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , TRUE , FALSE, FALSE, ALARM_ID_HD_DG_COMPATIBILITY_ERROR, 0, ALARM_ID_NO_ALARM }, }; // Priority Rank Fault DGFault Stops ClrIm NoClr NoRes NoRin NoEnd NoNew NoRcr UsrAck TxLog ID Escalate In Escalate To /// Table of alarms and their rank. @@ -795,6 +799,8 @@ { 3, ALARM_ID_DG_MAIN_PRIMARY_HEATER_VOLTAGE_OUT_OF_RANGE }, { 3, ALARM_ID_DG_SMALL_PRIMARY_HEATER_VOLTAGE_OUT_OF_RANGE }, { 3, ALARM_ID_DG_TRIMMER_HEATER_VOLTAGE_OUT_OF_RANGE }, + { 3, ALARM_ID_HD_UI_COMPATIBILITY_ERROR }, + { 3, ALARM_ID_HD_DG_COMPATIBILITY_ERROR }, { 4, ALARM_ID_END_OF_TREATMENT_HIGH }, { 5, ALARM_ID_TREATMENT_STOPPED_NO_RINSEBACK }, { 6, ALARM_ID_HD_BLOOD_LEAK_DETECTED }, Index: HDDefs.h =================================================================== diff -u -r3edbc03bdb83308817441da63d8ca3a07b41fa9c -rc6f10dab0825623948cbc8139bc8b9fe4a4024c8 --- HDDefs.h (.../HDDefs.h) (revision 3edbc03bdb83308817441da63d8ca3a07b41fa9c) +++ HDDefs.h (.../HDDefs.h) (revision c6f10dab0825623948cbc8139bc8b9fe4a4024c8) @@ -52,7 +52,6 @@ enum HD_POST_States { POST_STATE_START = 0, ///< Start initialize & POST mode state - POST_STATE_FW_COMPATIBILITY, ///< Run firmware compatibility test state POST_STATE_FW_INTEGRITY, ///< Run firmware integrity test state POST_STATE_BATTERY, ///< Run battery SOC test state POST_STATE_WATCHDOG, ///< Run watchdog test state @@ -67,6 +66,7 @@ POST_STATE_ACCELEROMETER, ///< Run Accelerometer test state POST_STATE_STUCK_BUTTON, ///< Run stuck button test state POST_STATE_UI_POST, ///< Check whether UI passed its POST tests + POST_STATE_FW_COMPATIBILITY, ///< Run firmware compatibility test state POST_STATE_FPGA, ///< Run FPGA test state POST_STATE_COMPLETED, ///< POST self-tests completed state POST_STATE_FAILED, ///< POST self-tests failed state