Index: firmware/App/Controllers/Valves.c =================================================================== diff -u -r3417933e6edf61a914c428e2fa944b3b349272a4 -rfabb2cc72b3b94c1e02e84894ccb52d05a12d7cd --- firmware/App/Controllers/Valves.c (.../Valves.c) (revision 3417933e6edf61a914c428e2fa944b3b349272a4) +++ firmware/App/Controllers/Valves.c (.../Valves.c) (revision fabb2cc72b3b94c1e02e84894ccb52d05a12d7cd) @@ -35,6 +35,10 @@ #define ENERGIZED 1 ///< 1 for energized valve. #define ALL_VALVES_DEENERGIZED 0x0000 ///< 0 in U16 bit field for all valves. +#define VALVE_PWM_PERIOD 50 ///< Valve PWM Period in 0.1 us res ( 20kHz ) +#define VALVE_PWM_LOW ( VALVE_PWM_PERIOD * 0.2 ) ///< Valve low PWM percentage +#define VALVE_PWM_PULL_IN 100 ///< Valve 'strike' period at 100% PWM in ms + #define MAX_VALVE_STATE_MISMATCH_TIMER_COUNT (100 / TASK_PRIORITY_INTERVAL ) ///< Maximum time commanded valves state can fail to match read back valve states in a row. #define VALVES_STATE_PUB_INTERVAL ( MS_PER_SECOND / TASK_PRIORITY_INTERVAL ) ///< Interval ( ms / task time) at which valves states are published on CAN bus. #define DATA_PUBLISH_COUNTER_START_COUNT 50 ///< Data publish counter start count. @@ -71,6 +75,7 @@ static BOOL checkValveStateName( DD_VALVES_T valveID, VALVE_STATE_NAMES_T valveStateName ); static U32 convertValveStateNameToValveState( VALVE_STATE_NAMES_T valveStateName ); static U32 getValveState( U32 valveID ); +static void setFPGAPWMConfigurations( void ); /*********************************************************************//** * @brief @@ -118,16 +123,79 @@ valvesStatesPublicationTimerCounter = DATA_PUBLISH_COUNTER_START_COUNT; // reset valves states publication timer fpValveStatesPublicationTimerCounter = DATA_PUBLISH_COUNTER_START_COUNT; // reset valves states publication timer readCommandedValveStates(); + + // initially set valve PWM configuration and enable + setFPGAPWMConfigurations(); + // initially set all valves to de-energized state via FPGA setFPGADDValveStates( commandedValvesStates ); setFPGABCValveStates( commandedBCValveStates ); setFPGASpareValveStates( commandedSpareValveStates ); - setFPGAIOValveStates( commandedIOValveStates ); setFPGAFPValveStates( commandedFPValveStates ); + setFPGAIOValveStates( commandedIOValveStates ); + } /*********************************************************************//** * @brief + * The setFPGAPWMConfigurations function sets the FPGA for Valve PWM control. + * @details \b Inputs: none + * @details \b Outputs: Valves PWM timing set and enabled. + * @return none + *************************************************************************/ +static void setFPGAPWMConfigurations( void ) +{ + // Balancing Chamber valves are not PWM configured. + U32 i; + U16 valveDDBits = 0; + U08 valveSPBits = 0; + U08 valveIOBits = 0; + U08 valveFPBits = 0; + + // set timing values + setFPGAValveDDPWMPullIn( VALVE_PWM_PULL_IN ); + setFPGAValveDDPWMLow( VALVE_PWM_LOW ); + setFPGAValveDDPWMPeriod( VALVE_PWM_PERIOD ); + + setFPGAValveSPPWMPullIn( VALVE_PWM_PULL_IN ); + setFPGAValveSPPWMLow( VALVE_PWM_LOW ); + setFPGAValveSPPWMPeriod( VALVE_PWM_PERIOD ); + + setFPGAValveIOFPPWMPullIn( VALVE_PWM_PULL_IN ); + setFPGAValveIOFPPWMLow( VALVE_PWM_LOW ); + setFPGAValveIOFPPWMPeriod( VALVE_PWM_PERIOD ); + + for ( i = FIRST_HYD_VALVE; i <= LAST_HYD_VALVE; i++ ) + { + valveDDBits |= 0x01 << i; + } + + for ( i = FIRST_SP_VALVE; i <= LAST_SP_VALVE; i++ ) + { + valveSPBits |= 0x01 << ( i - FIRST_SP_VALVE ); + } + + for ( i = FIRST_IO_VALVE; i <= LAST_IO_VALVE; i++ ) + { + valveIOBits |= 0x01 << ( i - FIRST_IO_VALVE ); + } + + for ( i = FIRST_FP_VALVE; i <= LAST_FP_VALVE; i++ ) + { + valveFPBits |= 0x01 << ( i - FIRST_FP_VALVE ); + } + + // set enable + setFPGAValveDDPWMEnable( valveDDBits ); + setFPGAValveSPPWMEnable( valveSPBits ); + setFPGAValveIOPWMEnable( valveIOBits ); + setFPGAValveFPPWMEnable( valveFPBits ); + + +} + +/*********************************************************************//** + * @brief * The execValves function executes the valves driver. * @details \b Inputs: valvesStates, valveStateMismatchCounter * pendingValveStateChangeCountDowns, commandedValvesStates, @@ -141,11 +209,11 @@ void execValves( void ) { U32 i; - U16 readValvesStates = getFPGADDValveStates(); - U08 readValveBCStates = getFPGAValveBCStates(); - U08 readValveSpStates = getFPGAValveSpStates(); - U08 readValveIOStates = getFPGAIOValveStates(); - U08 readValveFPStates = getFPGAFPValveStates(); + U16 readValvesStates = getFPGADDValveStates(); + U08 readValveBCStates = getFPGAValveBCStates(); + U08 readValveSpStates = getFPGAValveSpStates(); + U08 readValveIOStates = getFPGAIOValveStates(); + U08 readValveFPStates = getFPGAFPValveStates(); // Verify read back FPGA valve states match last commanded valve states if ( ( readValvesStates != commandedValvesStates ) || @@ -184,8 +252,8 @@ setFPGADDValveStates( commandedValvesStates ); setFPGABCValveStates( commandedBCValveStates ); setFPGASpareValveStates( commandedSpareValveStates ); - setFPGAIOValveStates( commandedIOValveStates ); setFPGAFPValveStates( commandedFPValveStates ); + setFPGAIOValveStates( commandedIOValveStates ); // Publish valve states on interval publishValvesStates();