Index: firmware/App/Monitors/Level.c =================================================================== diff -u -r58e5721497be626929b6cdc0c5187e18b34bbaad -rd0f2f31b8bb46e0615fb5b71ea0594b3f53af064 --- firmware/App/Monitors/Level.c (.../Level.c) (revision 58e5721497be626929b6cdc0c5187e18b34bbaad) +++ firmware/App/Monitors/Level.c (.../Level.c) (revision d0f2f31b8bb46e0615fb5b71ea0594b3f53af064) @@ -7,15 +7,14 @@ * * @file Level.c * -* @author (last) Varshini Nagabooshanam -* @date (last) 26-Jan-2026 +* @author (last) Sameer Kalliadan Poyil +* @date (last) 04-Feb-2026 * * @author (original) Vinayakam Mani * @date (original) 14-Oct-2024 * ***************************************************************************/ - #include "FpgaDD.h" #include "Level.h" #include "MessageSupport.h" @@ -36,6 +35,10 @@ #define FPGA_LEVEL_LOW 2 ///< Floater low level status #define FPGA_LEVEL_MEDIUM 0 ///< Floater medium level status #define FPGA_LEVEL_HIGH 4 ///< Floater high level status +#define FPGA_B2_LEVEL_EMPTY 0x0B ///< Floater empty level status for beta 2.0 +#define FPGA_B2_LEVEL_LOW 0x0A ///< Floater low level status for beta 2.0 +#define FPGA_B2_LEVEL_MEDIUM 8 ///< Floater medium level status for beta 2.0 +#define FPGA_B2_LEVEL_HIGH 0x0C ///< Floater high level status for beta 2.0 #define LEVEL_COUNT_LOW 0xFFFF ///< Level sensor count when fluid level is low or non submerged #define LEVEL_COUNT_HIGH_START 0x0000 ///< Start range of level sensor count when fluid level is high or submerged #define LEVEL_COUNT_HIGH_END 0x1FFF ///< End range of level sensor count when fluid level is high or submerged @@ -270,7 +273,7 @@ if ( D6_LEVL == levelId ) { levelStatus = getFPGAD6LevelStatus(); - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE && getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) != TRUE ) { // Beta 1.9 behavior if ( FPGA_LEVEL_EMPTY == levelStatus ) @@ -295,6 +298,31 @@ currentLevelStatus = LEVEL_STATE_ILLEGAL; } } + else if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + { + // Beta 2.0 behavior + if ( FPGA_B2_LEVEL_EMPTY == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_EMPTY; + } + else if ( FPGA_B2_LEVEL_LOW == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_LOW; + } + else if ( FPGA_B2_LEVEL_MEDIUM == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_MEDIUM; + } + else if ( FPGA_B2_LEVEL_HIGH == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_HIGH; + } + else + { + // TODO - Handle invalid level alarm + currentLevelStatus = LEVEL_STATE_ILLEGAL; + } + } else { // Beta 1.0 behavior @@ -322,7 +350,7 @@ { levelStatus = getFPGAP25FloaterState(); - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE && getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) != TRUE) { // Beta 1.9 behavior if ( FPGA_LEVEL_EMPTY == levelStatus ) @@ -347,6 +375,31 @@ currentLevelStatus = LEVEL_STATE_ILLEGAL; } } + else if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + { + // Beta 2.0 behavior + if ( FPGA_B2_LEVEL_EMPTY == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_EMPTY; + } + else if ( FPGA_B2_LEVEL_LOW == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_LOW; + } + else if ( FPGA_B2_LEVEL_MEDIUM == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_MEDIUM; + } + else if ( FPGA_B2_LEVEL_HIGH == levelStatus ) + { + currentLevelStatus = LEVEL_STATE_HIGH; + } + else + { + // TODO - Handle invalid level alarm + currentLevelStatus = LEVEL_STATE_ILLEGAL; + } + } else { // Beta 1.0 behavior