Index: firmware/App/Monitors/Level.c
===================================================================
diff -u -rd210786d6c7d75bb0b4d9e18efc40a01d85123fe -r87156ada4eaf0bb74a9449210145fd358a09476f
--- firmware/App/Monitors/Level.c	(.../Level.c)	(revision d210786d6c7d75bb0b4d9e18efc40a01d85123fe)
+++ firmware/App/Monitors/Level.c	(.../Level.c)	(revision 87156ada4eaf0bb74a9449210145fd358a09476f)
@@ -28,13 +28,18 @@
  */
 
 // ********** private definitions **********
+#define LEVEL_SENSOR_VALUE_LOW              0U                                                      ///< Level sensor digital low value (0 = low, non-zero = high).
 #define FPGA_B1_HW_LEVEL_LOW                5                                                       ///< Floater low level status for Beta 1.0
 #define FPGA_B1_HW_LEVEL_MEDIUM             4                                                       ///< Floater medium level status for Beta 1.0
 #define FPGA_B1_HW_LEVEL_HIGH               6                                                       ///< Floater high level status for Beta 1.0
 #define FPGA_LEVEL_EMPTY                    3                                                       ///< Floater empty level status
 #define FPGA_LEVEL_LOW                      2                                                       ///< Floater low level status
 #define FPGA_LEVEL_MEDIUM                   0                                                       ///< Floater medium level status
 #define FPGA_LEVEL_HIGH                     4                                                       ///< Floater high level status
+#define FPGA_B2_LEVEL_EMPTY                 0x0B                                                    ///< Floater empty level status for beta 2.0
+#define FPGA_B2_LEVEL_LOW                   0x0A                                                    ///< Floater low level status for beta 2.0
+#define FPGA_B2_LEVEL_MEDIUM                8                                                       ///< Floater medium level status for beta 2.0
+#define FPGA_B2_LEVEL_HIGH                  0x0C                                                    ///< Floater high level status for beta 2.0
 #define LEVEL_COUNT_LOW                     0xFFFF                                                  ///< Level sensor count when fluid level is low or non submerged
 #define LEVEL_COUNT_HIGH_START              0x0000                                                  ///< Start range of level sensor count when fluid level is high or submerged
 #define LEVEL_COUNT_HIGH_END                0x1FFF                                                  ///< End range of level sensor count when fluid level is high or submerged
@@ -65,7 +70,10 @@
 
 static void publishLevelsData( void );
 static BOOL processLevelCount( U16 count );
-static LEVEL_STATE_T readFloaterLevelstatus( LEVEL_T levelId );
+static LEVEL_STATE_T readFloaterLevelStatus( LEVEL_T levelId );
+static LEVEL_STATE_T getLevelState( U32 levelStatus );
+static LEVEL_STATE_T getLevelStateBeta19( U32 levelStatus );
+static LEVEL_STATE_T getLevelStateBeta10( U32 levelStatus );
 
 /*********************************************************************//**
  * @brief
@@ -122,23 +130,44 @@
         {
             // Process the status of the Level
             case D6_LEVL:
-                currentLevelStatus = readFloaterLevelstatus( D6_LEVL );
+                currentLevelStatus = readFloaterLevelStatus( D6_LEVL );
                 break;
 
             case D63_LEVL:
-                currentLevelStatus = ( processLevelCount( getFPGAD63LevelSensor() ) == 0 ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH );
+                if ( TRUE == getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) )
+                {
+                    currentLevelStatus = ( LEVEL_SENSOR_VALUE_LOW == getFPGAD63LevelSensor() ) ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH;
+                }
+                else
+                {
+                    currentLevelStatus = ( processLevelCount( getFPGAD63LevelSensor() ) == LEVEL_SENSOR_VALUE_LOW ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH );
+                }
                 break;
 
             case D98_LEVL:
-                currentLevelStatus = ( processLevelCount( getFPGAD98LevelSensor() ) == 0 ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH );
+                if ( TRUE == getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) )
+                {
+                    currentLevelStatus = ( LEVEL_SENSOR_VALUE_LOW == getFPGAD98LevelSensor() ) ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH;
+                }
+                else
+                {
+                    currentLevelStatus = ( processLevelCount( getFPGAD98LevelSensor() ) == LEVEL_SENSOR_VALUE_LOW ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH );
+                }
                 break;
 
             case D46_LEVL:
-                currentLevelStatus = ( processLevelCount( getFPGAD46LevelSensor() ) == 0 ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH );
+                if ( TRUE == getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) )
+                {
+                    currentLevelStatus = ( LEVEL_SENSOR_VALUE_LOW == getFPGAD46LevelSensor() ) ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH;
+                }
+                else
+                {
+                    currentLevelStatus = ( processLevelCount( getFPGAD46LevelSensor() ) == LEVEL_SENSOR_VALUE_LOW ? LEVEL_STATE_LOW : LEVEL_STATE_HIGH );
+                }
                 break;
 
             case P25_LEVL:
-                currentLevelStatus = readFloaterLevelstatus( P25_LEVL );
+                currentLevelStatus = readFloaterLevelStatus( P25_LEVL );
                 break;
 
 #ifndef _VECTORCAST_
@@ -255,117 +284,168 @@
 
 /*********************************************************************//**
  * @brief
- * The getFloaterLevelstatus function gets the floater level reported by FPGA
+ * The getLevelStateBeta19 function maps the raw floater/level status reported
+ * by FPGA to the corresponding LEVEL_STATE_T for Beta 1.9 hardware.
+ * @details \b Inputs: levelStatus
+ * @details \b Outputs: none
+ * @param levelStatus Raw FPGA level status value
+ * @return mapped level state
+ *************************************************************************/
+static LEVEL_STATE_T getLevelStateBeta19( U32 levelStatus )
+{
+    LEVEL_STATE_T currentLevelStatus = LEVEL_STATE_ILLEGAL;
+
+    if ( FPGA_LEVEL_EMPTY == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_EMPTY;
+    }
+    else if ( FPGA_LEVEL_LOW == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_LOW;
+    }
+    else if ( FPGA_LEVEL_MEDIUM == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_MEDIUM;
+    }
+    else if ( FPGA_LEVEL_HIGH == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_HIGH;
+    }
+    else
+    {
+        // TODO - Handle invalid level alarm
+        currentLevelStatus = LEVEL_STATE_ILLEGAL;
+    }
+
+    return currentLevelStatus;
+}
+
+/*********************************************************************//**
+ * @brief
+ * The getLevelState function maps the raw floater/level status reported
+ * by FPGA to the corresponding LEVEL_STATE_T for Beta 2.0 hardware.
+ * @details \b Inputs: levelStatus
+ * @details \b Outputs: none
+ * @param levelStatus Raw FPGA level status value
+ * @return mapped level state
+ *************************************************************************/
+static LEVEL_STATE_T getLevelState( U32 levelStatus )
+{
+    LEVEL_STATE_T currentLevelStatus = LEVEL_STATE_ILLEGAL;
+
+    if ( FPGA_B2_LEVEL_EMPTY == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_EMPTY;
+    }
+    else if ( FPGA_B2_LEVEL_LOW == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_LOW;
+    }
+    else if ( FPGA_B2_LEVEL_MEDIUM == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_MEDIUM;
+    }
+    else if ( FPGA_B2_LEVEL_HIGH == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_HIGH;
+    }
+    else
+    {
+        // TODO - Handle invalid level alarm
+        currentLevelStatus = LEVEL_STATE_ILLEGAL;
+    }
+
+    return currentLevelStatus;
+}
+
+/*********************************************************************//**
+ * @brief
+ * The getLevelStateBeta10 function maps the raw floater/level status reported
+ * by FPGA to the corresponding LEVEL_STATE_T for Beta 1.0 hardware.
+ * @details \b Inputs: levelStatus
+ * @details \b Outputs: none
+ * @param levelStatus Raw FPGA level status value
+ * @return mapped level state
+ *************************************************************************/
+static LEVEL_STATE_T getLevelStateBeta10( U32 levelStatus )
+{
+    LEVEL_STATE_T currentLevelStatus = LEVEL_STATE_ILLEGAL;
+
+    if ( FPGA_B1_HW_LEVEL_LOW == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_LOW;
+    }
+    else if ( FPGA_B1_HW_LEVEL_MEDIUM == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_MEDIUM;
+    }
+    else if ( FPGA_B1_HW_LEVEL_HIGH == levelStatus )
+    {
+        currentLevelStatus = LEVEL_STATE_HIGH;
+    }
+    else
+    {
+        // TODO - Handle invalid level alarm
+        currentLevelStatus = LEVEL_STATE_ILLEGAL;
+    }
+
+    return currentLevelStatus;
+}
+
+/*********************************************************************//**
+ * @brief
+ * The readFloaterLevelStatus function gets the floater level reported by FPGA
  * @details \b Alarm: ALARM_ID_DD_SOFTWARE_FAULT if the current state is invalid.
  * @details \b Inputs: FPGA level sensor data
  * @details \b Outputs: level
  * @return level status
  *************************************************************************/
-static LEVEL_STATE_T readFloaterLevelstatus( LEVEL_T levelId )
+static LEVEL_STATE_T readFloaterLevelStatus( LEVEL_T levelId )
 {
     LEVEL_STATE_T currentLevelStatus = LEVEL_STATE_HIGH;
     U32 levelStatus = 0;
 
     if ( D6_LEVL == levelId )
     {
        levelStatus = getFPGAD6LevelStatus();
-       if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE )
+
+       if ( ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE ) &&
+            ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) != TRUE ) )
        {
            // Beta 1.9 behavior
-           if ( FPGA_LEVEL_EMPTY == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_EMPTY;
-           }
-           else if ( FPGA_LEVEL_LOW == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_LOW;
-           }
-           else if ( FPGA_LEVEL_MEDIUM == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_MEDIUM;
-           }
-           else if ( FPGA_LEVEL_HIGH == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_HIGH;
-           }
-           else
-           {
-               // TODO - Handle invalid level alarm
-               currentLevelStatus = LEVEL_STATE_ILLEGAL;
-           }
+           currentLevelStatus = getLevelStateBeta19( levelStatus );
        }
+       else if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE )
+       {
+           // Beta 2.0 behavior
+           currentLevelStatus = getLevelState( levelStatus );
+       }
        else
        {
            // Beta 1.0 behavior
-           if ( FPGA_B1_HW_LEVEL_LOW == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_LOW;
-           }
-           else if ( FPGA_B1_HW_LEVEL_MEDIUM == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_MEDIUM;
-           }
-           else if ( FPGA_B1_HW_LEVEL_HIGH == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_HIGH;
-           }
-           else
-           {
-               // TODO - Handle invalid level alarm
-               currentLevelStatus = LEVEL_STATE_ILLEGAL;
-           }
+           currentLevelStatus = getLevelStateBeta10( levelStatus );
        }
     }
 
     else if ( P25_LEVL == levelId )
     {
        levelStatus = getFPGAP25FloaterState();
 
-       if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE )
+       if ( ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE ) &&
+            ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) != TRUE ) )
        {
            // Beta 1.9 behavior
-           if ( FPGA_LEVEL_EMPTY == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_EMPTY;
-           }
-           else if ( FPGA_LEVEL_LOW == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_LOW;
-           }
-           else if ( FPGA_LEVEL_MEDIUM == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_MEDIUM;
-           }
-           else if ( FPGA_LEVEL_HIGH == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_HIGH;
-           }
-           else
-           {
-               // TODO - Handle invalid level alarm
-               currentLevelStatus = LEVEL_STATE_ILLEGAL;
-           }
+           currentLevelStatus = getLevelStateBeta19( levelStatus );
        }
+       else if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE )
+      {
+          // Beta 2.0 behavior
+          currentLevelStatus = getLevelState( levelStatus );
+      }
        else
        {
            // Beta 1.0 behavior
-           if ( FPGA_B1_HW_LEVEL_LOW == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_LOW;
-           }
-           else if ( FPGA_B1_HW_LEVEL_MEDIUM == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_MEDIUM;
-           }
-           else if ( FPGA_B1_HW_LEVEL_HIGH == levelStatus )
-           {
-               currentLevelStatus = LEVEL_STATE_HIGH;
-           }
-           else
-           {
-               // TODO - Handle invalid level alarm
-               currentLevelStatus = LEVEL_STATE_ILLEGAL;
-           }
+           currentLevelStatus = getLevelStateBeta10( levelStatus );
        }
     }