Index: firmware/App/Services/FpgaDD.c =================================================================== diff -u -r57dd20557f066bf5d790ce25dd11c97bb93e3cde -r5b7121b237be1970c0a040809503ff5786e6da0d --- firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 57dd20557f066bf5d790ce25dd11c97bb93e3cde) +++ firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 5b7121b237be1970c0a040809503ff5786e6da0d) @@ -42,33 +42,34 @@ #define MAX_COMM_ERROR_RETRIES 5 ///< Maximum number of communication error retries -#define DRAIN_PUMP_DAC_SHIFT_BITS 4 ///< Drain pump DAC shift bits. - -#define FPGA_FLUIDLEAK_STATE_MASK 0x0004 ///< Bit mask for fluid leak detector. - //TODO : Define the default values for the Valves ( 0: Deenergized, 1 : Energized) on power up. #define FPGA_ENABLE_VALVES_CONTROL 0x0000 ///< FPGA enable valves control. #define FPGA_ENABLE_BC_VALVES_CONTROL 0x00 ///< FPGA enable Balancing chamber valves control. #define FPGA_ENABLE_UF_VALVES_CONTROL 0x00 ///< FPGA enable Balancing Chamber valves control. -#define FPGA_CD1_RESET_BIT 0x01 ///< Conductivity Sensor CD1 reset bit mask. -#define FPGA_CD1_INIT_ENABLE_BIT 0x02 ///< Conductivity Sensor CD1 Initialization enable bit mask. -#define FPGA_CD1_WR_ENABLE_BIT 0x04 ///< Conductivity Sensor CD1 write enable bit mask. -#define FPGA_CD1_RD_ENABLE_BIT 0x08 ///< Conductivity Sensor CD1 read enable bit mask. -#define FPGA_CD2_RESET_BIT 0x10 ///< Conductivity Sensor CD2 reset bit mask. -#define FPGA_CD2_INIT_ENABLE_BIT 0x20 ///< Conductivity Sensor CD2 Initialization enable bit mask. -#define FPGA_CD2_WR_ENABLE_BIT 0x40 ///< Conductivity Sensor CD2 write enable bit mask. -#define FPGA_CD2_RD_ENABLE_BIT 0x80 ///< Conductivity Sensor CD2 read enable bit mask. +#define FPGA_D17_RESET_BIT 0x01 ///< Conductivity Sensor D17 reset bit mask. +#define FPGA_D17_INIT_ENABLE_BIT 0x02 ///< Conductivity Sensor D17 Initialization enable bit mask. +#define FPGA_D17_WR_ENABLE_BIT 0x04 ///< Conductivity Sensor D17 write enable bit mask. +#define FPGA_D17_RD_ENABLE_BIT 0x08 ///< Conductivity Sensor D17 read enable bit mask. +#define FPGA_D27_RESET_BIT 0x10 ///< Conductivity Sensor D27 reset bit mask. +#define FPGA_D27_INIT_ENABLE_BIT 0x20 ///< Conductivity Sensor D27 Initialization enable bit mask. +#define FPGA_D27_WR_ENABLE_BIT 0x40 ///< Conductivity Sensor D27 write enable bit mask. +#define FPGA_D27_RD_ENABLE_BIT 0x80 ///< Conductivity Sensor D27 read enable bit mask. -#define FPGA_CD3_RESET_BIT 0x01 ///< Conductivity Sensor CD3 reset bit mask. -#define FPGA_CD3_INIT_ENABLE_BIT 0x02 ///< Conductivity Sensor CD3 Initialization enable bit mask. -#define FPGA_CD3_WR_ENABLE_BIT 0x04 ///< Conductivity Sensor CD3 write enable bit mask. -#define FPGA_CD3_RD_ENABLE_BIT 0x08 ///< Conductivity Sensor CD3 read enable bit mask. -#define FPGA_CD4_RESET_BIT 0x10 ///< Conductivity Sensor CD4 reset bit mask. -#define FPGA_CD4_INIT_ENABLE_BIT 0x20 ///< Conductivity Sensor CD4 Initialization enable bit mask. -#define FPGA_CD4_WR_ENABLE_BIT 0x40 ///< Conductivity Sensor CD4 write enable bit mask. -#define FPGA_CD4_RD_ENABLE_BIT 0x80 ///< Conductivity Sensor CD4 read enable bit mask. +#define FPGA_D29_RESET_BIT 0x01 ///< Conductivity Sensor D29 reset bit mask. +#define FPGA_D29_INIT_ENABLE_BIT 0x02 ///< Conductivity Sensor D29 Initialization enable bit mask. +#define FPGA_D29_WR_ENABLE_BIT 0x04 ///< Conductivity Sensor D29 write enable bit mask. +#define FPGA_D29_RD_ENABLE_BIT 0x08 ///< Conductivity Sensor D29 read enable bit mask. +#define FPGA_D43_RESET_BIT 0x10 ///< Conductivity Sensor D43 reset bit mask. +#define FPGA_D43_INIT_ENABLE_BIT 0x20 ///< Conductivity Sensor D43 Initialization enable bit mask. +#define FPGA_D43_WR_ENABLE_BIT 0x40 ///< Conductivity Sensor D43 write enable bit mask. +#define FPGA_D43_RD_ENABLE_BIT 0x80 ///< Conductivity Sensor D43 read enable bit mask. +#define FPGA_D74_RESET_BIT 0x01 ///< Conductivity Sensor D74 reset bit mask. +#define FPGA_D74_INIT_ENABLE_BIT 0x02 ///< Conductivity Sensor D74 Initialization enable bit mask. +#define FPGA_D74_WR_ENABLE_BIT 0x04 ///< Conductivity Sensor D74 write enable bit mask. +#define FPGA_D74_RD_ENABLE_BIT 0x08 ///< Conductivity Sensor D74 read enable bit mask. + // Assuming all valves are ON/OFF based control ( No PWM control used) #define FPGA_ENABLE_VALVES_PWM 0x0000 ///< FPGA enable valves PWM. #define FPGA_ENABLE_BC_VALVES_PWM 0x00 ///< FPGA enable Balancing chamber valves PWM. @@ -78,6 +79,10 @@ #define CONCENTRATE_CAP_SWITCH_MASK 0x10 ///< Concentrate cap switch bit mask. #define FPGA_CONC_PUMP_FAULT_BITS 0x03 ///< Concentrate pump fault bits mask. +#define UF_PUMP_FAULT_SHIFT 0x02 ///< Shift UF pump fault while reading, to account other dosing pumps fault. +#define FPGA_UF_PUMP_FAULT_BIT 0x00 ///< UF pump fault bit mask. +#define FPGA_UF_PUMP_PARKED_BIT 0x01 ///< UF pump parked status bit mask. +#define FPGA_UF_PUMP_PARK_FAULT_BIT 0x02 ///< UF pump park fault status bit mask. #define FPGA_D11_PUMP_PARKED_BIT 0x04 ///< Acid Concentrate pump parked status bit mask. #define FPGA_D10_PUMP_PARKED_BIT 0x10 ///< Bicarb Concentrate pump parked status bit mask. #define FPGA_D11_PUMP_PARK_FAULT_BIT 0x08 ///< Acid Concentrate pump park fault status bit mask. @@ -92,9 +97,10 @@ #define FPGA_D12_PUMP_ERROR_BIT 0x01 ///< Fresh dialysate pump error bit mask. #define FPGA_D48_PUMP_ERROR_BIT 0x02 ///< Spent dialysate pump error bit mask. -#define FPGA_FLOATER_LEVEL_BIT 0x03 ///< Floater level bit mask. +#define FPGA_D6_FLOATER_LEVEL_BIT 0x03 ///< Floater level bit mask. -#define FPGA_PRIMARY_HEATER_CNTRL_BIT 0x01 ///< FPGA GIO Primary heater control bit mask +#define FPGA_D5_HEATER_CNTRL_BIT 0x01 ///< FPGA GIO D5 heater control bit mask +#define FPGA_D5_HEATER_PWM_ENABLE_BIT 0x02 ///< FPGA D5 PWM based heater control bit mask /// FPGA size of V3 read bytes. #define FPGA_SIZE_OF_V3_READ_BYTES ( FPGA_READ_V3_END_BYTE_NUM - FPGA_READ_V3_START_BYTE_NUM ) @@ -189,11 +195,11 @@ U08 fpgaHallSensInputs; ///< Reg 350. Hall sensor Inputs - U08 fpgaBldTxFIFOCnt; ///< Reg 351. Blood leak sensor transmit FIFO count - U16 fpgaBldRxErrorCnt; ///< Reg 352. Blood leak sensor Receive error count - U16 fpgaBldRxFIFOCnt; ///< Reg 354. Blood leak sensor Receive FIFO count - U08 fpgaBldRxFIFODataOut; ///< Reg 356. Blood leak sensor Receive data - U08 fpgaBldPulseStatus; ///< Reg 357. Blood leak sensor status + U08 fpgaD42TxFIFOCnt; ///< Reg 351. Blood leak sensor transmit FIFO count + U16 fpgaD42RxErrorCnt; ///< Reg 352. Blood leak sensor Receive error count + U16 fpgaD42RxFIFOCnt; ///< Reg 354. Blood leak sensor Receive FIFO count + U08 fpgaD42RxFIFODataOut; ///< Reg 356. Blood leak sensor Receive data + U08 fpgaD42PulseStatus; ///< Reg 357. Blood leak sensor status U16 fpgaValveStates; ///< Reg 358. Valve status read U16 fpgaValvePWMEnableStates; ///< Reg 360. Valve PWM Enable status read @@ -236,6 +242,22 @@ U08 fpgaFloater2Status; ///< Reg 427. Floater 2 level sensor status U16 fpgaD11PumpStepCountStatus; ///< Reg 428. Acid concentrate pump revolution down count status U16 fpgaD10PumpStepCountStatus; ///< Reg 430. Bicarb concentrate pump revolution down count status + + U16 fpgaAdcTemp; ///< Reg 432. TBD + U16 fpgaAdcVccInt; ///< Reg 434. TBD + U16 fpgaAdcVccAux; ///< Reg 436. TBD + U16 fpgaAdcVpVn; ///< Reg 438. TBD + U16 fpgaD12PumpSpeedFeedback; ///< Reg 440. D12 Pump speed feedback + U16 fpgaD48PumpSpeedFeedback; ///< Reg 442. D48 Pump Speed feedback + U16 fpgaD76PumpHallSense; ///< Reg 444. UF D76_Pump hall sensor pulse width + U16 fpgaD76PumpStepCountStatus; ///< Reg 446. UF pump revolution down count status + U08 fpgaD76PumpFault; ///< Reg 448: UF pump fault + + U32 fpgaD74CondDataOut; ///< Reg 449. Data read from Conductivity Sensor D74 register + U16 fpgaD74CondCond; ///< Reg 453. D74 conductivity + U16 fpgaD74CondTemp; ///< Reg 455. D74 Temperature + U08 fpgaD74CondReadCnt; ///< Reg 457. D74 successful read count + U08 fpgaD74CondErrorCnt; ///< Reg 458. D74 error read count } DD_FPGA_SENSORS_T; typedef struct @@ -311,9 +333,9 @@ U08 fpgaD10PumpControl; ///< Reg 121. BiCarb Concentrate Pump Control U16 fpgaD10PumpSpeed; ///< Reg 122. BiCarb Concentrate Pump Speed/RPM Control - U08 fpgaBloodLeakSensorTest; ///< Reg 124. Blood leak sensor test - U08 fpgaBloodLeakUARTControl; ///< Reg 125. Blood leak sensor UART control - U08 fpgaBloodLeakFIFOTx; ///< Reg 126. Blood leak sensor FIFO transmit control + U08 fpgaD42SensorTest; ///< Reg 124. Blood leak sensor test + U08 fpgaD42UARTControl; ///< Reg 125. Blood leak sensor UART control + U08 fpgaD42FIFOTx; ///< Reg 126. Blood leak sensor FIFO transmit control U08 fpgaD5HeaterPWMControl; ///< Reg 127. Primary heater PWM control U08 fpgaD45HeaterPWMControl; ///< Reg 128. Trimmer heater PWM control U08 fpgaNotUsed; ///< Reg 129. Not used @@ -328,6 +350,15 @@ U16 fpgaD10PumpRevCount; ///< Reg 144. Bicarb Concentrate pump revolution count U08 fpgaADCControl; ///< Reg 146. FPGA internal ADC Control register for debugging U08 fpgaGPIOControl; ///< Reg 147. FPGA GPIO control interface + U16 fpgaACRelayPWMLow; ///< Reg 148. Length of time in 10us resoultion that PWM output stays low. + U16 fpgaACRelayPWMPeriod; ///< Reg 150. PWM period for AC relay/heater. + + U16 fpgaD76PumpSpeed; ///< Reg 152. UF Pump Speed/RPM Control + U16 fpgaD76PumpRevCount; ///< Reg 154. UF pump revolution count + U08 fpgaD76PumpControl; ///< Reg 156. UF Pump Control + U08 fpgaConSensD74Control; ///< Reg 157. Conductivity/Temperature Sensors D74 Control registers + U16 fpgaConSensD74_Addrs; ///< Reg 158. D74 Initialization Address register + U32 fpgaConSensD74_Data_In; ///< Reg 160. D74 Initialization data register } FPGA_ACTUATORS_T; #pragma pack(pop) @@ -484,14 +515,14 @@ * The setFPGABCValveStates function sets the DD balancing chamber valve states with a * 8-bit set of states - one bit per valve, with a 1 meaning "energized" and a 0 * meaning "de-energized". The bit positions for these bit states are as follows: - * 0 - V1.\n - * 1 - V2.\n - * 2 - V3.\n - * 3 - V4.\n - * 4 - V5.\n - * 5 - V6.\n - * 6 - V7.\n - * 7 - V8.\n + * 0 - D23.\n + * 1 - D19.\n + * 2 - D25.\n + * 3 - D21.\n + * 4 - D24.\n + * 5 - D20.\n + * 6 - D26.\n + * 7 - D22.\n * @details \b Inputs: none * @details \b Outputs: fpgaActuatorSetPoints.fpgaBCValveControl * @param valveStates bit mask for the balancing chamber valve states @@ -553,13 +584,13 @@ /*********************************************************************//** * @brief * The setFPGAD48PumpControl function sets the controls for - * dialysate out pump (SDP). - * bit 7: TBD - * bit 6: TBD - * bit 5: TBD - * bit 4: TBD - * bit 3: TBD - * bit 1-2: TBD + * dialysate out pump (D48). + * bit 7: Reserved + * bit 6: Reserved + * bit 5: Reserved + * bit 4: Reserved + * bit 3: Reserved + * bit 1-2: Reserved * bit 0: Run (1), stop (0) * @details \b Inputs: none * @details \b Outputs: fpgaActuatorSetPoints.fpgaD48PumpControl @@ -574,13 +605,13 @@ /*********************************************************************//** * @brief * The setFPGAD12PumpControl function sets the controls for - * dialysate In pump (DGP). - * bit 7: TBD - * bit 6: TBD - * bit 5: TBD - * bit 4: TBD - * bit 3: TBD - * bit 1-2: TBD + * De gassing pump (D12). + * bit 7: Reserved + * bit 6: Reserved + * bit 5: Reserved + * bit 4: Reserved + * bit 3: Reserved + * bit 1-2: Reserved * bit 0: Run (1), stop (0) * @details \b Inputs: none * @details \b Outputs: fpgaActuatorSetPoints.fpgaD12PumpControl @@ -622,6 +653,20 @@ /*********************************************************************//** * @brief + * The setFPGAD76PumpSetStepSpeed function sets the step speed period for + * UF D76_Pump. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaD76PumpSpeed + * @param stepSpeed The concentrate pump step speed period + * @return none + *************************************************************************/ +void setFPGAD76PumpSetStepSpeed( U16 stepSpeed ) +{ + fpgaActuatorSetPoints.fpgaD76PumpSpeed = stepSpeed; +} + +/*********************************************************************//** + * @brief * The setFPGAD11PumpControl function sets the DVT concentrate pump 1 * (acid pump) control mode. * bit 7: Park (set in different function) @@ -664,6 +709,27 @@ /*********************************************************************//** * @brief + * The setFPGAD76PumpControl function sets the UF pump + * (D76 pump) control mode. + * bit 7: Park (set in different function) + * bit 6: nSleep + * bit 5: nReset + * bit 4: nEnable + * bit 3: Direction (1=Fwd, 0=Rev) + * bit 0-2: Microstepping resolution + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaD76PumpControl + * @param control UF pump control set + * @return none + *************************************************************************/ +void setFPGAD76PumpControl( U08 control ) +{ + fpgaActuatorSetPoints.fpgaD76PumpControl &= FPGA_CONC_PUMP_PARK_COMMAND; // preserve msb (park command bit) + fpgaActuatorSetPoints.fpgaD76PumpControl |= control; +} + +/*********************************************************************//** + * @brief * The setFPGAD11PumpParkCmd function sets the DVT concentrate pump 1 * (acid pump) park command bit. * bit 7: Park command bit @@ -696,6 +762,22 @@ /*********************************************************************//** * @brief + * The setFPGAD76PumpParkCmd function sets the Ultrafiltration pump + * (D76 pump) park command bit. + * bit 7: Park command bit + * bit 0-6: Other pump control bits (set in different function) + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaD76PumpControl + * @param Park command bit set + * @return none + *************************************************************************/ +void setFPGAD76PumpParkCmd( void ) +{ + fpgaActuatorSetPoints.fpgaD76PumpControl |= FPGA_CONC_PUMP_PARK_COMMAND; // this bit must be cleared after next transmit to prevent continuous park commands +} + +/*********************************************************************//** + * @brief * The setFPGAD17CondReset function resets the FPGA Conductivity * Sensor D17. * @details \b Inputs: none @@ -705,7 +787,7 @@ *************************************************************************/ void setFPGAD17CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD1_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D17_RESET_BIT; } /*********************************************************************//** @@ -719,7 +801,7 @@ *************************************************************************/ void clearFPGAD17CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD1_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D17_RESET_BIT; } /*********************************************************************//** @@ -733,7 +815,7 @@ *************************************************************************/ void setFPGAD17CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD1_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D17_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -747,7 +829,7 @@ *************************************************************************/ void clearFPGAD17CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD1_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D17_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -764,7 +846,7 @@ *************************************************************************/ void setFPGAD17CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD1_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D17_WR_ENABLE_BIT; } /*********************************************************************//** @@ -778,7 +860,7 @@ *************************************************************************/ void clearFPGAD17CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD1_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D17_WR_ENABLE_BIT; } /*********************************************************************//** @@ -795,7 +877,7 @@ *************************************************************************/ void setFPGAD17CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD1_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D17_RD_ENABLE_BIT; } /*********************************************************************//** @@ -809,7 +891,7 @@ *************************************************************************/ void clearFPGAD17CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD1_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D17_RD_ENABLE_BIT; } /*********************************************************************//** @@ -823,7 +905,7 @@ *************************************************************************/ void setFPGAD27CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD2_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D27_RESET_BIT; } /*********************************************************************//** @@ -837,7 +919,7 @@ *************************************************************************/ void clearFPGAD27CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD2_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D27_RESET_BIT; } /*********************************************************************//** @@ -851,7 +933,7 @@ *************************************************************************/ void setFPGAD27CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD2_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D27_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -865,7 +947,7 @@ *************************************************************************/ void clearFPGAD27CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD2_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D27_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -882,7 +964,7 @@ *************************************************************************/ void setFPGAD27CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD2_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D27_WR_ENABLE_BIT; } /*********************************************************************//** @@ -896,7 +978,7 @@ *************************************************************************/ void clearFPGAD27CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD2_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D27_WR_ENABLE_BIT; } /*********************************************************************//** @@ -913,7 +995,7 @@ *************************************************************************/ void setFPGAD27CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_CD2_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control |= FPGA_D27_RD_ENABLE_BIT; } /*********************************************************************//** @@ -927,7 +1009,7 @@ *************************************************************************/ void clearFPGAD27CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_CD2_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD12Control &= ~FPGA_D27_RD_ENABLE_BIT; } /*********************************************************************//** @@ -941,7 +1023,7 @@ *************************************************************************/ void setFPGAD29CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD3_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D29_RESET_BIT; } /*********************************************************************//** @@ -955,7 +1037,7 @@ *************************************************************************/ void clearFPGAD29CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD3_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D29_RESET_BIT; } /*********************************************************************//** @@ -969,7 +1051,7 @@ *************************************************************************/ void setFPGAD29CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD3_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D29_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -983,7 +1065,7 @@ *************************************************************************/ void clearFPGAD29CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD3_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D29_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -1000,7 +1082,7 @@ *************************************************************************/ void setFPGAD29CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD3_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D29_WR_ENABLE_BIT; } /*********************************************************************//** @@ -1014,7 +1096,7 @@ *************************************************************************/ void clearFPGAD29CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD3_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D29_WR_ENABLE_BIT; } /*********************************************************************//** @@ -1031,7 +1113,7 @@ *************************************************************************/ void setFPGAD29CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD3_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D29_RD_ENABLE_BIT; } /*********************************************************************//** @@ -1045,7 +1127,7 @@ *************************************************************************/ void clearFPGAD29CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD3_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D29_RD_ENABLE_BIT; } /*********************************************************************//** @@ -1059,7 +1141,7 @@ *************************************************************************/ void setFPGAD43CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD4_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D43_RESET_BIT; } /*********************************************************************//** @@ -1073,7 +1155,7 @@ *************************************************************************/ void clearFPGAD43CondReset( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD4_RESET_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D43_RESET_BIT; } /*********************************************************************//** @@ -1087,7 +1169,7 @@ *************************************************************************/ void setFPGAD43CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD4_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D43_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -1101,7 +1183,7 @@ *************************************************************************/ void clearFPGAD43CondInitEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD4_INIT_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D43_INIT_ENABLE_BIT; } /*********************************************************************//** @@ -1118,7 +1200,7 @@ *************************************************************************/ void setFPGAD43CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD4_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D43_WR_ENABLE_BIT; } /*********************************************************************//** @@ -1132,7 +1214,7 @@ *************************************************************************/ void clearFPGAD43CondWriteEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD4_WR_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D43_WR_ENABLE_BIT; } /*********************************************************************//** @@ -1149,7 +1231,7 @@ *************************************************************************/ void setFPGAD43CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_CD4_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control |= FPGA_D43_RD_ENABLE_BIT; } /*********************************************************************//** @@ -1163,21 +1245,140 @@ *************************************************************************/ void clearFPGAD43CondReadEnable( void ) { - fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_CD4_RD_ENABLE_BIT; + fpgaActuatorSetPoints.fpgaConSensTD34Control &= ~FPGA_D43_RD_ENABLE_BIT; } /*********************************************************************//** * @brief + * The setFPGAD74CondReset function resets the FPGA Conductivity + * Sensor D74. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @return none + *************************************************************************/ +void setFPGAD74CondReset( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control |= FPGA_D74_RESET_BIT; +} + +/*********************************************************************//** + * @brief + * The clearFPGAD74CondReset function clears the reset of FPGA Conductivity + * Sensor D74. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @return none + *************************************************************************/ +void clearFPGAD74CondReset( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control &= ~FPGA_D74_RESET_BIT; +} + +/*********************************************************************//** + * @brief + * The setFPGAD74CondInitEnable function enables the FPGA Conductivity + * Sensor D74 initialzation procedure. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @return none + *************************************************************************/ +void setFPGAD74CondInitEnable( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control |= FPGA_D74_INIT_ENABLE_BIT; +} + +/*********************************************************************//** + * @brief + * The clearFPGAD74CondInitEnable function clears the init process of FPGA Conductivity + * Sensor D74. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @return none + *************************************************************************/ +void clearFPGAD74CondInitEnable( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control &= ~FPGA_D74_INIT_ENABLE_BIT; +} + +/*********************************************************************//** + * @brief + * The setFPGAD74CondWriteEnable function enables the FPGA Conductivity + * Sensor D74 write transaction. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @warning: The address (setFPGACD74Address) and data (setFPGACD74Data) register + * must be populated before invoking this write enable function to initiate + * write transaction with the sensor. + * @return none + *************************************************************************/ +void setFPGAD74CondWriteEnable( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control |= FPGA_D74_WR_ENABLE_BIT; +} + +/*********************************************************************//** + * @brief + * The clearFPGAD74CondWriteEnable function clears the write enable of FPGA Conductivity + * Sensor D74. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @return none + *************************************************************************/ +void clearFPGAD74CondWriteEnable( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control &= ~FPGA_D74_WR_ENABLE_BIT; +} + +/*********************************************************************//** + * @brief + * The setFPGAD74CondReadEnable function enables the FPGA Conductivity + * Sensor D74 read transaction. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @warning: The address (setFPGACD74Address) register must be populated + * before invoking this read enable function to initiate read transaction + * with the sensor. + * @return none + *************************************************************************/ +void setFPGAD74CondReadEnable( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control |= FPGA_D74_RD_ENABLE_BIT; +} + +/*********************************************************************//** + * @brief + * The clearFPGAD74CondReadEnable function clears the read enable of FPGA Conductivity + * Sensor D74. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param none + * @return none + *************************************************************************/ +void clearFPGAD74CondReadEnable( void ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control &= ~FPGA_D74_RD_ENABLE_BIT; +} + + +/*********************************************************************//** + * @brief * The setFpgaCD12Control function sets the FPGA Conductivity * Sensor control register for CD1&2. - * bit 7: Enables TD2 read transaction (1), address needed - * bit 6: Enables TD2 write transaction (1), address and data needs to be set - * bit 5: Enable TD2 Init procedure (1) - * bit 4: reset TD2 Conduct sensor (1) - * bit 3: Enables TD1 read transaction (1), address needed - * bit 2: Enables TD1 write transaction (1), address and data needs to be set - * bit 1: Enable TD1 Init procedure (1) - * bit 0: reset TD1 Conduct sensor (1) + * bit 7: Enables D27 read transaction (1), address needed + * bit 6: Enables D27 write transaction (1), address and data needs to be set + * bit 5: Enable D27 Init procedure (1) + * bit 4: reset D27 Conduct sensor (1) + * bit 3: Enables D17 read transaction (1), address needed + * bit 2: Enables D17 write transaction (1), address and data needs to be set + * bit 1: Enable D17 Init procedure (1) + * bit 0: reset D17 Conduct sensor (1) * @details \b Inputs: none * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensTD12Control * @param control Conductivity Sensor control set @@ -1192,14 +1393,14 @@ * @brief * The setFpgaCD34Control function sets the FPGA Conductivity * Sensor control register for CD3&4. - * bit 7: Enables TD4 read transaction (1), address needed - * bit 6: Enables TD4 write transaction (1), address and data needs to be set - * bit 5: Enable TD4 Init procedure (1) - * bit 4: reset TD4 Conduct sensor (1) - * bit 3: Enables TD3 read transaction (1), address needed - * bit 2: Enables TD3 write transaction (1), address and data needs to be set - * bit 1: Enable TD3 Init procedure (1) - * bit 0: reset TD3 Conduct sensor (1) + * bit 7: Enables D43 read transaction (1), address needed + * bit 6: Enables D43 write transaction (1), address and data needs to be set + * bit 5: Enable D43 Init procedure (1) + * bit 4: reset D43 Conduct sensor (1) + * bit 3: Enables D29 read transaction (1), address needed + * bit 2: Enables D29 write transaction (1), address and data needs to be set + * bit 1: Enable D29 Init procedure (1) + * bit 0: reset D29 Conduct sensor (1) * @details \b Inputs: none * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensTD34Control * @param control Conductivity sensor control set @@ -1212,6 +1413,25 @@ /*********************************************************************//** * @brief + * The setFpgaCD5Control function sets the FPGA Conductivity + * Sensor control register for CD5. + * bit 4- 7: Reserved. + * bit 3: Enables D74 read transaction (1), address needed + * bit 2: Enables D74 write transaction (1), address and data needs to be set + * bit 1: Enable D74 Init procedure (1) + * bit 0: reset D74 Conduct sensor (1) + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74Control + * @param control Conductivity sensor control set + * @return none + *************************************************************************/ +void setFPGACD5Control( U08 control ) +{ + fpgaActuatorSetPoints.fpgaConSensD74Control = control; +} + +/*********************************************************************//** + * @brief * The setFPGACD12Address function sets the conductivity sensor * CD12 address register to perform read and write operations. * @details \b Inputs: none @@ -1240,6 +1460,20 @@ /*********************************************************************//** * @brief + * The setFPGACD5Address function sets the conductivity sensor + * D74 address register to perform read and write operations. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74_Addrs + * @param address The conductivity sensor CD74 address + * @return none + *************************************************************************/ +void setFPGACD5Address( U16 address ) +{ + fpgaActuatorSetPoints.fpgaConSensD74_Addrs = address; +} + +/*********************************************************************//** + * @brief * The setFPGACD12Data function sets the conductivity sensor * CD12 data outputfor write operations. * @details \b Inputs: none @@ -1268,28 +1502,42 @@ /*********************************************************************//** * @brief - * The setFPGAPrimaryHeaterPWMControl function sets the primary heater + * The setFPGACD5Data function sets the conductivity sensor + * CD5 data outputfor write operations. + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaConSensD74_Data_In + * @param data The conductivity sensor CD74 Data + * @return none + *************************************************************************/ +void setFPGACD5Data( U32 data ) +{ + fpgaActuatorSetPoints.fpgaConSensD74_Data_In = data; +} + +/*********************************************************************//** + * @brief + * The setFPGAD5HeaterPWMControl function sets the primary heater * PWM input. * @details \b Inputs: none * @details \b Outputs: fpgaD5HeaterPWMControl * @param control the PWM dutycycle to control the heater * @return none *************************************************************************/ -void setFPGAPrimaryHeaterPWMControl( U08 control ) +void setFPGAD5HeaterPWMControl( U08 control ) { fpgaActuatorSetPoints.fpgaD5HeaterPWMControl = control; } /*********************************************************************//** * @brief - * The setFPGATrimmerHeaterPWMControl function sets the trimmer heater + * The setFPGAD45HeaterPWMControl function sets the trimmer heater * PWM input. * @details \b Inputs: none * @details \b Outputs: fpgaD45HeaterPWMControl * @param control the PWM dutycycle to control the heater * @return none *************************************************************************/ -void setFPGATrimmerHeaterPWMControl( U08 control ) +void setFPGAD45HeaterPWMControl( U08 control ) { fpgaActuatorSetPoints.fpgaD45HeaterPWMControl = control; } @@ -1324,27 +1572,90 @@ /*********************************************************************//** * @brief - * The setFPGACPrimaryHeaterOnOffControl function sets the primary heater + * The setFPGAD76PumpRevolutionCount function sets the UltraFilteration + * pump revolution count. + * @details \b Inputs: none + * @details \b Outputs: fpgaD76PumpRevCount + * @param count the number of revolution to be rotated for the pump. + * @return none + *************************************************************************/ +void setFPGAD76PumpRevolutionCount( U16 count ) +{ + fpgaActuatorSetPoints.fpgaD76PumpRevCount = count; +} + +/*********************************************************************//** + * @brief + * The setFPGAD5HeaterOnOffControl function sets the primary heater * On/Off control. * @details \b Inputs: none * @details \b Outputs: fpgaGPIOControl * @param flag Turn heater ON when true, otherwise not. * @return none *************************************************************************/ -void setFPGACPrimaryHeaterOnOffControl( BOOL flag ) +void setFPGAD5HeaterOnOffControl( BOOL flag ) { if ( TRUE == flag) { - fpgaActuatorSetPoints.fpgaGPIOControl |= FPGA_PRIMARY_HEATER_CNTRL_BIT; + fpgaActuatorSetPoints.fpgaGPIOControl |= FPGA_D5_HEATER_CNTRL_BIT; } else { - fpgaActuatorSetPoints.fpgaGPIOControl &= ~FPGA_PRIMARY_HEATER_CNTRL_BIT; + fpgaActuatorSetPoints.fpgaGPIOControl &= ~FPGA_D5_HEATER_CNTRL_BIT; } } /*********************************************************************//** * @brief + * The setFPGAD5HeaterPWMEnableControl function sets whether the primary heater + * control based out of On/OFF (0) or PWM based control (1). + * @details \b Inputs: none + * @details \b Outputs: fpgaGPIOControl + * @param enable PWM based heater control when true, otherwise On/Off Control. + * @return none + *************************************************************************/ +void setFPGAD5HeaterPWMEnableControl( BOOL enable ) +{ + if ( TRUE == enable) + { + fpgaActuatorSetPoints.fpgaGPIOControl |= FPGA_D5_HEATER_PWM_ENABLE_BIT; + } + else + { + fpgaActuatorSetPoints.fpgaGPIOControl &= ~FPGA_D5_HEATER_PWM_ENABLE_BIT; + } +} + +/*********************************************************************//** + * @brief + * The setFPGAD5HeaterPWMLowState function sets the PWM low period( Off time) + * for AC heater. + * @details \b Inputs: none + * @details \b Outputs: fpgaACRelayPWMLow + * @param count the number of count that PWM stays low for the AC relay/heater. + * @return none + *************************************************************************/ +void setFPGAD5HeaterPWMLowState( U16 count ) +{ + fpgaActuatorSetPoints.fpgaACRelayPWMLow = count; +} + +/*********************************************************************//** + * @brief + * The setFPGAD5HeaterPWMPeriod function sets the PWM period( On and Off time) + * for AC heater. + * @details \b Inputs: none + * @details \b Outputs: fpgaACRelayPWMPeriod + * @param period the total period of PWM cycle ( On and Off time). + * @return none + *************************************************************************/ +void setFPGAD5HeaterPWMPeriod( U16 period ) +{ + fpgaActuatorSetPoints.fpgaACRelayPWMPeriod = period; +} + +/*********************************************************************//** + * @brief * The getFPGAVersions function gets the FPGA version numbers. * @details \b Inputs: fpgaHeader * @details \b Outputs: none @@ -1554,6 +1865,70 @@ /*********************************************************************//** * @brief + * The getFPGAD76PumpControlStatus function gets the Ultrafilteration pump + * (D76 pump) control mode. + * bit 7: Park (set in different function) + * bit 6: nSleep + * bit 5: nReset + * bit 4: nEnable + * bit 3: Direction (1=Fwd, 0=Rev) + * bit 0-2: Microstepping resolution + * @details \b Inputs: none + * @details \b Outputs: fpgaActuatorSetPoints.fpgaD76PumpControl + * @return UF pump control status bit + *************************************************************************/ +U08 getFPGAD76PumpControlStatus( void ) +{ + return fpgaActuatorSetPoints.fpgaD76PumpControl; +} + +/*********************************************************************//** + * @brief + * The getFPGAUFPumpFault function gets UF pumps fault + * reported by FGPA. + * @details \b Inputs: fpgaSensorReadings.fpgaD76PumpFault + * @details \b Outputs: none + * @return Latest UF pumps fault value + *************************************************************************/ +U08 getFPGAUFPumpFault( void ) +{ + return ( ( fpgaSensorReadings.fpgaD76PumpFault & FPGA_UF_PUMP_FAULT_BIT ) << UF_PUMP_FAULT_SHIFT ); +} + +/*********************************************************************//** + * @brief + * The getFPGAD76PumpIsParked function gets whether the UF pump is currently + * parked. + * @details \b Inputs: fpgaSensorReadings.fpgaD76PumpFault + * @details \b Outputs: none + * @return TRUE if UF pump is parked, FALSE if not + *************************************************************************/ +BOOL getFPGAD76PumpIsParked( void ) +{ + U08 mask = fpgaSensorReadings.fpgaD76PumpFault & FPGA_UF_PUMP_PARKED_BIT; + BOOL result = ( mask > 0 ? TRUE : FALSE ); + + return result; +} + +/*********************************************************************//** + * @brief + * The getFPGAD76PumpParkFault function gets whether the UF pump park command + * has faulted. + * @details \b Inputs: fpgaSensorReadings.fpgaD76PumpFault + * @details \b Outputs: none + * @return TRUE if UF pump park command faulted, FALSE if not + *************************************************************************/ +BOOL getFPGAD76PumpParkFault( void ) +{ + U08 mask = fpgaSensorReadings.fpgaD76PumpFault & FPGA_UF_PUMP_PARK_FAULT_BIT; + BOOL result = ( mask > 0 ? TRUE : FALSE ); + + return result; +} + +/*********************************************************************//** + * @brief * The getFPGAConcentratePumpsFault function gets concentrate pumps fault * reported by FGPA. * @details \b Inputs: fpgaSensorReadings.fpgaD11_D10_PumpFault @@ -1657,6 +2032,19 @@ /*********************************************************************//** * @brief + * The getFPGAD76PumpHallSensePulseWidth function gets UF pump D76_Pump + * hall sense pulse width. + * @details \b Inputs: fpgaSensorReadings.fpgaD76PumpHallSense + * @details \b Outputs: none + * @return ultrafiltration pump D76_Pump hall sense pulse width + *************************************************************************/ +U16 getFPGAD76PumpHallSensePulseWidth( void ) +{ + return fpgaSensorReadings.fpgaD76PumpHallSense; +} + +/*********************************************************************//** + * @brief * The getFPGAValveStates function gets the latest sensed valve states. * See setFPGAValveStates for valve state bit positions. * @details \b Inputs: fpgaSensorReadings.fpgaValveStates @@ -2297,6 +2685,66 @@ /*********************************************************************//** * @brief + * The getFPGAD74CondReadCount function gets D74 conductivity sensor read count. + * @details \b Inputs: fpgaSensorReadings.fpgaD74CondReadCnt + * @details \b Outputs: none + * @return Latest D74 conductivity sensor read count + *************************************************************************/ +U08 getFPGAD74CondReadCount( void ) +{ + return fpgaSensorReadings.fpgaD74CondReadCnt; +} + +/*********************************************************************//** + * @brief + * The getFPGAD74CondErrorCount function gets D74 conductivity sensor error count. + * @details \b Inputs: fpgaSensorReadings.fpgaD74CondErrorCnt + * @details \b Outputs: none + * @return Latest D74 conductivity sensor read error count + *************************************************************************/ +U08 getFPGAD74CondErrorCount( void ) +{ + return fpgaSensorReadings.fpgaD74CondErrorCnt; +} + +/*********************************************************************//** + * @brief + * The getFPGAD74Cond function gets D74 conductivity sensor value. + * @details \b Inputs: fpgaSensorReadings.fpgaD74Cond + * @details \b Outputs: none + * @return Latest D74 conductivity sensor value + *************************************************************************/ +U16 getFPGAD74Cond( void ) +{ + return fpgaSensorReadings.fpgaD74CondCond; +} + +/*********************************************************************//** + * @brief + * The getFPGAD74CondTemp function gets D74 conductivity sensor temperature value. + * @details \b Inputs: fpgaSensorReadings.fpgaD74CondTemp + * @details \b Outputs: none + * @return Latest D74 conductivity sensor temperature value + *************************************************************************/ +U16 getFPGAD74CondTemp( void ) +{ + return fpgaSensorReadings.fpgaD74CondTemp; +} + +/*********************************************************************//** + * @brief + * The getFPGAD74CondData function gets D74 conductivity sensor register value. + * @details \b Inputs: fpgaSensorReadings.fpgaD74CondDataOut + * @details \b Outputs: none + * @return Latest D74 conductivity sensor register data value + *************************************************************************/ +U32 getFPGAD74CondData( void ) +{ + return fpgaSensorReadings.fpgaD74CondDataOut; +} + +/*********************************************************************//** + * @brief * The getFPGAD63LevelSensor function gets the latest FPGA D63 level sensor * reading. * @details \b Inputs: fpgaSensorReadings.fpgaD63LevelSensor @@ -2331,7 +2779,7 @@ *************************************************************************/ U08 getFPGAD6LevelStatus( void ) { - return ( fpgaSensorReadings.fpgaD6FloaterStatus & FPGA_FLOATER_LEVEL_BIT ); + return ( fpgaSensorReadings.fpgaD6FloaterStatus & FPGA_D6_FLOATER_LEVEL_BIT ); } /*********************************************************************//** @@ -2638,6 +3086,19 @@ /*********************************************************************//** * @brief + * The getFPGAD76PumpRevolutionCountStatus function gets the current revolution of + * UF pump (down counter) status. + * @details \b Inputs: fpgaD76PumpStepCountStatus + * @details \b Outputs: none + * @return the current revolution of the UF pump + *************************************************************************/ +U16 getFPGAD76PumpRevolutionCountStatus( void ) +{ + return fpgaSensorReadings.fpgaD76PumpStepCountStatus; +} + +/*********************************************************************//** + * @brief * The checkFPGAAFEOEFailure function increments the FPGA comm failure * windowed timer if an FE or OE error has occurred and returns whether * or not the number of failures in @@ -2669,4 +3130,98 @@ return status; } +// Blood leak functions +/*********************************************************************//** + * @brief + * The getFPGABloodLeakStatus function returns the blood leak sensor's + * blood detection status bit. + * @details Inputs: fpgaSensorReadings + * @details Outputs: none + * @return blood leak sensor self test status bit + *************************************************************************/ +U08 getFPGABloodLeakStatus( void ) +{ + U08 selfTestStatus = fpgaSensorReadings.fpgaD42PulseStatus; + + return selfTestStatus; +} + +/*********************************************************************//** + * @brief + * The setFPGABloodLeakUARTControl function sets the blood leak sensor UART + * control value. + * @details Inputs: none + * @details Outputs: fpgaActuatorSetPoints + * @return none + *************************************************************************/ +void setFPGABloodLeakUARTControl( U08 value ) +{ + fpgaActuatorSetPoints.fpgaD42UARTControl = value; +} + +/*********************************************************************//** + * @brief + * The setFPGABloodLeakUARTTransmit function sets the blood leak sensor UART + * transmit value. + * @details Inputs: none + * @details Outputs: fpgaActuatorSetPoints + * @return none + *************************************************************************/ +void setFPGABloodLeakUARTTransmit( U08 value ) +{ + fpgaActuatorSetPoints.fpgaD42FIFOTx = value; +} + +/*********************************************************************//** + * @brief + * The getFPGABloodLeakTxFIFOCount function returns the blood leak transmit + * FIFO count. + * @details Inputs: fpgaSensorReadings + * @details Outputs: none + * @return fpgaSensorReadings.fpgaD42TxFIFOCnt + *************************************************************************/ +U08 getFPGABloodLeakTxFIFOCount( void ) +{ + return fpgaSensorReadings.fpgaD42TxFIFOCnt; +} + +/*********************************************************************//** + * @brief + * The getFPGABloodLeakRxFIFOCount function returns the blood leak receive + * FIFO count. + * @details Inputs: fpgaSensorReadings + * @details Outputs: none + * @return fpgaSensorReadings.fpgaD42RxFIFOCnt + *************************************************************************/ +U16 getFPGABloodLeakRxFIFOCount( void ) +{ + return fpgaSensorReadings.fpgaD42RxFIFOCnt; +} + +/*********************************************************************//** + * @brief + * The getFPGABloodLeakRxErrorCount function returns the blood leak receive + * error count. + * @details Inputs: fpgaSensorReadings + * @details Outputs: none + * @return fpgaSensorReadings.fpgaD42RxErrorCnt + *************************************************************************/ +U08 getFPGABloodLeakRxErrorCount( void ) +{ + return fpgaSensorReadings.fpgaD42RxErrorCnt; +} + +/*********************************************************************//** + * @brief + * The getFPGABloodLeakRxFIFODataOut function returns the blood leak receive + * FIFO data out. + * @details Inputs: fpgaSensorReadings + * @details Outputs: none + * @return fpgaSensorReadings.fpgaD42RxFIFODataOut + *************************************************************************/ +U08 getFPGABloodLeakRxFIFODataOut( void ) +{ + return fpgaSensorReadings.fpgaD42RxFIFODataOut; +} + /**@}*/