Index: firmware/App/Services/FpgaDD.c =================================================================== diff -u -ra6737c3bcc8286c153b778c2c395f465e76aaafb -rfc63fb0998e49133a69660c3eccf63fd0aba9413 --- firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision a6737c3bcc8286c153b778c2c395f465e76aaafb) +++ firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision fc63fb0998e49133a69660c3eccf63fd0aba9413) @@ -40,23 +40,23 @@ // ********** private definitions ********** /// Macro to retrieve the FPGA sensor field based on HW type -#define GET_FPGA_SENSOR_FIELD(field) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == FALSE ? fpgaSensorReadings.field : fpgaBeta19SensorReadings.field) +#define GET_FPGA_SENSOR_FIELD(field) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ? fpgaSensorReadings.field : fpgaBeta19SensorReadings.field) //#define GET_FPGA_SENSOR_FIELD(field) (fpgaSensorReadings.field) /// Macro to retrieve the FPGA sensor field based on HW type -#define GET_FPGA_ACTUATOR_FIELD(field) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == FALSE ? fpgaActuatorSetPoints.field : fpgaBeta19ActuatorSetPoints.field) +#define GET_FPGA_ACTUATOR_FIELD(field) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ? fpgaActuatorSetPoints.field : fpgaBeta19ActuatorSetPoints.field) //#define GET_FPGA_ACTUATOR_FIELD(field) (fpgaActuatorSetPoints.field) /// Macro to set the FPGA actuator field value based on HW type -#define SET_FPGA_ACTUATOR_FIELD(field, value) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == FALSE ? ( fpgaActuatorSetPoints.field = value ) : ( fpgaBeta19ActuatorSetPoints.field = value )) +#define SET_FPGA_ACTUATOR_FIELD(field, value) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ? ( fpgaActuatorSetPoints.field = value ) : ( fpgaBeta19ActuatorSetPoints.field = value )) //#define SET_FPGA_ACTUATOR_FIELD(field, value) (fpgaActuatorSetPoints.field = value) /// Macro to set the FPGA actuator bits based on HW type -#define SET_FPGA_ACTUATOR_BITS(field, bits) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == FALSE ? ( fpgaActuatorSetPoints.field |= bits ) : ( fpgaBeta19ActuatorSetPoints.field |= bits )) +#define SET_FPGA_ACTUATOR_BITS(field, bits) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ? ( fpgaActuatorSetPoints.field |= bits ) : ( fpgaBeta19ActuatorSetPoints.field |= bits )) //#define SET_FPGA_ACTUATOR_BITS(field, bits) (fpgaActuatorSetPoints.field |= bits) /// Macro to clear the FPGA actuator bits based on HW type -#define CLEAR_FPGA_ACTUATOR_BITS(field, bits) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == FALSE ? ( fpgaActuatorSetPoints.field &= bits ) : ( fpgaBeta19ActuatorSetPoints.field &= bits )) +#define CLEAR_FPGA_ACTUATOR_BITS(field, bits) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ? ( fpgaActuatorSetPoints.field &= bits ) : ( fpgaBeta19ActuatorSetPoints.field &= bits )) //#define CLEAR_FPGA_ACTUATOR_BITS(field, bits) (fpgaActuatorSetPoints.field &= bits) #define FPGA_EXPECTED_ID 0x06 ///< FPGA expected ID for Beta 2 systems. @@ -1193,6 +1193,20 @@ /*********************************************************************//** * @brief + * The setFPGAD92PumpSetStepSpeed function sets the step speed period for + * HDF D92_Pump. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92PumpSpeed + * @param stepSpeed The HDF pump step speed period + * @return none + *************************************************************************/ +void setFPGAD92PumpSetStepSpeed( U32 stepSpeed ) +{ + fpgaActuatorSetPoints.fpgaD92PumpSpeed = stepSpeed; +} + +/*********************************************************************//** + * @brief * The setFPGAD11PumpControl function sets the DVT concentrate pump 1 * (acid pump) control mode. * bit 7: Park (set in different function) @@ -1256,6 +1270,26 @@ /*********************************************************************//** * @brief + * The setFPGAD92PumpControl function sets the UF pump + * (D76 pump) control mode. + * bit 7: Park (set in different function) + * bit 6: nSleep + * bit 5: nReset + * bit 4: nEnable + * bit 3: Direction (1=Fwd, 0=Rev) + * bit 0-2: Microstepping resolution + * @details \b Inputs: none + * @details \b Outputs: fpgaD76PumpControl + * @param control UF pump control set + * @return none + *************************************************************************/ +void setFPGAD92PumpControl( U08 control ) +{ + fpgaActuatorSetPoints.fpgaD92PumpControl &= 0x80; // preserve msb (park command bit) + fpgaActuatorSetPoints.fpgaD92PumpControl |= control; +} +/*********************************************************************//** + * @brief * The setFPGAD11PumpParkCmd function sets the DVT concentrate pump 1 * (acid pump) park command bit. * bit 7: Park command bit @@ -1374,6 +1408,19 @@ /*********************************************************************//** * @brief + * The setFPGAD92PumpRevolutionCount function sets the HDF + * pump revolution count. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92PumpRevCount + * @param count the number of revolution to be rotated for the pump. + * @return none + *************************************************************************/ +void setFPGAD92PumpRevolutionCount( U32 count ) +{ + fpgaActuatorSetPoints.fpgaD92PumpRevCount = count; +} +/*********************************************************************//** + * @brief * The setFPGAD5HeaterOnOffControl function sets the primary heater * On/Off control. * @details \b Inputs: none @@ -1672,6 +1719,25 @@ /*********************************************************************//** * @brief + * The getFPGAD76PumpControlStatus function gets the Ultrafilteration pump + * (D76 pump) control mode. + * bit 7: Park (set in different function) + * bit 6: nSleep + * bit 5: nReset + * bit 4: nEnable + * bit 3: Direction (1=Fwd, 0=Rev) + * bit 0-2: Microstepping resolution + * @details \b Inputs: none + * @details \b Outputs: fpgaD76PumpControl + * @return UF pump control status bit + *************************************************************************/ +U08 getFPGAD92PumpControlStatus( void ) +{ + return fpgaActuatorSetPoints.fpgaD92PumpControl; +} + +/*********************************************************************//** + * @brief * The getFPGAUFPumpFault function gets UF pumps fault * reported by FGPA. * @details \b Inputs: fpgaD76PumpFault @@ -2518,13 +2584,13 @@ U16 result; #if 1 // Remove when Beta 1.9 is obsolete - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) == TRUE ) { - result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & BIT( BIT1 ) ) >> BIT1; + result = fpgaBeta19SensorReadings.fpgaD63LevelSensor; } else { - result = fpgaBeta19SensorReadings.fpgaD63LevelSensor; + result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & BIT( BIT1 ) ) >> BIT1; } #else result = GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); @@ -2546,13 +2612,13 @@ U16 result; #if 1 // Remove when Beta 1.9 is obsolete - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) == TRUE ) { - result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & BIT( BIT2 ) ) >> BIT2; + result = fpgaBeta19SensorReadings.fpgaD98LevelSensor; } else { - result = fpgaBeta19SensorReadings.fpgaD98LevelSensor; + result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & BIT( BIT2 ) ) >> BIT2; } #else result = GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); @@ -2574,13 +2640,13 @@ U16 result; #if 1 // Remove when Beta 1.9 is obsolete - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) == TRUE ) { - result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & BIT ( BIT0 ) ) >> BIT0; + result = fpgaBeta19SensorReadings.fpgaD46LevelSensor; } else { - result = fpgaBeta19SensorReadings.fpgaD46LevelSensor; + result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & BIT ( BIT0 ) ) >> BIT0; } #else result = GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); @@ -2614,7 +2680,7 @@ { U08 result; #if 1 // Remove when Beta 1.9 is obsolete - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.fpgaConductiveLevelStatus; } @@ -2741,7 +2807,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.fpgaIOExpReadCount; } @@ -2761,7 +2827,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.fpgaIOExpERrorCount; } @@ -2780,7 +2846,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.fpgaHallSensorStatus; } @@ -2799,7 +2865,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.fpgaGPIOStatus; } @@ -2851,7 +2917,7 @@ { U32 result = 0UL; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.tempTax1; } @@ -2870,7 +2936,7 @@ { U32 result = 0UL; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.tempRTD; } @@ -2890,7 +2956,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.ad7124readcnt; } @@ -2910,7 +2976,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.ad7124errcnt; } @@ -3618,7 +3684,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.p7flowReadCount; } @@ -3638,7 +3704,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.p7flowErrorCount; } @@ -3658,7 +3724,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.p16flowReadCount; } @@ -3678,7 +3744,7 @@ { U08 result = 0U; - if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) + if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_9_HW ) != TRUE ) { result = fpgaSensorReadings.p16flowErrorCount; }