Index: firmware/App/Services/FpgaDD.c =================================================================== diff -u -rcfa8ae21594d3471c37079eb708761fe9a047776 -rf66ffb2807dae4ad719d41520bc8c3739210bfd0 --- firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision cfa8ae21594d3471c37079eb708761fe9a047776) +++ firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision f66ffb2807dae4ad719d41520bc8c3739210bfd0) @@ -112,9 +112,6 @@ #define FPGA_D12_PUMP_ERROR_BIT 0x01 ///< Fresh dialysate pump error bit mask. #define FPGA_D48_PUMP_ERROR_BIT 0x02 ///< Spent dialysate pump error bit mask. #define FPGA_FLOATER_LEVEL_BIT 0x0F ///< Floater level bit mask(D6 and P25). -#define FPGA_D46_LEVEL_BIT 0x01 ///< D46 conductive level sensor bit mask. -#define FPGA_D63_LEVEL_BIT 0x02 ///< D63 conductive level sensor bit mask. -#define FPGA_D98_LEVEL_BIT 0x04 ///< D98 conductive level sensor bit mask. #define FPGA_D5_HEATER_CNTRL_BIT 0x01 ///< FPGA GIO D5 heater control bit mask #define FPGA_D5_HEATER_PWM_ENABLE_BIT 0x02 ///< FPGA D5 PWM based heater control bit mask @@ -147,7 +144,7 @@ U08 fpgaRevLab; ///< Reg 3. FPGA revision (lab) being reported } FPGA_HEADER_T; // read only on FPGA -// Remove when Beta 1.9 is obsolete +#if 1 // Remove when Beta 1.9 is obsolete /// FPGA sensor readings struct. typedef struct { @@ -286,7 +283,9 @@ U16 fpgaD74CondTemp; ///< Reg 756. D74 Temperature U08 fpgaD74CondReadCnt; ///< Reg 758. D74 successful read count U08 fpgaD74CondErrorCnt; ///< Reg 759. D74 error read count + } DD_FPGA_SENSORS_BETA_1_9_T; +#endif typedef struct { @@ -350,7 +349,7 @@ U16 fpgaAvailableRegister5; ///< Reg 614. Available register 5 U16 fpgaD76PumpStepCountStatus; ///< Reg 616. UF pump revolution down count status U08 fpgaD76PumpFault; ///< Reg 618: UF pump fault - U08 fpgaHallSensorStatus; ///< reg 619: Hall sensor status + U08 fpgaHallSensorStatus; ///< Reg 619: HDF Hall sensor status S16 pressureP46; ///< Reg 620. P46 pressure data. U16 temperatureP46; ///< Reg 622. P46 temperature data. @@ -451,7 +450,7 @@ U08 fpgaP18CalMemCounter; ///< Reg 820. TBD } DD_FPGA_SENSORS_T; -// Remove when Beta 1.9 is obsolete +#if 1 // Remove when Beta 1.9 is obsolete typedef struct { U16 fpgaValveControl; ///< Reg 04. Valve control register @@ -530,6 +529,7 @@ U16 fpgaConSensD43_Addrs; ///< Reg 119. D43 Initialization Address register U32 fpgaConSensD43_Data_In; ///< Reg 121. D43 Initialization data register } FPGA_ACTUATORS_BETA_1_9_T; +#endif typedef struct { @@ -608,7 +608,7 @@ U08 fpgaConSensD43Control; ///< Reg 118. Conductivity/Temperature Sensors D43 Control registers U16 fpgaConSensD43_Addrs; ///< Reg 119. D43 Initialization Address register U32 fpgaConSensD43_Data_In; ///< Reg 121. D43 Initialization data register - U08 unsuedRegister; ///< Reg 125. Unused register. + U08 unusedRegister3; ///< Reg 125. Unused register 3 U32 fpgaD11PumpSpeed; ///< Reg 126. Acid Concentrate Pump Speed/RPM Control U32 fpgaD10PumpSpeed; ///< Reg 130. BiCarb Concentrate Pump Speed/RPM Control U32 fpgaD76PumpSpeed; ///< Reg 134. UF Pump Speed/RPM Control @@ -828,12 +828,15 @@ * @brief * The setFPGASpareValveStates function sets the DD spare valve states with a * 8-bit set of states - one bit per valve, with a 1 meaning "energized" and a 0 - * meaning "de-energized". The bit positions for these bit states are as follows: - * 0 - Not used.\n - * 1 - Not used.\n - * 2 - Not used.\n - * 3 - Not used.\n - * 4..7 - Unused or reserved.\n + * meaning "de-energized". Bit positions per HDD (2.0 valves - beta 1/1.9 to be deprecated): + * 0 - D88 valve (Spare valve 0).\n + * 1 - D83 valve (Spare valve 1).\n + * 2 - D91 valve (Spare valve 2).\n + * 3 - D104 valve (Spare valve 3).\n + * 4 - D95 valve (Spare valve 4).\n + * 5 - Spare valve 5.\n + * 6 - D100 valve (Spare valve 6).\n + * 7 - Spare valve 7.\n * @details \b Inputs: none * @details \b Outputs: fpgaDDSpareValveControl * @param valveStates bit mask for the spare valve states @@ -1068,7 +1071,7 @@ *************************************************************************/ void setFPGAD48PumpSpeed( U16 speed ) { -#ifdef __MAXON_SPEED_UPDATE__ +#ifdef __MAXON_SPEED_UPDATE__ /* Enable for B1.0/B1.9 with Diener Silencer 2000 pumps */ { U16 currentSpeed =(U16)( ( ( speed + PUMP_SPEED_OFFSET ) / PUMP_SPEED_FULL_SCALE ) * MAX_PUMP_SPEED ); SET_FPGA_ACTUATOR_FIELD( fpgaD48PumpSpeed, currentSpeed ); @@ -1091,7 +1094,7 @@ *************************************************************************/ void setFPGAD12PumpSpeed( U16 speed ) { -#ifdef __MAXON_SPEED_UPDATE__ +#ifdef __MAXON_SPEED_UPDATE__ /* Enable for B1.0/B1.9 with Diener Silencer 2000 pumps */ { U16 currentSpeed =(U16)( ( ( speed + PUMP_SPEED_OFFSET ) / PUMP_SPEED_FULL_SCALE ) * MAX_PUMP_SPEED ); SET_FPGA_ACTUATOR_FIELD( fpgaD12PumpSpeed, currentSpeed ); @@ -3072,21 +3075,18 @@ *************************************************************************/ U16 getFPGAD63LevelSensor( void ) { - U08 result; #if 1 // Remove when Beta 1.9 is obsolete if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) { - result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & FPGA_D63_LEVEL_BIT ); + return fpgaSensorReadings.fpgaConductiveLevelStatus; } else { - result = fpgaBeta19SensorReadings.fpgaD63LevelSensor; + return fpgaBeta19SensorReadings.fpgaD63LevelSensor; } #else - result = GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); + return GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); #endif - - return result; } /*********************************************************************//** @@ -3099,21 +3099,18 @@ *************************************************************************/ U16 getFPGAD98LevelSensor( void ) { - U08 result; #if 1 // Remove when Beta 1.9 is obsolete if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) { - result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & FPGA_D98_LEVEL_BIT ); + return fpgaSensorReadings.fpgaConductiveLevelStatus; } else { - result = fpgaBeta19SensorReadings.fpgaD98LevelSensor; + return fpgaBeta19SensorReadings.fpgaD98LevelSensor; } #else - result = GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); + return GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); #endif - - return result; } /*********************************************************************//** @@ -3126,21 +3123,18 @@ *************************************************************************/ U16 getFPGAD46LevelSensor( void ) { - U08 result; #if 1 // Remove when Beta 1.9 is obsolete if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) { - result = ( fpgaSensorReadings.fpgaConductiveLevelStatus & FPGA_D46_LEVEL_BIT ); + return fpgaSensorReadings.fpgaConductiveLevelStatus; } else { - result = fpgaBeta19SensorReadings.fpgaD46LevelSensor; + return fpgaBeta19SensorReadings.fpgaD46LevelSensor; } #else - result = GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); + return GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); #endif - - return result; } /*********************************************************************//** @@ -3166,21 +3160,18 @@ *************************************************************************/ U08 getFPGAFloater2Status( void ) { - U08 result; #if 1 // Remove when Beta 1.9 is obsolete if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ) { - result = fpgaSensorReadings.fpgaConductiveLevelStatus; + return fpgaSensorReadings.fpgaConductiveLevelStatus; } else { - result = fpgaBeta19SensorReadings.fpgaFloater2Status; + return fpgaBeta19SensorReadings.fpgaFloater2Status; } #else - result = GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); + return GET_FPGA_SENSOR_FIELD( fpgaConductiveLevelStatus ); #endif - - return result; } /*********************************************************************//**