Index: firmware/App/Services/FpgaDD.c
===================================================================
diff -u -re39cba3641902ed9c670f1ca7499f0b25b59bef1 -rb85c96bbdc61bfd3a3b8dfb3b538cbacd497cf6e
--- firmware/App/Services/FpgaDD.c	(.../FpgaDD.c)	(revision e39cba3641902ed9c670f1ca7499f0b25b59bef1)
+++ firmware/App/Services/FpgaDD.c	(.../FpgaDD.c)	(revision b85c96bbdc61bfd3a3b8dfb3b538cbacd497cf6e)
@@ -59,7 +59,9 @@
 #define CLEAR_FPGA_ACTUATOR_BITS(field, bits) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ? ( fpgaActuatorSetPoints.field &= bits ) : ( fpgaBeta19ActuatorSetPoints.field &= bits ))
 //#define CLEAR_FPGA_ACTUATOR_BITS(field, bits) (fpgaActuatorSetPoints.field &= bits)
 
-#define FPGA_EXPECTED_ID                0x04                    ///< FPGA expected ID.
+#define FPGA_EXPECTED_ID                0x06                    ///< FPGA expected ID for Beta 2 systems.
+//TODO: Remove once Beta 1.9 is obsolete
+#define FPGA_BETA_1_9_EXPECTED_ID   0X04                        ///< FPGA expected ID for Beta 1 and 1.9 systems.
 
 #define MAX_COMM_ERROR_RETRIES          5                       ///< Maximum number of communication error retries
 
@@ -134,7 +136,7 @@
 #define FPGA_D42_BLOOD_LEAK_STATUS_MASK         0x04            ///< Bit mask for blood leak detector.
 #define FPGA_D42_BLOOD_LEAK_ST_BIT_INDEX        2               ///< Bit index for the blood leak self test status bit.
 
-#define GPIO_AC_SWITCH_MASK                     0x10U           ///< AC switch status bit mask.
+#define GPIO_AC_SWITCH_MASK                     0x01U           ///< AC switch status bit mask.
 #define FPGA_GPIO_LEAK_SENSOR_MASK              0x02U           ///< GPIO_Status Bit 1 per HDD.
 
 #define MAX_PUMP_SPEED                          3000.0F         ///< Maxon controller pump maximum speed
@@ -236,6 +238,7 @@
     U08 fpgaD76PumpFault;                       ///< Reg 658: UF pump fault
     U08 fpga_UnUsed_3;                          ///< reg 659: Not used
 
+    //TODO: Change the variable names to start with fpga as the prefix.
     S16 pressureP46;                            ///< Reg 660.  P46 pressure data.
     U16 temperatureP46;                         ///< Reg 662.  P46 temperature data.
     S16 pressureM3;                             ///< Reg 664.  M3 pressure data.
@@ -662,7 +665,7 @@
     fpgaActuatorSetPoints.fpgaDDSpareValvePWMControl    = FPGA_ENABLE_UF_VALVES_PWM;
     fpgaActuatorSetPoints.fpgaADCControl                = FPGA_ADC_AUTO_READ_ENABLE;
 
-#if 1    // TODO: Remove when Beta 1.9 is obsolete
+    // TODO: Remove when Beta 1.9 is obsolete
     // Set the valve control mode and default state of valve for Beta 1.9 HW
     fpgaBeta19ActuatorSetPoints.fpgaValveControl              = FPGA_ENABLE_VALVES_CONTROL;
     fpgaBeta19ActuatorSetPoints.fpgaValvePWMEnable            = FPGA_ENABLE_VALVES_PWM;
@@ -671,7 +674,6 @@
     fpgaBeta19ActuatorSetPoints.fpgaDDSpareValveControl       = FPGA_ENABLE_SPARE_VALVES_CNTRL;
     fpgaBeta19ActuatorSetPoints.fpgaDDSpareValvePWMControl    = FPGA_ENABLE_UF_VALVES_PWM;
     fpgaBeta19ActuatorSetPoints.fpgaADCControl                = FPGA_ADC_AUTO_READ_ENABLE;
-#endif
 
     // initialize FPGA clock speed error time windowed count
     initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_COMM_FAILURES, MAX_FPGA_COMM_FAILURES, MAX_FPGA_COMM_FAILURES_WINDOW_MS);
@@ -715,7 +717,8 @@
     SELF_TEST_STATUS_T result;
 
     // check FPGA reported correct ID
-    if ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId )
+    // TODO: Remove beta 1.9 expected ID once Beta 1.9 is obsolete
+    if ( ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId ) || ( FPGA_BETA_1_9_EXPECTED_ID == fpgaHeader.fpgaId ) )
     {
         // Check FPGA compatibility w/ firmware
         if ( DD_FPGA_COMPATIBILITY_REV == GET_FPGA_SENSOR_FIELD( fpgaCompatibilityRev ) )
@@ -3374,19 +3377,6 @@
 
 /*********************************************************************//**
  * @brief
- * The getGPIOStatusFromFPGA function returns the latest GPIO status register
- * value reported by the DD FPGA.
- * @details \b Inputs: fpgaSensorReadings.fpgaGPIOStatus (via FpgaDD service)
- * @details \b Outputs: none
- * @return GPIO status register value (bit-mapped per HDD definition)
- *************************************************************************/
-U08 getGPIOStatusFromFPGA( void )
-{
-    return getFPGAGPIOStatus();
-}
-
-/*********************************************************************//**
- * @brief
  * The getACSwitchStatus function returns the AC switch (concentrate cap
  * switch) status from the FPGA GPIO register.
  * @details \b Inputs: fpgaSensorReadings.fpgaGPIOStatus (via getGPIOStatusFromFPGA)
@@ -3395,7 +3385,7 @@
  *************************************************************************/
 BOOL getACSwitchStatus( void )
 {
-    U08 gpioStatus = getGPIOStatusFromFPGA();
+    U08 gpioStatus = getFPGAGPIOStatus();
     BOOL isAsserted = ( ( gpioStatus & GPIO_AC_SWITCH_MASK ) == 0U ) ? TRUE : FALSE;
 
     return isAsserted;