Index: firmware/source/can.c =================================================================== diff -u -r6e61eeb9768451dc1390037ff83bcbfbbbaf01ca -r61ae50ebf0659ebf2deb9c68b2101d7d8d6a9688 --- firmware/source/can.c (.../can.c) (revision 6e61eeb9768451dc1390037ff83bcbfbbbaf01ca) +++ firmware/source/can.c (.../can.c) (revision 61ae50ebf0659ebf2deb9c68b2101d7d8d6a9688) @@ -129,6 +129,7 @@ | (uint32)0x00002000U | (uint32)0x00004000U | (uint32)0x00008000U + | (uint32)0x00010000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)0x00000000U @@ -143,7 +144,6 @@ | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)0x00000000U - | (uint32)0x00000000U | (uint32)0x00000000U; canREG1->INTMUXx[1U] = (uint32)0x00000000U @@ -449,6 +449,44 @@ canREG1->IF2CMD = (uint8) 0xF8U; canREG1->IF2NO = 14U; + /** - Initialize message 15 + * - Wait until IF1 is ready for use + * - Set message mask + * - Set message control word + * - Set message arbitration + * - Set IF1 control byte + * - Set IF1 message number + */ + /*SAFETYMCUSW 28 D MR:NA "Potentially infinite loop found - Hardware Status check for execution sequence" */ + while ((canREG1->IF1STAT & 0x80U) ==0x80U) + { + } /* Wait */ + + canREG1->IF1MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x20000000U | (uint32)((uint32)((uint32)0x40U & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF1MCTL = 0x00001000U | (uint32)0x00000800U | (uint32)0x00000000U | (uint32)0x00000080U | (uint32)8U; + canREG1->IF1CMD = (uint8) 0xF8U; + canREG1->IF1NO = 15U; + + /** - Initialize message 16 + * - Wait until IF2 is ready for use + * - Set message mask + * - Set message control word + * - Set message arbitration + * - Set IF2 control byte + * - Set IF2 message number + */ + /*SAFETYMCUSW 28 D MR:NA "Potentially infinite loop found - Hardware Status check for execution sequence" */ + while ((canREG1->IF2STAT & 0x80U) ==0x80U) + { + } /* Wait */ + + canREG1->IF2MSK = 0xC0000000U | (uint32)((uint32)((uint32)0x000007FFU & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2ARB = (uint32)0x80000000U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)((uint32)((uint32)0x41U & (uint32)0x000007FFU) << (uint32)18U); + canREG1->IF2MCTL = 0x00001000U | (uint32)0x00000400U | (uint32)0x00000000U | (uint32)0x00000000U | (uint32)8U; + canREG1->IF2CMD = (uint8) 0xF8U; + canREG1->IF2NO = 16U; + /** - Setup IF1 for data transmission * - Wait until IF1 is ready for use * - Set IF1 control byte