Index: firmware/App/Monitors/Level.c
===================================================================
diff -u -r50144ec3e96785cf76d5bfd22ee65029c82e732b -r3393de3377c15fcbe223326fed40a840f16d7ce9
--- firmware/App/Monitors/Level.c	(.../Level.c)	(revision 50144ec3e96785cf76d5bfd22ee65029c82e732b)
+++ firmware/App/Monitors/Level.c	(.../Level.c)	(revision 3393de3377c15fcbe223326fed40a840f16d7ce9)
@@ -36,6 +36,10 @@
 #define FPGA_LEVEL_LOW                      2                                                       ///< Floater low level status
 #define FPGA_LEVEL_MEDIUM                   0                                                       ///< Floater medium level status
 #define FPGA_LEVEL_HIGH                     4                                                       ///< Floater high level status
+#define FPGA_B2_LEVEL_EMPTY                 0xB                                                      ///< Floater empty level status for beta 2.0
+#define FPGA_B2_LEVEL_LOW                   0xA                                                      ///< Floater low level status for beta 2.0
+#define FPGA_B2_LEVEL_MEDIUM                8                                                       ///< Floater medium level status for beta 2.0
+#define FPGA_B2_LEVEL_HIGH                  0xC                                                      ///< Floater high level status for beta 2.0
 #define LEVEL_COUNT_LOW                     0xFFFF                                                  ///< Level sensor count when fluid level is low or non submerged
 #define LEVEL_COUNT_HIGH_START              0x0000                                                  ///< Start range of level sensor count when fluid level is high or submerged
 #define LEVEL_COUNT_HIGH_END                0x2FFF                                                  ///< End range of level sensor count when fluid level is high or submerged
@@ -270,7 +274,7 @@
     if ( D6_LEVL == levelId )
     {
        levelStatus = getFPGAD6LevelStatus();
-       if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE )
+       if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE && getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) != TRUE )
        {
            // Beta 1.9 behavior
            if ( FPGA_LEVEL_EMPTY == levelStatus )
@@ -295,6 +299,31 @@
                currentLevelStatus = LEVEL_STATE_ILLEGAL;
            }
        }
+       else if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE )
+       {
+           // Beta 2.0 behavior
+           if ( FPGA_B2_LEVEL_EMPTY == levelStatus )
+           {
+               currentLevelStatus = LEVEL_STATE_EMPTY;
+           }
+           else if ( FPGA_B2_LEVEL_LOW == levelStatus )
+           {
+               currentLevelStatus = LEVEL_STATE_LOW;
+           }
+           else if ( FPGA_B2_LEVEL_MEDIUM == levelStatus )
+           {
+               currentLevelStatus = LEVEL_STATE_MEDIUM;
+           }
+           else if ( FPGA_B2_LEVEL_HIGH == levelStatus )
+           {
+               currentLevelStatus = LEVEL_STATE_HIGH;
+           }
+           else
+           {
+               // TODO - Handle invalid level alarm
+               currentLevelStatus = LEVEL_STATE_ILLEGAL;
+           }
+       }
        else
        {
            // Beta 1.0 behavior
@@ -322,7 +351,7 @@
     {
        levelStatus = getFPGAP25FloaterState();
 
-       if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE )
+       if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_1_0_HW ) != TRUE && getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) != TRUE)
        {
            // Beta 1.9 behavior
            if ( FPGA_LEVEL_EMPTY == levelStatus )
@@ -347,6 +376,31 @@
                currentLevelStatus = LEVEL_STATE_ILLEGAL;
            }
        }
+       else if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE )
+      {
+          // Beta 2.0 behavior
+          if ( FPGA_B2_LEVEL_EMPTY == levelStatus )
+          {
+              currentLevelStatus = LEVEL_STATE_EMPTY;
+          }
+          else if ( FPGA_B2_LEVEL_LOW == levelStatus )
+          {
+              currentLevelStatus = LEVEL_STATE_LOW;
+          }
+          else if ( FPGA_B2_LEVEL_MEDIUM == levelStatus )
+          {
+              currentLevelStatus = LEVEL_STATE_MEDIUM;
+          }
+          else if ( FPGA_B2_LEVEL_HIGH == levelStatus )
+          {
+              currentLevelStatus = LEVEL_STATE_HIGH;
+          }
+          else
+          {
+              // TODO - Handle invalid level alarm
+              currentLevelStatus = LEVEL_STATE_ILLEGAL;
+          }
+      }
        else
        {
            // Beta 1.0 behavior
Index: firmware/App/Services/FpgaDD.c
===================================================================
diff -u -r0845b50300f9dd52f4b456f428972426b02fe39d -r3393de3377c15fcbe223326fed40a840f16d7ce9
--- firmware/App/Services/FpgaDD.c	(.../FpgaDD.c)	(revision 0845b50300f9dd52f4b456f428972426b02fe39d)
+++ firmware/App/Services/FpgaDD.c	(.../FpgaDD.c)	(revision 3393de3377c15fcbe223326fed40a840f16d7ce9)
@@ -610,18 +610,9 @@
  *************************************************************************/
 void initFPGADD( void )
 {
-    if ( getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) != TRUE )
-     {
-        // Initialize fpga driver
-        initFPGA( (U08*)&fpgaHeader, (U08*)&fpgaSensorReadings, (U08*)&fpgaActuatorSetPoints,
+    // Initialize fpga driver
+    initFPGA( (U08*)&fpgaHeader, (U08*)&fpgaSensorReadings, (U08*)&fpgaActuatorSetPoints,
               sizeof(FPGA_HEADER_T), sizeof(DD_FPGA_SENSORS_T), sizeof(FPGA_ACTUATORS_T) );
-     }
-    else
-    {
-        // Initialize fpga driver for beta 2 hardware
-        initFPGA( (U08*)&fpgaHeader, (U08*)&fpgaSensorReadings, (U08*)&fpgaActuatorSetPoints,
-                  sizeof(FPGA_HEADER_T), sizeof(DD_FPGA_SENSORS_BETA_2_T), sizeof(FPGA_ACTUATORS_BETA_2_T) );
-    }
 
     // initialize fpga data structures
     memset( &fpgaHeader, 0, sizeof( FPGA_HEADER_T ) );
@@ -643,6 +634,29 @@
 
 /*********************************************************************//**
  * @brief
+ * The initFPGAPerHW function initializes the DD FPGA registers.
+ * @details \b Inputs: none
+ * @details \b Outputs: FPGA registers initialized.
+ * @return none
+ *************************************************************************/
+void initFPGAPerHW( BOOL isHWBeta2 )
+{
+    if ( isHWBeta2 != TRUE )
+    {
+        // Initialize fpga driver
+        initFPGA( (U08*)&fpgaHeader, (U08*)&fpgaSensorReadings, (U08*)&fpgaActuatorSetPoints,
+                  sizeof(FPGA_HEADER_T), sizeof(DD_FPGA_SENSORS_T), sizeof(FPGA_ACTUATORS_T) );
+    }
+    else
+    {
+        // Initialize fpga driver for beta 2 hardware
+        initFPGA( (U08*)&fpgaHeader, (U08*)&fpgaSensorReadings, (U08*)&fpgaActuatorSetPoints,
+                  sizeof(FPGA_HEADER_T), sizeof(DD_FPGA_SENSORS_BETA_2_T), sizeof(FPGA_ACTUATORS_BETA_2_T) );
+    }
+}
+
+/*********************************************************************//**
+ * @brief
  * The execFPGATest function executes the FPGA self-test.
  * @details \b Inputs: fpgaHeader
  * @details \b Outputs: none
Index: firmware/App/Services/FpgaDD.h
===================================================================
diff -u -r50144ec3e96785cf76d5bfd22ee65029c82e732b -r3393de3377c15fcbe223326fed40a840f16d7ce9
--- firmware/App/Services/FpgaDD.h	(.../FpgaDD.h)	(revision 50144ec3e96785cf76d5bfd22ee65029c82e732b)
+++ firmware/App/Services/FpgaDD.h	(.../FpgaDD.h)	(revision 3393de3377c15fcbe223326fed40a840f16d7ce9)
@@ -33,6 +33,7 @@
 // ********** public function prototypes **********
 
 void initFPGADD( void );
+void initFPGAPerHW( BOOL isHWBeta2 );
 void execFPGAClockSpeedTest( void );
 SELF_TEST_STATUS_T execFPGATest( void );