Index: firmware/App/Controllers/ConcentratePumps.c =================================================================== diff -u -r145fd716a856f864f39fb0f9884865f6e45b9256 -r3701c29d97c1b1571d41732ad7fba58ace4b75d7 --- firmware/App/Controllers/ConcentratePumps.c (.../ConcentratePumps.c) (revision 145fd716a856f864f39fb0f9884865f6e45b9256) +++ firmware/App/Controllers/ConcentratePumps.c (.../ConcentratePumps.c) (revision 3701c29d97c1b1571d41732ad7fba58ace4b75d7) @@ -92,6 +92,13 @@ CONCENTRATE_PUMP_CONTROL_REVERSE_DIR | CONCENTRATE_PUMP_CONTROL_EIGHTH_STEP; ///< Concentrate pump control reverse. +/* + * + * + * + * + * */ + /// Enumeration of concentrate pump states. typedef enum ConcentratePumpState { Index: firmware/App/Services/FpgaDD.c =================================================================== diff -u -rd47b9bcbd4796a8c51d9e87436422c5868292ac6 -r3701c29d97c1b1571d41732ad7fba58ace4b75d7 --- firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision d47b9bcbd4796a8c51d9e87436422c5868292ac6) +++ firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 3701c29d97c1b1571d41732ad7fba58ace4b75d7) @@ -557,12 +557,20 @@ U08 fpgaBCValvePWMControl; ///< Reg 15. Balancing Chamber Valves PWM control U08 fpgaDDSpareValveControl; ///< Reg 16. Spare Valves Control Registers U08 fpgaDDSpareValvePWMControl; ///< Reg 17. Spare Valves PWM control - U08 fpgaConSensD17D74Control; ///< Reg 18. Conductivity/Temperature Sensors D17 & D74 Control registers - U08 fpgaConSensD27D29Control; ///< Reg 19. Conductivity/Temperature Sensors D27 & D29 Control registers - U16 fpgaConSensD17D74_Addrs; ///< Reg 20. D17,D74 Initialization Address register - U32 fpgaConSensD17D74_Data_In; ///< Reg 22. D17,D74 Initialization data register - U16 fpgaConSensD27D29_Addrs; ///< Reg 26. D27,D29 Initialization Address register - U32 fpgaConSensD27D29_Data_In; ///< Reg 28. D27,D29 Initialization data register + U08 fpgaD10D11CTRL1Reg; ///< Reg 18. D10/D11 DRV8434S CTRL1 (TRQ_DAC). POR 0x00. + U08 fpgaD10D11CTRL2Reg; ///< Reg 19. D10/D11 DRV8434S CTRL2 (TOFF, DECAY, EN_OUT). POR 0x8F. + U08 fpgaD10D11CTRL4Reg; ///< Reg 20. D10/D11 DRV8434S CTRL4 (CLR_FLT, LOCK, EN_OL, OCP_MODE). POR 0x30. + U08 fpgaD10D11CTRL5Reg; ///< Reg 21. D10/D11 DRV8434S CTRL5 (STL_LRN, EN_STL). POR 0x08. + U08 fpgaD10D11CTRL6Reg; ///< Reg 22. D10/D11 DRV8434S CTRL6 (STALL_TH lower). POR 0x03. + U08 fpgaD10D11CTRL7Reg; ///< Reg 23. D10/D11 DRV8434S CTRL7 (RC_RIPPLE, EN_SSC, STALL_TH upper). POR 0x20. + U08 fpgaD10D11CTRL8Reg; ///< Reg 24. D10/D11 DRV8434S CTRL8 (TRQ_COUNT lower, read-only). POR 0xFF. + U08 fpgaD10D11CTRL9Reg; ///< Reg 25. D10/D11 DRV8434S CTRL9 (REV_ID, TRQ_COUNT upper, read-only). POR 0x0F. + U08 fpgaD76CTRL1Reg; ///< Reg 26. D76 DRV8434S CTRL1. DRV8434S CTRL1 (TRQ_DAC). POR 0x00. + U08 fpgaD76CTRL2Reg; ///< Reg 27. D76 DRV8434S CTRL2. D10/D11 DRV8434S CTRL2 (TOFF, DECAY, EN_OUT). POR 0x8F. + U08 fpgaD76CTRL4Reg; ///< Reg 28. D76 DRV8434S CTRL4. (CLR_FLT, LOCK, EN_OL, OCP_MODE). POR 0x30. + U08 fpgaD76CTRL5Reg; ///< Reg 29. D76 DRV8434S CTRL5. (STL_LRN, EN_STL). POR 0x08.. + U08 fpgaD76CTRL6Reg; ///< Reg 30. D76 DRV8434S CTRL6. (STALL_TH lower). POR 0x03. + U08 fpgaD76CTRL7Reg; ///< Reg 31. D76 DRV8434S CTRL7. (RC_RIPPLE, EN_SSC, STALL_TH upper). POR 0x20. U16 fpgaRemoteUpdate_Write; ///< Reg 32. Register for Remote update used by SW. U16 fpgaD12PumpSpeed; ///< Reg 34. D48 Speed/RPM Control U08 fpgaD12PumpControl; ///< Reg 36. DGP Control @@ -594,11 +602,16 @@ U08 notused; ///< Reg 79. Not used U08 valveIOControl; ///< Reg 80. IO Valve control register. U08 valveFPControl; ///< Reg 81. FP Valve control register. - U08 conductivityP9Control; ///< Reg 82. P9 conductivity control register. - U08 conductivityP18Control; ///< Reg 83. P18 conductivity control register. - U16 conductivityP9Address; ///< Reg 84. P9 conductivity address register. - U32 conductivityP9Data; ///< Reg 86. P9 conductivity data in register. - U16 conductivityP18Address; ///< Reg 90. P18 conductivity address register. + U08 fpgaD76CTRL8Reg; ///< Reg 82. D76 DRV8434S CTRL8 (TRQ_COUNT lower, read-only). POR 0xFF. + U08 fpgaD76CTRL9Reg; ///< Reg 83. D76 DRV8434S CTRL9 (REV_ID, TRQ_COUNT upper, read-only). POR 0x0F. + U08 fpgaD92CTRL1Reg; ///< Reg 84. D92 DRV8434S CTRL1 + U08 fpgaD92CTRL2Reg; ///< Reg 85. d92 DRV8434S CTRL2 + U08 fpgaD92CTRL4Reg; ///< Reg 86. + U08 fpgaD92CTRL5Reg; ///< Reg 87. + U08 fpgaD92CTRL6Reg; ///< Reg 88. + U08 fpgaD92CTRL7Reg; ///< Reg 89. + U08 fpgaD92CTRL8Reg; ///< Reg 90. + U08 fpgaD92CTRL9Reg; ///< Reg 91. U32 conductivityP18Data; ///< Reg 92. P18 conductivity data in register. U16 descalePumpSpeed; ///< Reg 96. Descaler pump speed register. U08 descalePumpControl; ///< Reg 98. Descaler pump control register. @@ -1214,14 +1227,273 @@ /*********************************************************************//** * @brief - * The setFPGAD11PumpControl function sets the DVT concentrate pump 1 + * The setFPGAD10D11CTRL1Reg function sets the DRV8434S CTRL1 register + * (TRQ_DAC torque scaling) shared by the D10 and D11 concentrate pump + * drivers. + * @details \b Inputs: none + * @details \b Outputs: fpgaD10D11CTRL1Reg + * @param control CTRL1 register value + * @return none + *************************************************************************/ +void setFPGAD10D11CTRL1Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL1Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD10D11CTRL2Reg function sets the DRV8434S CTRL2 register + * (TOFF, DECAY, EN_OUT) shared by the D10 and D11 concentrate pump drivers. + * @details \b Inputs: none + * @details \b Outputs: fpgaD10D11CTRL2Reg + * @param control CTRL2 register value + * @return none + *************************************************************************/ +void setFPGAD10D11CTRL2Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL2Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD10D11CTRL4Reg function sets the DRV8434S CTRL4 register + * (CLR_FLT, LOCK, EN_OL, OCP_MODE, OTSD_MODE, TW_REP) shared by the D10 + * and D11 concentrate pump drivers. + * @details \b Inputs: none + * @details \b Outputs: fpgaD10D11CTRL4Reg + * @param control CTRL4 register value + * @return none + *************************************************************************/ +void setFPGAD10D11CTRL4Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL4Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD10D11CTRL5Reg function sets the DRV8434S CTRL5 register + * (STL_LRN, EN_STL, STL_REP stall-detection controls) shared by the D10 + * and D11 concentrate pump drivers. + * @details \b Inputs: none + * @details \b Outputs: fpgaD10D11CTRL5Reg + * @param control CTRL5 register value + * @return none + *************************************************************************/ +void setFPGAD10D11CTRL5Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL5Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD10D11CTRL6Reg function sets the DRV8434S CTRL6 register + * (STALL_TH[7:0], lower 8 bits of the stall threshold) shared by the D10 + * and D11 concentrate pump drivers. + * @details \b Inputs: none + * @details \b Outputs: fpgaD10D11CTRL6Reg + * @param control CTRL6 register value + * @return none + *************************************************************************/ +void setFPGAD10D11CTRL6Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL6Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD10D11CTRL7Reg function sets the DRV8434S CTRL7 register + * (RC_RIPPLE, EN_SSC, TRQ_SCALE, STALL_TH[11:8]) shared by the D10 and + * D11 concentrate pump drivers. + * @details \b Inputs: none + * @details \b Outputs: fpgaD10D11CTRL7Reg + * @param control CTRL7 register value + * @return none + *************************************************************************/ +void setFPGAD10D11CTRL7Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL7Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD76CTRL1Reg function sets the DRV8434S CTRL1 register + * (TRQ_DAC torque scaling) for the D76 (UF) pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD76CTRL1Reg + * @param control CTRL1 register value + * @return none + *************************************************************************/ +void setFPGAD76CTRL1Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL1Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD76CTRL2Reg function sets the DRV8434S CTRL2 register + * (TOFF, DECAY, EN_OUT) for the D76 (UF) pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD76CTRL2Reg + * @param control CTRL2 register value + * @return none + *************************************************************************/ +void setFPGAD76CTRL2Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL2Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD76CTRL4Reg function sets the DRV8434S CTRL4 register + * (CLR_FLT, LOCK, EN_OL, OCP_MODE, OTSD_MODE, TW_REP) for the D76 (UF) + * pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD76CTRL4Reg + * @param control CTRL4 register value + * @return none + *************************************************************************/ +void setFPGAD76CTRL4Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL4Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD76CTRL5Reg function sets the DRV8434S CTRL5 register + * (STL_LRN, EN_STL, STL_REP) for the D76 (UF) pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD76CTRL5Reg + * @param control CTRL5 register value + * @return none + *************************************************************************/ +void setFPGAD76CTRL5Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL5Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD76CTRL6Reg function sets the DRV8434S CTRL6 register + * (STALL_TH[7:0]) for the D76 (UF) pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD76CTRL6Reg + * @param control CTRL6 register value + * @return none + *************************************************************************/ +void setFPGAD76CTRL6Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL6Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD76CTRL7Reg function sets the DRV8434S CTRL7 register + * (RC_RIPPLE, EN_SSC, TRQ_SCALE, STALL_TH[11:8]) for the D76 (UF) pump + * driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD76CTRL7Reg + * @param control CTRL7 register value + * @return none + *************************************************************************/ +void setFPGAD76CTRL7Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL7Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD92CTRL1Reg function sets the DRV8434S CTRL1 register + * (TRQ_DAC torque scaling) for the D92 substitution pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92CTRL1Reg + * @param control CTRL1 register value + * @return none + *************************************************************************/ +void setFPGAD92CTRL1Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL1Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD92CTRL2Reg function sets the DRV8434S CTRL2 register + * (TOFF, DECAY, EN_OUT) for the D92 substitution pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92CTRL2Reg + * @param control CTRL2 register value + * @return none + *************************************************************************/ +void setFPGAD92CTRL2Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL2Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD92CTRL4Reg function sets the DRV8434S CTRL4 register + * (CLR_FLT, LOCK, EN_OL, OCP_MODE, OTSD_MODE, TW_REP) for the D92 substitution pump + * driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92CTRL4Reg + * @param control CTRL4 register value + * @return none + *************************************************************************/ +void setFPGAD92CTRL4Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL4Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD92CTRL5Reg function sets the DRV8434S CTRL5 register + * (STL_LRN, EN_STL, STL_REP) for the D92 substitution pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92CTRL5Reg + * @param control CTRL5 register value + * @return none + *************************************************************************/ +void setFPGAD92CTRL5Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL5Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD92CTRL6Reg function sets the DRV8434S CTRL6 register + * (STALL_TH[7:0]) for the D92 substitution pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92CTRL6Reg + * @param control CTRL6 register value + * @return none + *************************************************************************/ +void setFPGAD92CTRL6Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL6Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD92CTRL7Reg function sets the DRV8434S CTRL7 register + * (RC_RIPPLE, EN_SSC, TRQ_SCALE, STALL_TH[11:8]) for the D92 substitution pump driver. + * @details \b Inputs: none + * @details \b Outputs: fpgaD92CTRL7Reg + * @param control CTRL7 register value + * @return none + *************************************************************************/ +void setFPGAD92CTRL7Reg( U08 control ) +{ + SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL7Reg, control ); +} + +/*********************************************************************//** + * @brief + * The setFPGAD11PumpControl function sets the DRV8434S concentrate pump 1 * (acid pump) control mode. - * bit 7: Park (set in different function) - * bit 6: nSleep - * bit 5: nReset - * bit 4: nEnable - * bit 3: Direction (1=Fwd, 0=Rev) - * bit 0-2: Microstepping resolution + * bit 7: Park (set in different function) + * bit 6: Not used + * bit 5: S_PUMP_ENABLE (active low: 0 = enabled) + * bit 4: Direction (S_PUMP_DIR: 0=CW, 1=CCW) + * bit 3-0: MICROSTEP_MODE[3:0] * @details \b Inputs: none * @details \b Outputs: fpgaD11PumpControl * @param control Concentrate pump control set @@ -1237,12 +1509,11 @@ * @brief * The setFPGAD10PumpControl function sets the DVT concentrate pump 2 * (bicarb pump) control mode. - * bit 7: Park (set in different function) - * bit 6: nSleep - * bit 5: nReset - * bit 4: nEnable - * bit 3: Direction (1=Fwd, 0=Rev) - * bit 0-2: Microstepping resolution + * bit 7: Park (set in different function) + * bit 6: Not used + * bit 5: S_PUMP_ENABLE (active low: 0 = enabled) + * bit 4: Direction (S_PUMP_DIR: 0=CW, 1=CCW) + * bit 3-0: MICROSTEP_MODE[3:0] * @details \b Inputs: none * @details \b Outputs: fpgaD10PumpControl * @param control Concentrate pump control set @@ -1258,12 +1529,11 @@ * @brief * The setFPGAD76PumpControl function sets the UF pump * (D76 pump) control mode. - * bit 7: Park (set in different function) - * bit 6: nSleep - * bit 5: nReset - * bit 4: nEnable - * bit 3: Direction (1=Fwd, 0=Rev) - * bit 0-2: Microstepping resolution + * bit 7: Park (set in different function) + * bit 6: Not used + * bit 5: S_PUMP_ENABLE (active low: 0 = enabled) + * bit 4: Direction (S_PUMP_DIR: 0=CW, 1=CCW) + * bit 3-0: MICROSTEP_MODE[3:0] * @details \b Inputs: none * @details \b Outputs: fpgaD76PumpControl * @param control UF pump control set @@ -1279,12 +1549,11 @@ * @brief * The setFPGAD92PumpControl function sets the UF pump * (D76 pump) control mode. - * bit 7: Park (set in different function) - * bit 6: nSleep - * bit 5: nReset - * bit 4: nEnable - * bit 3: Direction (1=Fwd, 0=Rev) - * bit 0-2: Microstepping resolution + * bit 7: Park (set in different function) + * bit 6: Not used + * bit 5: S_PUMP_ENABLE (active low: 0 = enabled) + * bit 4: Direction (S_PUMP_DIR: 0=CW, 1=CCW) + * bit 3-0: MICROSTEP_MODE[3:0] * @details \b Inputs: none * @details \b Outputs: fpgaD76PumpControl * @param control UF pump control set @@ -1398,7 +1667,7 @@ { SET_FPGA_ACTUATOR_FIELD( fpgaD10PumpRevCount, count ); } - +CONCENTRATE_PUMP_CONTROL_ENABLE_MASK /*********************************************************************//** * @brief * The setFPGAD76PumpRevolutionCount function sets the UltraFilteration Index: firmware/App/Services/FpgaDD.h =================================================================== diff -u -rd47b9bcbd4796a8c51d9e87436422c5868292ac6 -r3701c29d97c1b1571d41732ad7fba58ace4b75d7 --- firmware/App/Services/FpgaDD.h (.../FpgaDD.h) (revision d47b9bcbd4796a8c51d9e87436422c5868292ac6) +++ firmware/App/Services/FpgaDD.h (.../FpgaDD.h) (revision 3701c29d97c1b1571d41732ad7fba58ace4b75d7) @@ -144,6 +144,27 @@ void setFPGAD76PumpRevolutionCount( U32 count ); void setFPGAD92PumpRevolutionCount( U32 count ); +void setFPGAD10D11CTRL1Reg( U08 control ); +void setFPGAD10D11CTRL2Reg( U08 control ); +void setFPGAD10D11CTRL4Reg( U08 control ); +void setFPGAD10D11CTRL5Reg( U08 control ); +void setFPGAD10D11CTRL6Reg( U08 control ); +void setFPGAD10D11CTRL7Reg( U08 control ); + +void setFPGAD76CTRL1Reg( U08 control ); +void setFPGAD76CTRL2Reg( U08 control ); +void setFPGAD76CTRL4Reg( U08 control ); +void setFPGAD76CTRL5Reg( U08 control ); +void setFPGAD76CTRL6Reg( U08 control ); +void setFPGAD76CTRL7Reg( U08 control ); + +void setFPGAD92CTRL1Reg( U08 control ); +void setFPGAD92CTRL2Reg( U08 control ); +void setFPGAD92CTRL4Reg( U08 control ); +void setFPGAD92CTRL5Reg( U08 control ); +void setFPGAD92CTRL6Reg( U08 control ); +void setFPGAD92CTRL7Reg( U08 control ); + U08 getFPGAD11PumpControlStatus( void ); U08 getFPGAD10PumpControlStatus( void ); U08 getFPGAD76PumpControlStatus( void );