Index: firmware/App/Services/FpgaDD.c =================================================================== diff -u -r901d84db197c6d828e4bc58c557ec5ebbd1c557b -r44f2998369053e6aa7ebd2a74b34054b17b46fc9 --- firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 901d84db197c6d828e4bc58c557ec5ebbd1c557b) +++ firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 44f2998369053e6aa7ebd2a74b34054b17b46fc9) @@ -59,7 +59,9 @@ #define CLEAR_FPGA_ACTUATOR_BITS(field, bits) (getTestConfigStatus( TEST_CONFIG_DD_FP_ENABLE_BETA_2_0_HW ) == TRUE ? ( fpgaActuatorSetPoints.field &= bits ) : ( fpgaBeta19ActuatorSetPoints.field &= bits )) //#define CLEAR_FPGA_ACTUATOR_BITS(field, bits) (fpgaActuatorSetPoints.field &= bits) -#define FPGA_EXPECTED_ID 0x04 ///< FPGA expected ID. +#define FPGA_EXPECTED_ID 0x06 ///< FPGA expected ID for Beta 2 systems. +//TODO: Remove once Beta 1.9 is obsolete +#define FPGA_BETA_1_9_EXPECTED_ID 0X04 ///< FPGA expected ID for Beta 1 and 1.9 systems. #define MAX_COMM_ERROR_RETRIES 5 ///< Maximum number of communication error retries @@ -134,7 +136,7 @@ #define FPGA_D42_BLOOD_LEAK_STATUS_MASK 0x04 ///< Bit mask for blood leak detector. #define FPGA_D42_BLOOD_LEAK_ST_BIT_INDEX 2 ///< Bit index for the blood leak self test status bit. -#define GPIO_AC_SWITCH_MASK 0x10U ///< AC switch status bit mask. +#define GPIO_AC_SWITCH_MASK 0x01U ///< AC switch status bit mask. #define FPGA_GPIO_LEAK_SENSOR_MASK 0x02U ///< GPIO_Status Bit 1 per HDD. #define MAX_PUMP_SPEED 3000.0F ///< Maxon controller pump maximum speed @@ -236,6 +238,7 @@ U08 fpgaD76PumpFault; ///< Reg 658: UF pump fault U08 fpga_UnUsed_3; ///< Reg 659: Not used + //TODO: Change the variable names to start with fpga as the prefix. S16 pressureP46; ///< Reg 660. P46 pressure data. U16 temperatureP46; ///< Reg 662. P46 temperature data. S16 pressureM3; ///< Reg 664. M3 pressure data. @@ -408,55 +411,55 @@ U08 fpgaD17CondErrorCnt; ///< Reg 715. D17 error read count U08 fpgaD17TempReadCount; ///< Reg 716. D17 temperature successful read count U08 fpgaD17TempErrorCount; ///< Reg 717. D17 Temperature error read count - U08 fpgaD17CalMemCounter; ///< Reg 718. TBD - U08 fpgaD74CalMemCounter; ///< Reg 719. TBD - U32 fpgaD74CondDataCal; ///< Reg 720. D75 CAL word update - U32 fpgaD74CondCond; ///< Reg 724. D75 conductivity - U32 fpgaD74CondTemp; ///< Reg 728. D75 Temperature - U08 fpgaD74CondReadCnt; ///< Reg 732. D75 successful read count - U08 fpgaD74CondErrorCnt; ///< Reg 733. D75 error read count - U08 fpgaD74TempReadCount; ///< Reg 734. D75 temperature successful read count - U08 fpgaD74TempErrorCount; ///< Reg 735. D75 Temperature error read count - U32 fpgaD27CondDataCal; ///< Reg 736. D28 CAL word update - U32 fpgaD27CondCond; ///< Reg 740. D28 conductivity - U32 fpgaD27CondTemp; ///< Reg 744. D28 Temperature - U08 fpgaD27CondReadCnt; ///< Reg 748. D28 successful read count - U08 fpgaD27CondErrorCnt; ///< Reg 749. D28 error read count - U08 fpgaD27TempReadCount; ///< Reg 750. D28 temperature successful read count - U08 fpgaD27TempErrorCount; ///< Reg 751. D28 Temperature error read count - U08 fpgaD27CalMemCounter; ///< Reg 752. TBD - U08 fpgaD29CalMemCounter; ///< Reg 753. TBD - U32 fpgaD29CondDataCal; ///< Reg 754. D30 CAL word update - U32 fpgaD29CondCond; ///< Reg 758. D30 conductivity - U32 fpgaD29CondTemp; ///< Reg 762. D30 Temperature - U08 fpgaD29CondReadCnt; ///< Reg 766. D30 successful read count - U08 fpgaD29CondErrorCnt; ///< Reg 767. D30 error read count - U08 fpgaD29TempReadCount; ///< Reg 768. D30 temperature successful read count - U08 fpgaD29TempErrorCount; ///< Reg 769. D30 Temperature error read count - U32 fpgaD43CondDataCal; ///< Reg 770. D44 CAL word update - U32 fpgaD43CondCond; ///< Reg 774. D44 conductivity - U32 fpgaD43CondTemp; ///< Reg 778. D44 Temperature - U08 fpgaD43CondReadCnt; ///< Reg 782. D44 successful read count - U08 fpgaD43CondErrorCnt; ///< Reg 783. D44 error read count - U08 fpgaD43TempReadCount; ///< Reg 784. D44 temperature successful read count - U08 fpgaD43TempErrorCount; ///< Reg 785. D44 Temperature error read count - U08 fpgaD43CalMemCounter; ///< Reg 786. TBD - U08 fpgaP9CalMemCounter; ///< Reg 787. TBD - U32 conductivityP9Data; ///< Reg 788. P10 CAL word update - U32 conductivityP9Cond; ///< Reg 792. P10 Conductivity - U32 conductivityP9Temp; ///< Reg 796. P10 Temperature - U08 conductivityP9ReadCount; ///< Reg 800. P10 successful read count - U08 conductivityP9ErrorCount; ///< Reg 801. P10 error read count - U08 fpgaP9TempReadCount; ///< Reg 802. P10 temperature successful read count - U08 fpgaP9TempErrorCount; ///< Reg 803. P10 Temperature error read count - U32 conductivityP18Data; ///< Reg 804. P19 CAL word update - U32 conductivityP18Cond; ///< Reg 808. P19 Conductivity - U32 conductivityP18Temp; ///< Reg 812. P19 Temperature - U08 conductivityP18ReadCount; ///< Reg 816. P19 successful read count - U08 conductivityP18ErrorCount; ///< Reg 817. P19 error read count - U08 fpgaP18TempReadCount; ///< Reg 818. P19 temperature successful read count - U08 fpgaP18TempErrorCount; ///< Reg 819. P19 Temperature error read count - U08 fpgaP18CalMemCounter; ///< Reg 820. TBD + U08 fpgaD17CalMemCounter; ///< Reg 718. D17 CAL counter + U08 fpgaD74CalMemCounter; ///< Reg 719. D74 CAL counter + U32 fpgaD74CondDataCal; ///< Reg 720. D74 CAL word update + U32 fpgaD74CondCond; ///< Reg 724. D74 conductivity + U32 fpgaD74CondTemp; ///< Reg 728. D74 Temperature + U08 fpgaD74CondReadCnt; ///< Reg 732. D74 successful read count + U08 fpgaD74CondErrorCnt; ///< Reg 733. D74 error read count + U08 fpgaD74TempReadCount; ///< Reg 734. D74 temperature successful read count + U08 fpgaD74TempErrorCount; ///< Reg 735. D74 Temperature error read count + U32 fpgaD27CondDataCal; ///< Reg 736. D27 CAL word update + U32 fpgaD27CondCond; ///< Reg 740. D27 conductivity + U32 fpgaD27CondTemp; ///< Reg 744. D27 Temperature + U08 fpgaD27CondReadCnt; ///< Reg 748. D27 successful read count + U08 fpgaD27CondErrorCnt; ///< Reg 749. D27 error read count + U08 fpgaD27TempReadCount; ///< Reg 750. D27 temperature successful read count + U08 fpgaD27TempErrorCount; ///< Reg 751. D27 Temperature error read count + U08 fpgaD27CalMemCounter; ///< Reg 752. D27 CAL counter + U08 fpgaD29CalMemCounter; ///< Reg 753. D29 CAL counter + U32 fpgaD29CondDataCal; ///< Reg 754. D29 CAL word update + U32 fpgaD29CondCond; ///< Reg 758. D29 conductivity + U32 fpgaD29CondTemp; ///< Reg 762. D29 Temperature + U08 fpgaD29CondReadCnt; ///< Reg 766. D29 successful read count + U08 fpgaD29CondErrorCnt; ///< Reg 767. D29 error read count + U08 fpgaD29TempReadCount; ///< Reg 768. D29 temperature successful read count + U08 fpgaD29TempErrorCount; ///< Reg 769. D29 Temperature error read count + U32 fpgaD43CondDataCal; ///< Reg 770. D43 CAL word update + U32 fpgaD43CondCond; ///< Reg 774. D43 conductivity + U32 fpgaD43CondTemp; ///< Reg 778. D43 Temperature + U08 fpgaD43CondReadCnt; ///< Reg 782. D43 successful read count + U08 fpgaD43CondErrorCnt; ///< Reg 783. D43 error read count + U08 fpgaD43TempReadCount; ///< Reg 784. D43 temperature successful read count + U08 fpgaD43TempErrorCount; ///< Reg 785. D43 Temperature error read count + U08 fpgaD43CalMemCounter; ///< Reg 786. D43 CAL counter + U08 fpgaP9CalMemCounter; ///< Reg 787. P9 CAL counter + U32 conductivityP9Data; ///< Reg 788. P9 CAL word update + U32 conductivityP9Cond; ///< Reg 792. P9 Conductivity + U32 conductivityP9Temp; ///< Reg 796. P9 Temperature + U08 conductivityP9ReadCount; ///< Reg 800. P9 successful read count + U08 conductivityP9ErrorCount; ///< Reg 801. P9 error read count + U08 fpgaP9TempReadCount; ///< Reg 802. P9 temperature successful read count + U08 fpgaP9TempErrorCount; ///< Reg 803. P9 Temperature error read count + U32 conductivityP18Data; ///< Reg 804. P18 CAL word update + U32 conductivityP18Cond; ///< Reg 808. P18 Conductivity + U32 conductivityP18Temp; ///< Reg 812. P18 Temperature + U08 conductivityP18ReadCount; ///< Reg 816. P18 successful read count + U08 conductivityP18ErrorCount; ///< Reg 817. P18 error read count + U08 fpgaP18TempReadCount; ///< Reg 818. P18 temperature successful read count + U08 fpgaP18TempErrorCount; ///< Reg 819. P18 Temperature error read count + U08 fpgaP18CalMemCounter; ///< Reg 820. P18 CAL counter } DD_FPGA_SENSORS_T; // TODO: Remove when Beta 1.9 is obsolete @@ -538,6 +541,7 @@ U16 fpgaConSensD43_Addrs; ///< Reg 119. D43 Initialization Address register U32 fpgaConSensD43_Data_In; ///< Reg 121. D43 Initialization data register U08 fpgaNotUsed_4; ///< Reg 125. Not used + U08 unusedRegister3; ///< Reg 125. Unused register 3 U32 fpgaD11PumpSpeed; ///< Reg 126. Acid Concentrate Pump Speed/RPM Control U32 fpgaD10PumpSpeed; ///< Reg 130. BiCarb Concentrate Pump Speed/RPM Control U32 fpgaD76PumpSpeed; ///< Reg 134. UF Pump Speed/RPM Control @@ -670,7 +674,7 @@ fpgaActuatorSetPoints.fpgaDDSpareValvePWMControl = FPGA_ENABLE_UF_VALVES_PWM; fpgaActuatorSetPoints.fpgaADCControl = FPGA_ADC_AUTO_READ_ENABLE; -#if 1 // TODO: Remove when Beta 1.9 is obsolete + // TODO: Remove when Beta 1.9 is obsolete // Set the valve control mode and default state of valve for Beta 1.9 HW fpgaBeta19ActuatorSetPoints.fpgaValveControl = FPGA_ENABLE_VALVES_CONTROL; fpgaBeta19ActuatorSetPoints.fpgaValvePWMEnable = FPGA_ENABLE_VALVES_PWM; @@ -679,7 +683,6 @@ fpgaBeta19ActuatorSetPoints.fpgaDDSpareValveControl = FPGA_ENABLE_SPARE_VALVES_CNTRL; fpgaBeta19ActuatorSetPoints.fpgaDDSpareValvePWMControl = FPGA_ENABLE_UF_VALVES_PWM; fpgaBeta19ActuatorSetPoints.fpgaADCControl = FPGA_ADC_AUTO_READ_ENABLE; -#endif // initialize FPGA clock speed error time windowed count initTimeWindowedCount( TIME_WINDOWED_COUNT_FPGA_COMM_FAILURES, MAX_FPGA_COMM_FAILURES, MAX_FPGA_COMM_FAILURES_WINDOW_MS); @@ -723,7 +726,8 @@ SELF_TEST_STATUS_T result; // check FPGA reported correct ID - if ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId ) + // TODO: Remove beta 1.9 expected ID once Beta 1.9 is obsolete + if ( ( FPGA_EXPECTED_ID == fpgaHeader.fpgaId ) || ( FPGA_BETA_1_9_EXPECTED_ID == fpgaHeader.fpgaId ) ) { // Check FPGA compatibility w/ firmware if ( DD_FPGA_COMPATIBILITY_REV == GET_FPGA_SENSOR_FIELD( fpgaCompatibilityRev ) ) @@ -3382,19 +3386,6 @@ /*********************************************************************//** * @brief - * The getGPIOStatusFromFPGA function returns the latest GPIO status register - * value reported by the DD FPGA. - * @details \b Inputs: fpgaSensorReadings.fpgaGPIOStatus (via FpgaDD service) - * @details \b Outputs: none - * @return GPIO status register value (bit-mapped per HDD definition) - *************************************************************************/ -U08 getGPIOStatusFromFPGA( void ) -{ - return getFPGAGPIOStatus(); -} - -/*********************************************************************//** - * @brief * The getACSwitchStatus function returns the AC switch (concentrate cap * switch) status from the FPGA GPIO register. * @details \b Inputs: fpgaSensorReadings.fpgaGPIOStatus (via getGPIOStatusFromFPGA) @@ -3403,7 +3394,7 @@ *************************************************************************/ BOOL getACSwitchStatus( void ) { - U08 gpioStatus = getGPIOStatusFromFPGA(); + U08 gpioStatus = getFPGAGPIOStatus(); BOOL isAsserted = ( ( gpioStatus & GPIO_AC_SWITCH_MASK ) == 0U ) ? TRUE : FALSE; return isAsserted;