Index: firmware/App/Controllers/ConcentratePumps.c =================================================================== diff -u -r3701c29d97c1b1571d41732ad7fba58ace4b75d7 -r69b6a8036f72eeb935a20701c7d30d402a9ba1f5 --- firmware/App/Controllers/ConcentratePumps.c (.../ConcentratePumps.c) (revision 3701c29d97c1b1571d41732ad7fba58ace4b75d7) +++ firmware/App/Controllers/ConcentratePumps.c (.../ConcentratePumps.c) (revision 69b6a8036f72eeb935a20701c7d30d402a9ba1f5) @@ -80,18 +80,36 @@ #define CONCENTRATE_PUMP_CONTROL_SLEEP_OFF 0x40 ///< Concentrate pump control sleep off. #define CONCENTRATE_PUMP_CONTROL_ENABLE_MASK 0x10 ///< Concentrate pump control enable bit mask. -static const U32 CONCENTRATE_PUMP_CONTROL_FORWARD = CONCENTRATE_PUMP_CONTROL_SLEEP_OFF | - CONCENTRATE_PUMP_CONTROL_NOT_RESET | - CONCENTRATE_PUMP_CONTROL_ENABLE | - CONCENTRATE_PUMP_CONTROL_FORWARD_DIR | - CONCENTRATE_PUMP_CONTROL_EIGHTH_STEP; ///< Concentrate pump control forward. +//NEW STEPPER DRIVER CONFIGURATION DRV8434S -static const U32 CONCENTRATE_PUMP_CONTROL_REVERSE = CONCENTRATE_PUMP_CONTROL_SLEEP_OFF | - CONCENTRATE_PUMP_CONTROL_NOT_RESET | - CONCENTRATE_PUMP_CONTROL_ENABLE | - CONCENTRATE_PUMP_CONTROL_REVERSE_DIR | - CONCENTRATE_PUMP_CONTROL_EIGHTH_STEP; ///< Concentrate pump control reverse. +#define CONCENTRATE_PUMP_CONTROL_DRV_TWOFIXTYSIXTH_STEP 0x0A ///< concentrate pump microstep control 1/256th step. +#define CONCENTRATE_PUMP_CONTROL_DRV_ONETWENTYEIGHTYTH_STEP 0x09 ///< concentrate pump microstep control 1/128th step. +#define CONCENTRATE_PUMP_CONTROL_DRV_SIXTYFOURTH_STEP 0x08 ///< concentrate pump microstep control 1/64th step. +#define CONCENTRATE_PUMP_CONTROL_DRV_THIRTYSECOND_STEP 0x07 ///< concentrate pump microstep control 1/32nd step. +#define CONCENTRATE_PUMP_CONTROL_DRV_SIXTEENTH_STEP 0x06 ///< concentrate pump microstep control 1/16th step. +#define CONCENTRATE_PUMP_CONTROL_DRV_EIGHTH_STEP 0x05 ///< concentrate pump microstep control 1/8th step +#define CONCENTRATE_PUMP_CONTROL_DRV_NONCIRCULAR_HALF_STEP 0x02 ///< Concentrate pump microstep control non-circular 1/2 step. +#define CONCENTRATE_PUMP_CONTROL_DRV_HALF_STEP 0x03 ///< Concentrate pump microstep control 1/2 step. +#define CONCENTRATE_PUMP_CONTROL_DRV_QUARTER_STEP 0x04 ///< Concentrate pump microstep control 1/4 step. +#define CONCENTRATE_PUMP_CONTROL_DRV_FULL_STEP_71PCT 0x01 ///< Concentrate pump microstep control full step with 71% current. +#define CONCENTRATE_PUMP_CONTROL_DRV_FULL_STEP_100PCT 0x00 ///< Concentrate pump microstep control full step with 100% current. +#define CONCENTRATE_PUMP_CONTROL_DRV_REVERSE_DIR 0x00 ///< bit 4 = DIR, Concentrate pump control reverse direction. +#define CONCENTRATE_PUMP_CONTROL_DRV_FORWARD_DIR 0x10 ///< bit 4 = DIR, Concentrate pump control forward direction. +#define CONCENTRATE_PUMP_CONTROL_DRV_ENABLE 0x00 ///< bit 5, active low, Concentrate pump control enable pump. +#define CONCENTRATE_PUMP_CONTROL_DRV_DISABLE 0x20 ///< bit 5, active low, Concentrate pump control disable pump. +#define CONCENTRATE_PUMP_CONTROL_DRV_ENABLE_MASK 0x20 ///< bit 5 mask, Concentrate pump control enable bit mask. + +#define DRV8434S_CTRL1_DEFAULT 0x00 +#define DRV8434S_CTRL2_DEFAULT 0x8F +#define DRV8434S_CTRL4_DEFAULT 0x30 +#define DRV8434S_CTRL5_DEFAULT 0x08 +#define DRV8434S_CTRL6_DEFAULT 0x03 +#define DRV8434S_CTRL7_DEFAULT 0x20 + +static U32 CONCENTRATE_PUMP_CONTROL_FORWARD; ///< Concentrate pump control forward. +static U32 CONCENTRATE_PUMP_CONTROL_REVERSE; ///< Concentrate pump control reverse. + /* * * @@ -183,6 +201,45 @@ bicarbConcentratePumpParkPersistenceClear = FALSE; ufPumpParkPersistenceClear = FALSE; + if ( TRUE == getTestConfigStatus( TEST_CONFIG_DD_ENABLE_DRV8434S_STEPPER_DRIVER ) ) + { + CONCENTRATE_PUMP_CONTROL_FORWARD = CONCENTRATE_PUMP_CONTROL_DRV_ENABLE | + CONCENTRATE_PUMP_CONTROL_DRV_FORWARD_DIR | + CONCENTRATE_PUMP_CONTROL_DRV_EIGHTH_STEP; + + CONCENTRATE_PUMP_CONTROL_REVERSE = CONCENTRATE_PUMP_CONTROL_DRV_ENABLE | + CONCENTRATE_PUMP_CONTROL_DRV_REVERSE_DIR | + CONCENTRATE_PUMP_CONTROL_DRV_EIGHTH_STEP; + + setFPGAD10D11CTRL1Reg( DRV8434S_CTRL1_DEFAULT ); + setFPGAD10D11CTRL2Reg( DRV8434S_CTRL2_DEFAULT ); + setFPGAD10D11CTRL4Reg( DRV8434S_CTRL4_DEFAULT ); + setFPGAD10D11CTRL5Reg( DRV8434S_CTRL5_DEFAULT ); + setFPGAD10D11CTRL6Reg( DRV8434S_CTRL6_DEFAULT ); + setFPGAD10D11CTRL7Reg( DRV8434S_CTRL7_DEFAULT ); + + setFPGAD76CTRL1Reg( DRV8434S_CTRL1_DEFAULT ); + setFPGAD76CTRL2Reg( DRV8434S_CTRL2_DEFAULT ); + setFPGAD76CTRL4Reg( DRV8434S_CTRL4_DEFAULT ); + setFPGAD76CTRL5Reg( DRV8434S_CTRL5_DEFAULT ); + setFPGAD76CTRL6Reg( DRV8434S_CTRL6_DEFAULT ); + setFPGAD76CTRL7Reg( DRV8434S_CTRL7_DEFAULT ); + } + else + { + CONCENTRATE_PUMP_CONTROL_FORWARD = CONCENTRATE_PUMP_CONTROL_SLEEP_OFF | + CONCENTRATE_PUMP_CONTROL_NOT_RESET | + CONCENTRATE_PUMP_CONTROL_ENABLE | + CONCENTRATE_PUMP_CONTROL_FORWARD_DIR | + CONCENTRATE_PUMP_CONTROL_EIGHTH_STEP; + + CONCENTRATE_PUMP_CONTROL_REVERSE = CONCENTRATE_PUMP_CONTROL_SLEEP_OFF | + CONCENTRATE_PUMP_CONTROL_NOT_RESET | + CONCENTRATE_PUMP_CONTROL_ENABLE | + CONCENTRATE_PUMP_CONTROL_REVERSE_DIR | + CONCENTRATE_PUMP_CONTROL_EIGHTH_STEP; + } + for ( pumpId = CONCENTRATEPUMPS_FIRST; pumpId < NUM_OF_CONCENTRATE_PUMPS; pumpId++ ) { concentratePumps[ pumpId ].controlTimerCounter = 0; Index: firmware/App/Controllers/SubstitutionPump.c =================================================================== diff -u -r3b64586791accd0b9e8d8978b40e2509bb86dfbe -r69b6a8036f72eeb935a20701c7d30d402a9ba1f5 --- firmware/App/Controllers/SubstitutionPump.c (.../SubstitutionPump.c) (revision 3b64586791accd0b9e8d8978b40e2509bb86dfbe) +++ firmware/App/Controllers/SubstitutionPump.c (.../SubstitutionPump.c) (revision 69b6a8036f72eeb935a20701c7d30d402a9ba1f5) @@ -63,19 +63,24 @@ #define MAX_ALLOWED_ML_OUT_OF_RANGE 10 ///< Maximum allowed mL/min out of range from target ml/min in open loop. #define RPM_OUT_OF_RANGE_TIME_OUT ( 2 * MS_PER_SECOND ) ///< Open loop RPM out of range time out in ms. -static const U32 SUBSTITUTION_PUMP_CONTROL_FORWARD = SUBSTITUTION_PUMP_CONTROL_SLEEP_OFF | - SUBSTITUTION_PUMP_CONTROL_NOT_RESET | - SUBSTITUTION_PUMP_CONTROL_ENABLE | - SUBSTITUTION_PUMP_CONTROL_REVERSE_DIR | - SUBSTITUTION_PUMP_CONTROL_SIXTY_FOUR_STEP; +//Stepper Motor driver configuration (DRV8434S) +#define SUBSTITUTION_PUMP_CONTROL_DRV_SIXTY_FOUR_STEP 0x08 ///< 1/64 step, MS[3:0]=1000. (DRV8434S) +#define SUBSTITUTION_PUMP_CONTROL_DRV_REVERSE_DIR 0x00 ///< bit 4 = DIR, Substitution pump reverse direction configuration. +#define SUBSTITUTION_PUMP_CONTROL_DRV_FORWARD_DIR 0x10 ///< bit 4 = DIR, Substitution pump forward direction configuration. +#define SUBSTITUTION_PUMP_CONTROL_DRV_ENABLE 0x00 ///< bit 5, Substitution pump control enable pump. +#define SUBSTITUTION_PUMP_CONTROL_DRV_DISABLE 0x20 ///< bit 5, active low, disabled. (DRV8434S) -static const U32 SUBSTITUTION_PUMP_CONTROL_STOP = SUBSTITUTION_PUMP_CONTROL_SLEEP_OFF | - SUBSTITUTION_PUMP_CONTROL_NOT_RESET | - SUBSTITUTION_PUMP_CONTROL_DISABLE | - SUBSTITUTION_PUMP_CONTROL_REVERSE_DIR | - SUBSTITUTION_PUMP_CONTROL_SIXTY_FOUR_STEP; +#define DRV8434S_CTRL1_DEFAULT 0x00 +#define DRV8434S_CTRL2_DEFAULT 0x8F +#define DRV8434S_CTRL4_DEFAULT 0x30 +#define DRV8434S_CTRL5_DEFAULT 0x08 +#define DRV8434S_CTRL6_DEFAULT 0x03 +#define DRV8434S_CTRL7_DEFAULT 0x20 +static U32 SUBSTITUTION_PUMP_CONTROL_FORWARD; +static U32 SUBSTITUTION_PUMP_CONTROL_STOP; + /// Enumeration of Substitution pump states. typedef enum SubstituionPumpState { @@ -150,6 +155,38 @@ substitutionPumpDataPublishInterval.ovData = 0; substitutionPumpDataPublishInterval.override = OVERRIDE_RESET; + if ( TRUE == getTestConfigStatus( TEST_CONFIG_DD_ENABLE_DRV8434S_STEPPER_DRIVER ) ) + { + SUBSTITUTION_PUMP_CONTROL_FORWARD = SUBSTITUTION_PUMP_CONTROL_DRV_ENABLE | + SUBSTITUTION_PUMP_CONTROL_DRV_REVERSE_DIR | + SUBSTITUTION_PUMP_CONTROL_DRV_SIXTY_FOUR_STEP; + + SUBSTITUTION_PUMP_CONTROL_STOP = SUBSTITUTION_PUMP_CONTROL_DRV_DISABLE | + SUBSTITUTION_PUMP_CONTROL_DRV_REVERSE_DIR | + SUBSTITUTION_PUMP_CONTROL_DRV_SIXTY_FOUR_STEP; + + setFPGAD92CTRL1Reg( DRV8434S_CTRL1_DEFAULT ); + setFPGAD92CTRL2Reg( DRV8434S_CTRL2_DEFAULT ); + setFPGAD92CTRL4Reg( DRV8434S_CTRL4_DEFAULT ); + setFPGAD92CTRL5Reg( DRV8434S_CTRL5_DEFAULT ); + setFPGAD92CTRL6Reg( DRV8434S_CTRL6_DEFAULT ); + setFPGAD92CTRL7Reg( DRV8434S_CTRL7_DEFAULT ); + } + else + { + SUBSTITUTION_PUMP_CONTROL_FORWARD = SUBSTITUTION_PUMP_CONTROL_SLEEP_OFF | + SUBSTITUTION_PUMP_CONTROL_NOT_RESET | + SUBSTITUTION_PUMP_CONTROL_ENABLE | + SUBSTITUTION_PUMP_CONTROL_REVERSE_DIR | + SUBSTITUTION_PUMP_CONTROL_SIXTY_FOUR_STEP; + + SUBSTITUTION_PUMP_CONTROL_STOP = SUBSTITUTION_PUMP_CONTROL_SLEEP_OFF | + SUBSTITUTION_PUMP_CONTROL_NOT_RESET | + SUBSTITUTION_PUMP_CONTROL_DISABLE | + SUBSTITUTION_PUMP_CONTROL_REVERSE_DIR | + SUBSTITUTION_PUMP_CONTROL_SIXTY_FOUR_STEP; + } + initPersistentAlarm( ALARM_ID_DD_D92_PUMP_RPM_OUT_OF_RANGE, RPM_OUT_OF_RANGE_TIME_OUT, RPM_OUT_OF_RANGE_TIME_OUT ); } Index: firmware/App/Services/FpgaDD.c =================================================================== diff -u -r3701c29d97c1b1571d41732ad7fba58ace4b75d7 -r69b6a8036f72eeb935a20701c7d30d402a9ba1f5 --- firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 3701c29d97c1b1571d41732ad7fba58ace4b75d7) +++ firmware/App/Services/FpgaDD.c (.../FpgaDD.c) (revision 69b6a8036f72eeb935a20701c7d30d402a9ba1f5) @@ -1237,7 +1237,7 @@ *************************************************************************/ void setFPGAD10D11CTRL1Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL1Reg, control ); + fpgaActuatorSetPoints.fpgaD10D11CTRL1Reg = control; } /*********************************************************************//** @@ -1251,7 +1251,7 @@ *************************************************************************/ void setFPGAD10D11CTRL2Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL2Reg, control ); + fpgaActuatorSetPoints.fpgaD10D11CTRL2Reg = control; } /*********************************************************************//** @@ -1266,7 +1266,7 @@ *************************************************************************/ void setFPGAD10D11CTRL4Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL4Reg, control ); + fpgaActuatorSetPoints.fpgaD10D11CTRL4Reg = control; } /*********************************************************************//** @@ -1281,7 +1281,7 @@ *************************************************************************/ void setFPGAD10D11CTRL5Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL5Reg, control ); + fpgaActuatorSetPoints.fpgaD10D11CTRL5Reg = control; } /*********************************************************************//** @@ -1296,7 +1296,7 @@ *************************************************************************/ void setFPGAD10D11CTRL6Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL6Reg, control ); + fpgaActuatorSetPoints.fpgaD10D11CTRL6Reg = control; } /*********************************************************************//** @@ -1311,7 +1311,7 @@ *************************************************************************/ void setFPGAD10D11CTRL7Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD10D11CTRL7Reg, control ); + fpgaActuatorSetPoints.fpgaD10D11CTRL7Reg = control; } /*********************************************************************//** @@ -1325,7 +1325,7 @@ *************************************************************************/ void setFPGAD76CTRL1Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL1Reg, control ); + fpgaActuatorSetPoints.fpgaD76CTRL1Reg = control; } /*********************************************************************//** @@ -1339,7 +1339,7 @@ *************************************************************************/ void setFPGAD76CTRL2Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL2Reg, control ); + fpgaActuatorSetPoints.fpgaD76CTRL2Reg = control; } /*********************************************************************//** @@ -1354,7 +1354,7 @@ *************************************************************************/ void setFPGAD76CTRL4Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL4Reg, control ); + fpgaActuatorSetPoints.fpgaD76CTRL4Reg = control; } /*********************************************************************//** @@ -1368,7 +1368,7 @@ *************************************************************************/ void setFPGAD76CTRL5Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL5Reg, control ); + fpgaActuatorSetPoints.fpgaD76CTRL5Reg = control; } /*********************************************************************//** @@ -1382,7 +1382,7 @@ *************************************************************************/ void setFPGAD76CTRL6Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL6Reg, control ); + fpgaActuatorSetPoints.fpgaD76CTRL6Reg = control; } /*********************************************************************//** @@ -1397,7 +1397,7 @@ *************************************************************************/ void setFPGAD76CTRL7Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD76CTRL7Reg, control ); + fpgaActuatorSetPoints.fpgaD76CTRL7Reg = control; } /*********************************************************************//** @@ -1411,7 +1411,7 @@ *************************************************************************/ void setFPGAD92CTRL1Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL1Reg, control ); + fpgaActuatorSetPoints.fpgaD92CTRL1Reg = control; } /*********************************************************************//** @@ -1425,7 +1425,7 @@ *************************************************************************/ void setFPGAD92CTRL2Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL2Reg, control ); + fpgaActuatorSetPoints.fpgaD92CTRL2Reg = control; } /*********************************************************************//** @@ -1440,7 +1440,7 @@ *************************************************************************/ void setFPGAD92CTRL4Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL4Reg, control ); + fpgaActuatorSetPoints.fpgaD92CTRL4Reg = control; } /*********************************************************************//** @@ -1454,7 +1454,7 @@ *************************************************************************/ void setFPGAD92CTRL5Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL5Reg, control ); + fpgaActuatorSetPoints.fpgaD92CTRL5Reg = control; } /*********************************************************************//** @@ -1468,7 +1468,7 @@ *************************************************************************/ void setFPGAD92CTRL6Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL6Reg, control ); + fpgaActuatorSetPoints.fpgaD92CTRL6Reg = control; } /*********************************************************************//** @@ -1482,7 +1482,7 @@ *************************************************************************/ void setFPGAD92CTRL7Reg( U08 control ) { - SET_FPGA_ACTUATOR_FIELD( fpgaD92CTRL7Reg, control ); + fpgaActuatorSetPoints.fpgaD92CTRL7Reg = control; } /*********************************************************************//** @@ -1667,7 +1667,7 @@ { SET_FPGA_ACTUATOR_FIELD( fpgaD10PumpRevCount, count ); } -CONCENTRATE_PUMP_CONTROL_ENABLE_MASK + /*********************************************************************//** * @brief * The setFPGAD76PumpRevolutionCount function sets the UltraFilteration