Index: firmware/App/Drivers/InternalADC.c =================================================================== diff -u -red39129abdca4ec343369d83494530b23621e052 -rf3fedc73df117154665ba07bbae8e9c8dc8880d4 --- firmware/App/Drivers/InternalADC.c (.../InternalADC.c) (revision ed39129abdca4ec343369d83494530b23621e052) +++ firmware/App/Drivers/InternalADC.c (.../InternalADC.c) (revision f3fedc73df117154665ba07bbae8e9c8dc8880d4) @@ -30,50 +30,51 @@ #define SIZE_OF_ROLLING_AVG 16 ///< Number of DD internal ADC samples in rolling average calculations for each channel. #define ROLLING_AVG_SHIFT_DIVIDER 4 ///< Rolling average shift divider for DD internal ADC readings. -/// ADC channel number to ADC channel ID (enumeration) look-up table. -const INT_ADC_CHANNEL_T adcChannelNum2ChannelId[ MAX_ADC_CHANNELS ] = +/// Mapping from enumerated used ADC channel to processor channel ID. +const INT_ADC_CHANNEL_T ADC_CHANNEL_NUM_TO_CHANNEL_ID[ MAX_ADC_CHANNELS ] = { - INT_ADC_NOT_USED, // 0 - INT_ADC_NOT_USED, // 1 - TD specific - INT_ADC_3_3V_SENSOR_ADC_REF, // 2 - INT_ADC_24V_ACTUATORS_REG, // 3 - INT_ADC_1_2V_PROCESSOR, // 4 - INT_ADC_5V_SENSORS, // 5 - INT_ADC_NOT_USED, // 6 - INT_ADC_NOT_USED, // 7 - INT_ADC_NOT_USED, // 8 - TD specific - INT_ADC_NOT_USED, // 9 - INT_ADC_BOARD_THERMISTOR, // 10 - INT_ADC_1_25_FPGA_ADC_REF, // 11 - INT_ADC_3_3V, // 12 - INT_ADC_5V_LOGIC, // 13 - INT_ADC_NOT_USED, // 14 - TD specific - INT_ADC_NOT_USED, // 15 - INT_ADC_NOT_USED, // 16 - INT_ADC_NOT_USED, // 17 - INT_ADC_BACKUP_V, // 18 - INT_ADC_NOT_USED, // 19 - INT_ADC_NOT_USED, // 20 - INT_ADC_NOT_USED, // 21 - INT_ADC_24V_ACTUATORS, // 22 - INT_ADC_NOT_USED // 23 + INT_ADC_24V_ACTUATORS_1, // 0 + INT_ADC_NOT_USED, // 1 + INT_ADC_1_8V_FPGA, // 2 + INT_ADC_1V_FPGA, // 3 + INT_ADC_1_2V_PROCESSOR, // 4 + INT_ADC_NOT_USED, // 5 + INT_ADC_NOT_USED, // 6 + INT_ADC_24V_ACTUATORS_2, // 7 + INT_ADC_PRIMARY_ALARM_CURRENT_HG, // 8 + INT_ADC_NOT_USED, // 9 + INT_ADC_BOARD_THERMISTOR, // 10 + INT_ADC_3_3V, // 12 + INT_ADC_5V_LOGIC, // 13 + INT_ADC_PRIMARY_ALARM_CURRENT_LG, // 14 + INT_ADC_NOT_USED, // 15 + INT_ADC_NOT_USED, // 16 + INT_ADC_NOT_USED, // 17 + INT_ADC_BACKUP_V, // 18 + INT_ADC_ADC_REF, // 19 + INT_ADC_NOT_USED, // 20 + INT_ADC_NOT_USED, // 21 + INT_ADC_NOT_USED, // 22 + INT_ADC_NOT_USED // 23 }; -/// ADC channel read to units look-up table. const F32 ADC_CHANNEL_READ_TO_UNITS[ NUM_OF_INT_ADC_CHANNELS ] = { - 0.0, // - INT_ADC_NOT_USED - 0.001465, // V - INT_ADC_3_3V_SENSOR_ADC_REF - 0.009420, // V - INT_ADC_24V_ACTUATORS_REG - 0.000733, // V - INT_ADC_1_2V_PROCESSOR - 0.001465, // V - INT_ADC_5V_SENSORS - 0.001221, // V - INT_ADC_BOARD_THERMISTOR - 0.000733, // V - INT_ADC_1_25_FPGA_ADC_REF - 0.001465, // V - INT_ADC_3_3V - 0.001465, // V - INT_ADC_5V_LOGIC - 0.007106, // V - INT_ADC_24V_ACTUATORS - 0.007106, // V - INT_ADC_BACKUP_V - 0.000000, // V - INT_ADC_DUMMY + 0.000000, // - Not used + 0.014650, // mA - Internal ADC channel for primary alarm audio current high gain + 0.073240, // mA - Internal ADC channel for primary alarm audio current low gain + 0.001465, // V - Internal ADC channel for 5V to logic + 0.001465, // V - Internal ADC channel for 3.3V + 0.000733, // V - Internal ADC channel for 1.2V to processor + 0.000000, // V - Internal ADC channel for 1.8V external ADC + 0.000000, // V - Internal ADC channel for 1.0V FPGA + 0.000000, // V - Internal ADC channel for 1.8V FPGA + 0.001221, // V - Internal ADC channel for PCB temperature + 0.000000, // V - Internal ADC channel for ADC reference voltage + 0.007106, // mA - Internal ADC channel for VBackup + 0.007106, // V - Internal ADC channel for 24V to actuators (1) + 0.007106, // V - Internal ADC channel for 24V to actuators (2) + 0.000000, // - Not used }; // ********** private data ********** @@ -155,7 +156,7 @@ { if ( adcRawReadings[ i ].id < NUM_OF_INT_ADC_CHANNELS ) { - U32 ch = adcChannelNum2ChannelId[ adcRawReadings[ i ].id ]; + U32 ch = ADC_CHANNEL_NUM_TO_CHANNEL_ID[ adcRawReadings[ i ].id ]; adcReadingsTotals[ ch ] -= adcReadings[ ch ][ adcReadingsIdx[ ch ] ]; adcReadings[ ch ][ adcReadingsIdx[ ch ] ] = adcRawReadings[i].value; Index: firmware/App/Drivers/InternalADC.h =================================================================== diff -u -red39129abdca4ec343369d83494530b23621e052 -rf3fedc73df117154665ba07bbae8e9c8dc8880d4 --- firmware/App/Drivers/InternalADC.h (.../InternalADC.h) (revision ed39129abdca4ec343369d83494530b23621e052) +++ firmware/App/Drivers/InternalADC.h (.../InternalADC.h) (revision f3fedc73df117154665ba07bbae8e9c8dc8880d4) @@ -36,20 +36,23 @@ #define INT_ADC_FULL_SCALE_BITS 4095 ///< DD internal ADC full scale range. #define INT_ADC_REF_V 3.0F ///< DD internal ADC reference voltage. -/// Enumeration of DD internal ADC channels. +/// Enumeration of internal ADC channels that are used. typedef enum Int_ADC_Channels { INT_ADC_NOT_USED = 0, ///< Not used - INT_ADC_3_3V_SENSOR_ADC_REF, ///< Internal ADC channel for 3.3V sensor volatge - INT_ADC_24V_ACTUATORS_REG, ///< Internal ADC channel for 24V regen (diode drop) to actuators + INT_ADC_PRIMARY_ALARM_CURRENT_HG, ///< Internal ADC channel for primary alarm audio current high gain + INT_ADC_PRIMARY_ALARM_CURRENT_LG, ///< Internal ADC channel for primary alarm audio current low gain + INT_ADC_5V_LOGIC, ///< Internal ADC channel for 5V to logic + INT_ADC_3_3V, ///< Internal ADC channel for 3.3V INT_ADC_1_2V_PROCESSOR, ///< Internal ADC channel for 1.2V to processor - INT_ADC_5V_SENSORS, ///< Internal ADC channel for 5V to sensors + INT_ADC_1_8V_XADC, ///< Internal ADC channel for 1.8V external ADC + INT_ADC_1V_FPGA, ///< Internal ADC channel for 1.0V FPGA + INT_ADC_1_8V_FPGA, ///< Internal ADC channel for 1.8V FPGA INT_ADC_BOARD_THERMISTOR, ///< Internal ADC channel for PCB temperature - INT_ADC_1_25_FPGA_ADC_REF, ///< Internal ADC channel for FPGA ADC reference voltage - INT_ADC_3_3V, ///< Internal ADC channel for 3.3V - INT_ADC_5V_LOGIC, ///< Internal ADC channel for 5V to logic - INT_ADC_24V_ACTUATORS, ///< Internal ADC channel for 24V to actuators + INT_ADC_ADC_REF, ///< Internal ADC channel for ADC reference voltage INT_ADC_BACKUP_V, ///< Internal ADC channel for VBackup + INT_ADC_24V_ACTUATORS_1, ///< Internal ADC channel for 24V to actuators (1) + INT_ADC_24V_ACTUATORS_2, ///< Internal ADC channel for 24V to actuators (2) INT_ADC_DUMMY, ///< Internal ADC channel - not used, needed to get even number of channels NUM_OF_INT_ADC_CHANNELS ///< Number of used internal ADC channels. } INT_ADC_CHANNEL_T; Index: firmware/DD.dil =================================================================== diff -u -ra0c144ed9f72066d7a7b1d047b01fb76ca56d667 -rf3fedc73df117154665ba07bbae8e9c8dc8880d4 --- firmware/DD.dil (.../DD.dil) (revision a0c144ed9f72066d7a7b1d047b01fb76ca56d667) +++ firmware/DD.dil (.../DD.dil) (revision f3fedc73df117154665ba07bbae8e9c8dc8880d4) @@ -1,4 +1,4 @@ -# RM46L852PGE 09/08/25 14:56:28 +# RM46L852PGE 09/09/25 12:30:03 # ARCH=RM46L852PGE # @@ -5536,7 +5536,7 @@ DRIVER.CAN.VAR.CAN_2_MESSAGE_8_ID.VALUE=8 DRIVER.ADC.VAR.ADC2_GROUP1_DISCHARGE_PRESCALER.VALUE=0 DRIVER.ADC.VAR.ADC1_GROUP1_PIN21_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_PIN13_ENABLE.VALUE=0x00000000 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN13_ENABLE.VALUE=0x00002000 DRIVER.ADC.VAR.ADC1_GROUP1_ACTUAL_DISCHARGE_TIME.VALUE=0.00 DRIVER.ADC.VAR.ADC2_GROUP1_RESOLUTION.VALUE=12_BIT DRIVER.ADC.VAR.ADC2_GROUP0_PIN3_ENABLE.VALUE=0x00000000 @@ -5553,10 +5553,10 @@ DRIVER.ADC.VAR.ADC2_GROUP2_RAM_PARITY_ENA.VALUE=0 DRIVER.ADC.VAR.ADC1_GROUP1_PIN3_ENABLE.VALUE=0x00000008 DRIVER.ADC.VAR.ADC1_GROUP0_CHANNEL_TOTAL_TIME.VALUE=0.000000 -DRIVER.ADC.VAR.ADC1_GROUP1_FIFO_SIZE.VALUE=24 +DRIVER.ADC.VAR.ADC1_GROUP1_FIFO_SIZE.VALUE=13 DRIVER.ADC.VAR.ADC1_GROUP2_DISCHARGE_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP2_SAMPLE_PRESCALER.VALUE=0 -DRIVER.ADC.VAR.ADC1_GROUP1_LENGTH.VALUE=24 +DRIVER.ADC.VAR.ADC1_GROUP1_LENGTH.VALUE=14 DRIVER.ADC.VAR.ADC2_GROUP1_ID_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP2_CONVERSION_TIME.VALUE=3.250 DRIVER.ADC.VAR.ADC2_PORT_BIT0_DIR.VALUE=0 @@ -5575,7 +5575,7 @@ DRIVER.ADC.VAR.ADC2_GROUP2_ACTUAL_SAMPLE_TIME.VALUE=384.60 DRIVER.ADC.VAR.ADC2_GROUP2_SAMPLE_PRESCALER.VALUE=2 DRIVER.ADC.VAR.ADC2_GROUP2_PIN12_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_PIN18_ENABLE.VALUE=0x00000000 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN18_ENABLE.VALUE=0x00040000 DRIVER.ADC.VAR.ADC2_GROUP0_PIN8_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP1_PIN11_ENABLE.VALUE=0x00000800 DRIVER.ADC.VAR.ADC1_BND.VALUE=2 @@ -5591,7 +5591,7 @@ DRIVER.ADC.VAR.ADC1_GROUP1_EXTENDED_SAMPLE_TIME.VALUE=500.00 DRIVER.ADC.VAR.ADC1_GROUP0_CONVERSION_TIME.VALUE=3.250 DRIVER.ADC.VAR.ADC2_GROUP0_RESOLUTION.VALUE=12_BIT -DRIVER.ADC.VAR.ADC1_GROUP1_PIN1_ENABLE.VALUE=0x00000002 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN1_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP1_RESOLUTION.VALUE=12_BIT DRIVER.ADC.VAR.ADC2_GROUP1_TRIGGER_EDGE_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC2_GROUP0_CONVERSION_TIME.VALUE=1.300 @@ -5638,7 +5638,7 @@ DRIVER.ADC.VAR.ADC2_GROUP0_SAMPLE_PRESCALER.VALUE=2 DRIVER.ADC.VAR.ADC1_GROUP0_DISCHARGE_PRESCALER.VALUE=0 DRIVER.ADC.VAR.ADC2_GROUP2_PIN3_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_PIN6_ENABLE.VALUE=0x00000040 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN6_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC2_RAMBASE.VALUE=0xFF3A0000 DRIVER.ADC.VAR.ADC2_GROUP0_BND.VALUE=8 DRIVER.ADC.VAR.ADC1_PORT_BIT0_DOUT.VALUE=0 @@ -5666,7 +5666,7 @@ DRIVER.ADC.VAR.ADC1_GROUP0_PIN10_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC2_GROUP1_PINS.VALUE=0 DRIVER.ADC.VAR.ADC1_GROUP1_PIN22_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_PIN14_ENABLE.VALUE=0x00000000 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN14_ENABLE.VALUE=0x00004000 DRIVER.ADC.VAR.ADC2_GROUP0_PIN4_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP2_PIN18_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC2_GROUP2_PIN8_ENABLE.VALUE=0x00000000 @@ -5682,7 +5682,7 @@ DRIVER.ADC.VAR.ADC2_GROUP2_HW_TRIGGER_SOURCE.VALUE=EVENT DRIVER.ADC.VAR.ADC2_GROUP2_ID_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC2_GROUP1_ACTUAL_SAMPLE_TIME.VALUE=384.60 -DRIVER.ADC.VAR.ADC1_GROUP2_LENGTH.VALUE=40 +DRIVER.ADC.VAR.ADC1_GROUP2_LENGTH.VALUE=50 DRIVER.ADC.VAR.ADC1_GROUP0_BND.VALUE=0 DRIVER.ADC.VAR.ADC2_GROUP2_CHANNEL_TOTAL_TIME.VALUE=0.000000 DRIVER.ADC.VAR.ADC2_GROUP2_CONTINUOUS_ENABLE.VALUE=0x00000000 @@ -5701,9 +5701,9 @@ DRIVER.ADC.VAR.ADC1_GROUP2_PIN5_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP0_PIN23_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP0_PIN15_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_BND.VALUE=12 +DRIVER.ADC.VAR.ADC1_GROUP1_BND.VALUE=7 DRIVER.ADC.VAR.ADC2_GROUP2_PIN13_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_PIN19_ENABLE.VALUE=0x00000000 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN19_ENABLE.VALUE=0x00080000 DRIVER.ADC.VAR.ADC2_PORT_BIT0_DOUT.VALUE=0 DRIVER.ADC.VAR.ADC2_CYCLE_TIME.VALUE=100.00 DRIVER.ADC.VAR.ADC1_GROUP1_HW_TRIGGER_SOURCE.VALUE=EVENT @@ -5721,7 +5721,7 @@ DRIVER.ADC.VAR.ADC1_GROUP2_PIN16_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP2_ID_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC2_GROUP2_PIN6_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_PIN9_ENABLE.VALUE=0x00000200 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN9_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP1_CONTINUOUS_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_PORT_BIT0_PDR.VALUE=0 DRIVER.ADC.VAR.ADC1_GROUP1_SAMPLE_TIME.VALUE=300.00 @@ -5808,7 +5808,7 @@ DRIVER.ADC.VAR.ADC2_GROUP1_CHANNEL_TOTAL_TIME.VALUE=0.000000 DRIVER.ADC.VAR.ADC2_GROUP2_PIN2_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC2_GROUP0_CONTINUOUS_ENABLE.VALUE=0x00000000 -DRIVER.ADC.VAR.ADC1_GROUP1_PIN5_ENABLE.VALUE=0x00000020 +DRIVER.ADC.VAR.ADC1_GROUP1_PIN5_ENABLE.VALUE=0x00000000 DRIVER.ADC.VAR.ADC1_GROUP2_ACTUAL_SAMPLE_TIME.VALUE=500.00 DRIVER.ADC.VAR.ADC1_GROUP0_SCAN_TIME.VALUE=0.000 DRIVER.ADC.VAR.ADC2_GROUP1_PIN6_ENABLE.VALUE=0x00000000 Index: firmware/include/adc.h =================================================================== diff -u -r8b8fff67b95805272f37855346d600599aaec03d -rf3fedc73df117154665ba07bbae8e9c8dc8880d4 --- firmware/include/adc.h (.../adc.h) (revision 8b8fff67b95805272f37855346d600599aaec03d) +++ firmware/include/adc.h (.../adc.h) (revision f3fedc73df117154665ba07bbae8e9c8dc8880d4) @@ -240,7 +240,7 @@ #define ADC1_G1SRC_CONFIGVALUE ((uint32)0x00000000U | (uint32)ADC1_EVENT) #define ADC1_G2SRC_CONFIGVALUE ((uint32)0x00000000U | (uint32)ADC1_EVENT) -#define ADC1_BNDCR_CONFIGVALUE ((uint32)((uint32)0U << 16U)|(0U + 12U)) +#define ADC1_BNDCR_CONFIGVALUE ((uint32)((uint32)0U << 16U)|(0U + 7U)) #define ADC1_BNDEND_CONFIGVALUE (2U) #define ADC1_G0SAMP_CONFIGVALUE (0U) Index: firmware/source/adc.c =================================================================== diff -u -r313982ccc772f1bbe182877dff7e00381b04e0f4 -rf3fedc73df117154665ba07bbae8e9c8dc8880d4 --- firmware/source/adc.c (.../adc.c) (revision 313982ccc772f1bbe182877dff7e00381b04e0f4) +++ firmware/source/adc.c (.../adc.c) (revision f3fedc73df117154665ba07bbae8e9c8dc8880d4) @@ -86,7 +86,7 @@ adcREG1->CLOCKCR = 25U; /** - Setup memory boundaries */ - adcREG1->BNDCR = (uint32)((uint32)0U << 16U) | (0U + 12U); + adcREG1->BNDCR = (uint32)((uint32)0U << 16U) | (0U + 7U); adcREG1->BNDEND = (adcREG1->BNDEND & 0xFFFF0000U) | (2U); /** - Setup event group conversion mode @@ -233,28 +233,28 @@ 0x00000000U | 0x00000000U, 0x00000001U | - 0x00000002U | + 0x00000000U | 0x00000004U | 0x00000008U | 0x00000010U | - 0x00000020U | - 0x00000040U | + 0x00000000U | + 0x00000000U | 0x00000080U | 0x00000100U | - 0x00000200U | + 0x00000000U | 0x00000400U | 0x00000800U | 0x00001000U | + 0x00002000U | + 0x00004000U | 0x00000000U | 0x00000000U | 0x00000000U | + 0x00040000U | + 0x00080000U | 0x00000000U | 0x00000000U | 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | - 0x00000000U | 0x00000000U, 0x00000000U | 0x00000000U | @@ -334,7 +334,7 @@ static const uint32 s_adcFiFoSize[2U][3U] = { {0U, - 24U, + 13U, 32U}, {16U, 16U,