Index: firmware/App/Drivers/Comm.c
===================================================================
diff -u -ra303cd4258157a8fbcbd8af4dd2bbaadec1a736c -r4d1572f8226f06febef4a536cdd0946d0dd0fb02
--- firmware/App/Drivers/Comm.c	(.../Comm.c)	(revision a303cd4258157a8fbcbd8af4dd2bbaadec1a736c)
+++ firmware/App/Drivers/Comm.c	(.../Comm.c)	(revision 4d1572f8226f06febef4a536cdd0946d0dd0fb02)
@@ -24,7 +24,78 @@
 
 #define DMA_CH_STATUS_BIT(ch)       ((U32)1U << (ch))
 
+// ********** private data **********
+
+static volatile BOOL canXmitsInProgress = FALSE;
+#ifdef DEBUG_ENABLED
+    static volatile BOOL uartXmitsInProgress = FALSE;
+#endif
+
 /*************************************************************************
+ * @brief signalCANXmitsInitiated
+ * The signalCANXmitsInitiated function sets the CAN transmits in \n
+ * progress flag.
+ * @details
+ * Inputs : none
+ * Outputs : canXmitsInProgress
+ * @param none
+ * @return none
+ *************************************************************************/
+void signalCANXmitsInitiated( void )
+{
+    canXmitsInProgress = TRUE;
+}
+
+/*************************************************************************
+ * @brief signalCANXmitsCompleted
+ * The signalCANXmitsCompleted function resets the CAN transmits in \n
+ * progress flag.
+ * @details
+ * Inputs : none
+ * Outputs : canXmitsInProgress
+ * @param none
+ * @return none
+ *************************************************************************/
+void signalCANXmitsCompleted( void )
+{
+    canXmitsInProgress = FALSE;
+}
+
+/*************************************************************************
+ * @brief signalSCI1XmitsInitiated
+ * The signalSCI1XmitsInitiated function sets the SCI1 transmits in \n
+ * progress flag.
+ * @details
+ * Inputs : none
+ * Outputs : uartXmitsInProgress
+ * @param none
+ * @return none
+ *************************************************************************/
+#ifdef DEBUG_ENABLED
+void signalSCI1XmitsInitiated( void )
+{
+    uartXmitsInProgress = TRUE;
+}
+#endif
+
+/*************************************************************************
+ * @brief signalSCI1XmitsCompleted
+ * The signalSCI1XmitsCompleted function resets the SCI1 transmits in \n
+ * progress flag.
+ * @details
+ * Inputs : none
+ * Outputs : uartXmitsInProgress
+ * @param none
+ * @return none
+ *************************************************************************/
+#ifdef DEBUG_ENABLED
+void signalSCI1XmitsCompleted( void )
+{
+    uartXmitsInProgress = FALSE;
+}
+#endif
+
+/*************************************************************************
  * @brief setSCI1DMAReceiveInterrupt
  * The setSCI1DMAReceiveInterrupt function enables DMA receive interrupts \n
  * for the SCI1 peripheral.
@@ -34,10 +105,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void setSCI1DMAReceiveInterrupt( void )
 {
     sciREG->SETINT = SCI_DMA_RECEIVE_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief setSCI1DMATransmitInterrupt
@@ -49,10 +122,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void setSCI1DMATransmitInterrupt( void )
 {
     sciREG->SETINT = SCI_DMA_TRANSMIT_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief clearSCI1DMAReceiveInterrupt
@@ -64,10 +139,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void clearSCI1DMAReceiveInterrupt( void )
 {
     sciREG->CLEARINT = SCI_DMA_RECEIVE_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief clearSCI1DMATransmitInterrupt
@@ -79,10 +156,12 @@
  * @param none
  * @return none
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 void clearSCI1DMATransmitInterrupt( void )
 {
     sciREG->CLEARINT = SCI_DMA_TRANSMIT_INT;
 }
+#endif
 
 /*************************************************************************
  * @brief setSCI2DMAReceiveInterrupt
@@ -145,6 +224,40 @@
 }
 
 /*************************************************************************
+ * @brief clearSCI1CommErrors
+ * The clearSCI1CommErrors function clears framing and/or overrun error flags \
+ * for the SCI1 peripheral.
+ * @details
+ * Inputs : none
+ * Outputs : SCI1 error flags cleared.
+ * @param none
+ * @return none
+ *************************************************************************/
+#ifdef DEBUG_ENABLED
+void clearSCI1CommErrors( void )
+{
+    sciReceiveByte( sciREG );
+    sciREG->FLR |= ( SCI_FE_INT | SCI_OE_INT );
+}
+#endif
+
+/*************************************************************************
+ * @brief clearSCI2CommErrors
+ * The clearSCI2CommErrors function clears framing and/or overrun error flags \n
+ * for the SCI2 peripheral.
+ * @details
+ * Inputs : none
+ * Outputs : SCI2 error flags cleared.
+ * @param none
+ * @return none
+ *************************************************************************/
+void clearSCI2CommErrors( void )
+{
+    sciReceiveByte( scilinREG );
+    scilinREG->FLR |= ( SCI_FE_INT | SCI_OE_INT );
+}
+
+/*************************************************************************
  * @brief isSCI1DMATransmitInProgress
  * The isSCI2DMATransmitInProgress function determines whether a DMA transmit \n
  * is in progress on the SCI1 peripheral.
@@ -154,14 +267,16 @@
  * @param none
  * @return TRUE if a transmit is in progress, FALSE if not
  *************************************************************************/
+#ifdef DEBUG_ENABLED
 BOOL isSCI1DMATransmitInProgress( void )
 {
     BOOL transmitterBusy = ( ( sciREG->FLR & (U32)SCI_TX_INT ) == 0U ? TRUE : FALSE );
     BOOL dmaTransmitterBusy = ( ( dmaREG->PEND & DMA_CH_STATUS_BIT(DMA_CH3) ) != 0U ? TRUE : FALSE );
 
 
-    return ( ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
+    return ( ( TRUE == uartXmitsInProgress ) || ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE );
 }
+#endif
 
 /*************************************************************************
  * @brief isSCI2DMATransmitInProgress
@@ -193,7 +308,7 @@
  *************************************************************************/
 BOOL isCAN1TransmitInProgress( void )
 {
-    BOOL result = ( ( canREG1->TXRQx[0] != 0 ) || ( canREG1->TXRQx[1] != 0 ) ? TRUE : FALSE );
+    BOOL result = ( ( TRUE == canXmitsInProgress ) || ( canREG1->TXRQx[ 0 ] != 0 ) || ( canREG1->TXRQx[ 1 ] != 0 ) ? TRUE : FALSE );
 
     return result;
 }