Index: firmware/App/Drivers/Comm.c =================================================================== diff -u -rdc0d9b087c609e71cacdb7f0395cccf29d749c00 -r2fe8834dda9d8f69068c151ff0474d915eef6eb5 --- firmware/App/Drivers/Comm.c (.../Comm.c) (revision dc0d9b087c609e71cacdb7f0395cccf29d749c00) +++ firmware/App/Drivers/Comm.c (.../Comm.c) (revision 2fe8834dda9d8f69068c151ff0474d915eef6eb5) @@ -22,20 +22,21 @@ #include "Comm.h" // ********** private definitions ********** + +#define SCI_DMA_TRANSMIT_INT 0x00010000 ///< SCI DMA transmit interrupt mask. +#define SCI_DMA_RECEIVE_INT 0x00060000 ///< SCI DMA receive interrupt mask. +#define DMA_CH_STATUS_BIT(ch) ((U32)1U << (ch)) ///< DMA channel status bit mask. -#define DMA_CH_STATUS_BIT(ch) ((U32)1U << (ch)) - // ********** private data ********** -static volatile BOOL canXmitsInProgress = FALSE; +static volatile BOOL canXmitsInProgress = FALSE; ///< Flag to indicates CAN transmit is in progress. #ifdef DEBUG_ENABLED - static volatile BOOL uartXmitsInProgress = FALSE; + static volatile BOOL uartXmitsInProgress = FALSE; ///< Flag to indicates UART transmit is in progress. #endif - -/************************************************************************* + +/*********************************************************************//** * @brief signalCANXmitsInitiated - * The signalCANXmitsInitiated function sets the CAN transmits in \n - * progress flag. + * The signalCANXmitsInitiated function sets the CAN transmits in progress flag. * @details * Inputs : none * Outputs : canXmitsInProgress @@ -45,11 +46,10 @@ { canXmitsInProgress = TRUE; } - -/************************************************************************* + +/*********************************************************************//** * @brief signalCANXmitsCompleted - * The signalCANXmitsCompleted function resets the CAN transmits in \n - * progress flag. + * The signalCANXmitsCompleted function resets the CAN transmits in progress flag. * @details * Inputs : none * Outputs : canXmitsInProgress @@ -59,11 +59,10 @@ { canXmitsInProgress = FALSE; } - -/************************************************************************* + +/*********************************************************************//** * @brief signalSCI1XmitsInitiated - * The signalSCI1XmitsInitiated function sets the SCI1 transmits in \n - * progress flag. + * The signalSCI1XmitsInitiated function sets the SCI1 transmits in progress flag. * @details * Inputs : none * Outputs : uartXmitsInProgress @@ -75,11 +74,10 @@ uartXmitsInProgress = TRUE; } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief signalSCI1XmitsCompleted - * The signalSCI1XmitsCompleted function resets the SCI1 transmits in \n - * progress flag. + * The signalSCI1XmitsCompleted function resets the SCI1 transmits in progress flag. * @details * Inputs : none * Outputs : uartXmitsInProgress @@ -91,10 +89,10 @@ uartXmitsInProgress = FALSE; } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief setSCI1DMAReceiveInterrupt - * The setSCI1DMAReceiveInterrupt function enables DMA receive interrupts \n + * The setSCI1DMAReceiveInterrupt function enables DMA receive interrupts * for the SCI1 peripheral. * @details * Inputs : none @@ -107,10 +105,10 @@ sciREG->SETINT = SCI_DMA_RECEIVE_INT; } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief setSCI1DMATransmitInterrupt - * The setSCI1DMATransmitInterrupt function enables DMA transmit interrupts \n + * The setSCI1DMATransmitInterrupt function enables DMA transmit interrupts * for the SCI1 peripheral. * @details * Inputs : none @@ -123,10 +121,10 @@ sciREG->SETINT = SCI_DMA_TRANSMIT_INT; } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief clearSCI1DMAReceiveInterrupt - * The clearSCI1DMAReceiveInterrupt function disables DMA receive interrupts \n + * The clearSCI1DMAReceiveInterrupt function disables DMA receive interrupts * for the SCI1 peripheral. * @details * Inputs : none @@ -139,10 +137,10 @@ sciREG->CLEARINT = SCI_DMA_RECEIVE_INT; } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief clearSCI1DMATransmitInterrupt - * The clearSCI1DMATransmitInterrupt function disables DMA transmit interrupts \n + * The clearSCI1DMATransmitInterrupt function disables DMA transmit interrupts * for the SCI1 peripheral. * @details * Inputs : none @@ -155,10 +153,10 @@ sciREG->CLEARINT = SCI_DMA_TRANSMIT_INT; } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief setSCI2DMAReceiveInterrupt - * The setSCI2DMAReceiveInterrupt function enables DMA receive interrupts \n + * The setSCI2DMAReceiveInterrupt function enables DMA receive interrupts * for the SCI2 peripheral. * @details * Inputs : none @@ -169,10 +167,10 @@ { scilinREG->SETINT = SCI_DMA_RECEIVE_INT; } - -/************************************************************************* + +/*********************************************************************//** * @brief setSCI2DMATransmitInterrupt - * The setSCI2DMATransmitInterrupt function enables DMA transmit interrupts \n + * The setSCI2DMATransmitInterrupt function enables DMA transmit interrupts * for the SCI2 peripheral. * @details * Inputs : none @@ -183,10 +181,10 @@ { scilinREG->SETINT = SCI_DMA_TRANSMIT_INT; } - -/************************************************************************* + +/*********************************************************************//** * @brief clearSCI2DMAReceiveInterrupt - * The clearSCI2DMAReceiveInterrupt function disables DMA receive interrupts \n + * The clearSCI2DMAReceiveInterrupt function disables DMA receive interrupts * for the SCI2 peripheral. * @details * Inputs : none @@ -197,10 +195,10 @@ { scilinREG->CLEARINT = SCI_DMA_RECEIVE_INT; } - -/************************************************************************* + +/*********************************************************************//** * @brief clearSCI2DMATransmitInterrupt - * The clearSCI2DMATransmitInterrupt function disables DMA transmit interrupts \n + * The clearSCI2DMATransmitInterrupt function disables DMA transmit interrupts * for the SCI2 peripheral. * @details * Inputs : none @@ -211,10 +209,10 @@ { scilinREG->CLEARINT = SCI_DMA_TRANSMIT_INT; } - -/************************************************************************* + +/*********************************************************************//** * @brief clearSCI1CommErrors - * The clearSCI1CommErrors function clears framing and/or overrun error flags \ + * The clearSCI1CommErrors function clears framing and/or overrun error flags * for the SCI1 peripheral. * @details * Inputs : none @@ -228,10 +226,10 @@ sciREG->FLR |= ( SCI_FE_INT | SCI_OE_INT ); } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief clearSCI2CommErrors - * The clearSCI2CommErrors function clears framing and/or overrun error flags \n + * The clearSCI2CommErrors function clears framing and/or overrun error flags * for the SCI2 peripheral. * @details * Inputs : none @@ -243,10 +241,10 @@ sciReceiveByte( scilinREG ); scilinREG->FLR |= ( SCI_FE_INT | SCI_OE_INT ); } - -/************************************************************************* + +/*********************************************************************//** * @brief isSCI1DMATransmitInProgress - * The isSCI2DMATransmitInProgress function determines whether a DMA transmit \n + * The isSCI2DMATransmitInProgress function determines whether a DMA transmit * is in progress on the SCI1 peripheral. * @details * Inputs : status registers @@ -263,10 +261,10 @@ return ( ( TRUE == uartXmitsInProgress ) || ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE ); } #endif - -/************************************************************************* + +/*********************************************************************//** * @brief isSCI2DMATransmitInProgress - * The isSCI2DMATransmitInProgress function determines whether a DMA transmit \n + * The isSCI2DMATransmitInProgress function determines whether a DMA transmit * is in progress on the SCI2 peripheral. * @details * Inputs : status registers @@ -280,10 +278,10 @@ return ( ( transmitterBusy == TRUE ) || ( dmaTransmitterBusy == TRUE ) ? TRUE : FALSE ); } - -/************************************************************************* + +/*********************************************************************//** * @brief isCAN1TransmitInProgress - * The isCAN1TransmitInProgress function determines whether a transmit \n + * The isCAN1TransmitInProgress function determines whether a transmit * is in progress on the CAN1 peripheral. * @details * Inputs : status registers @@ -296,4 +294,5 @@ return result; } - + +/**@}*/